CLC2011IMP8MTR [EXAR]
Operational Amplifier, 2 Func, BIPolar, PDSO8, MSOP-8;
| 型号： | CLC2011IMP8MTR |
| 厂家： | 
EXAR CORPORATION |
| 描述： | Operational Amplifier, 2 Func, BIPolar, PDSO8, MSOP-8 放大器 光电二极管 |
| 文件： | 总17页 (文件大小：2262K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CLC2011, CLC4011
Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
FEATURES
ꢀ■
General Description
136μA supply current
ꢀ■
4.9MHz bandwidth
The CLC2011 (dual) and CLC4011 (quad) are ultra-low cost, low power,
voltage feedback amplifiers. At 2.7V, the CLCx011 family uses only 136μA
of supply current per amplifier and are designed to operate from a supply
range of 2.5V to 5.5V ( 1.25 to 2.75).The input voltage range exceeds the
negative and positive rails.
ꢀ■
ꢀ■
Output swings to within 20mV of either rail
Input voltage range exceeds the rail by
>250mV
ꢀ■
ꢀ■
ꢀ■
ꢀ■
5.3V/μs slew rate
21nV/√Hz input voltage noise
35mA linear output current
Fully specified at 2.7V and 5V supplies
The CLCx011 family of amplifiers offer high bipolar performance at a low
CMOS prices.They offer superior dynamic performance with 4.9MHz small
signal bandwidths and 5.3V/μs slew rates. The combination of low power,
high bandwidth, and rail-to-rail performance make the CLCx011 amplifiers
well suited for battery-powered communication/computing systems.
APPLICATIONS
ꢀ■
Portable/battery-powered applications
ꢀ■
Mobile communications, cell phones,
pagers
ꢀ■
ADC buffer
ꢀ■
Active filters
ꢀ■
Portable test instruments
ꢀ■
Notebooks and PDA’s
ꢀ■
Signal conditioning
ꢀ■
Medical equipment
ꢀ■
Portable medical instrumentation
Ordering Information - back page
Output Swing vs. Load
Large Signal Frequency Response
1.35
R
= 10kΩ
L
V = 5V
s
R
= 1kΩ
V
= 1V
pp
L
o
R
= 75Ω
L
0
R
= 100Ω
L
V
= 4V
pp
o
R
= 200Ω
L
R
= 75/100Ω
L
V
= 2V
pp
o
-1.35
0.01
0.1
-2.0
1
10
0
2.0
Frequency (MHz)
Input Voltage (0.4V/div)
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
Absolute Maximum Ratings
Operating Conditions
Supply Voltage Range ...................................................2.5 to 5.5V
Operating Temperature Range ...............................-40°C to 125°C
Junction Temperature ...........................................................150°C
Storage Temperature Range...................................-65°C to 150°C
Lead Temperature (Soldering, 10s) ......................................260°C
Stresses beyond the limits listed below may cause
permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect
device reliability and lifetime.
VS ..................................................................................... 0V to 6V
VIN ............................................................ -VS - 0.5V to +VS +0.5V
Continuous Output Current..................................-40mA to +40mA
Package Thermal Resistance
θ
θ
θ
θ
JA (SOIC-8).....................................................................150°C/W
JA (MSOP-8) .................................................................. 200°C/W
JA (SOIC-14).................................................................... 90°C/W
JA (TSSOP-14)................................................................100°C/W
Package thermal resistance (θJA), JEDEC standard, multi-layer
test boards, still air.
ESD Protection
CLC2011, CLC4011 (HBM).......................................................2kV
ESD Rating for HBM (Human Body Model).
© 2009 - 2014 Exar Corporation
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Rev 1D
CLC2011, CLC4011
Electrical Characteristics at +2.7V
T = 25°C, V = +2.7V, R = R = 5kΩ, R = 10kΩ to V /2; G = 2; unless otherwise noted.
A
S
f
g
L
S
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
UGBW
Unity Gain -3dB Bandwidth
-3dB Bandwidth
G = +1, V
G = +2, V
G = +2, V
= 0.02V
4.9
3.2
1.4
2.5
MHz
MHz
MHz
MHz
SS
OUT
OUT
OUT
pp
BW
= 0.2V
SS
LS
pp
BW
Large Signal Bandwidth
Gain Bandwidth Product
= 2V
pp
GBWP
G = +11, V
= 0.2V
OUT
pp
Time Domain Response
t , t
Rise and Fall Time
Settling Time to 0.1%
Overshoot
V
V
V
= 1V step; (10% to 90%)
= 1V step
163
500
<1
ns
ns
R
F
OUT
OUT
OUT
t
S
OS
SR
= 1V step
%
Slew Rate
1V step
5.3
V/μs
Distortion/Noise Response
HD2
HD3
THD
2nd Harmonic Distortion
10kHz, V
10kHz, V
10kHz, V
>10kHz
= 1V
= 1V
= 1V
-72
-72
0.03
21
dBc
dBc
%
OUT
OUT
OUT
pp
pp
pp
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
e
nV/√Hz
dB
n
Channel to Channel, V
Channel to Channel, V
= 2V , f = 10kHz
82
OUT
pp
X
Crosstalk
TALK
= 2V , f = 50kHz
74
dB
OUT
pp
DC Performance
V
Input Offset Voltage
Average Drift
0.5
5
mV
μV/°C
nA
IO
d
VIO
I
Input Bias Current
Average Drift
90
32
83
90
136
B
dI
pA/°C
dB
B
PSRR
Power Supply Rejection Ratio
Open Loop Gain
Supply Current
DC
55
A
V
= V / 2
dB
OL
OUT
S
I
per channel
μA
S
Input Characteristics
R
Input Resistance
Input Capacitance
Non-inverting
12
2
MΩ
IN
IN
C
pF
-0.25 to
2.95
CMIR
Common Mode Input Range
V
CMRR
Common Mode Rejection Ratio
DC
81
dB
Output Characteristics
0.02 to
2.68
R = 10kΩ to V / 2
V
V
L
S
0.05 to
2.63
V
Output Voltage Swing
Output Current
R = 1kΩ to V / 2
L S
OUT
0.11 to
2.52
R = 200Ω to V / 2
V
L
S
I
30
mA
OUT
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Rev 1D
CLC2011, CLC4011
Electrical Characteristics at +5V
T = 25°C, V = +5V, R = R = 5kΩ, R = 10kΩ to V /2; G = 2; unless otherwise noted.
A
S
f
g
L
S
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
UGBW
Unity Gain -3dB Bandwidth
-3dB Bandwidth
G = +1, V
G = +2, V
G = +2, V
= 0.02V
4.3
3.0
2.3
2.5
MHz
MHz
MHz
MHz
SS
OUT
OUT
OUT
pp
BW
= 0.2V
SS
LS
pp
BW
Large Signal Bandwidth
Gain Bandwidth Product
= 2V
pp
GBWP
G = +11, V
= 0.2V
OUT
pp
Time Domain Response
t , t
Rise and Fall Time
Settling Time to 0.1%
Overshoot
V
V
V
= 1V step; (10% to 90%)
= 2V step
110
470
<1
9
ns
ns
R
F
OUT
OUT
OUT
t
S
OS
SR
= 1V step
%
Slew Rate
2V step
V/μs
Distortion/Noise Response
HD2
HD3
THD
2nd Harmonic Distortion
10kHz, V
10kHz, V
10kHz, V
>10kHz
= 1V
= 1V
= 1V
-73
-75
0.03
22
dBc
dBc
%
OUT
OUT
OUT
pp
pp
pp
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
e
nV/√Hz
dB
n
Channel to Channel, V
Channel to Channel, V
= 2V , f = 10kHz
82
OUT
pp
X
Crosstalk
TALK
= 2V , f = 50kHz
74
dB
OUT
pp
DC Performance
V
Input Offset Voltage
Average Drift
-8
1.5
15
8
mV
μV/°C
nA
IO
d
VIO
I
Input Bias Current
Average Drift
90
450
B
dI
40
pA/°C
dB
B
PSRR
Power Supply Rejection Ratio
Open Loop Gain
Supply Current
DC
55
85
A
V
= V / 2
80
dB
OL
OUT
S
I
per channel
160
235
μA
S
Input Characteristics
R
Input Resistance
Input Capacitance
Non-inverting
12
2
MΩ
IN
IN
C
pF
-0.25 to
5.25
CMIR
Common Mode Input Range
V
CMRR
Common Mode Rejection Ratio
DC
58
80
dB
Output Characteristics
0.08 to
4.92
0.04 to
4.96
R = 10kΩ to V / 2
V
V
L
S
0.07 to
4.9
V
Output Voltage Swing
Output Current
R = 1kΩ to V / 2
L S
OUT
0.14 to
4.67
R = 200Ω to V / 2
V
L
S
I
35
mA
OUT
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
CLC2011 Pin Configurations
CLC2011 Pin Assignments
SOIC-8 / MSOP-8
SOIC-8 / MSOP-8
Pin No.
Pin Name
OUT1
-IN1
Description
1
2
3
4
5
6
7
8
Output, channel 1
OUT1
-IN1
+IN1
-Vs
1
2
3
4
8
7
6
5
+Vs
Negative input, channel 1
Positive input, channel 1
Negative supply
+IN1
OUT2
-IN2
-
-V
S
+
-
+IN2
-IN2
Positive input, channel 2
Negative input, channel 2
Output, channel 2
+
+IN2
OUT2
+V
Positive supply
S
CLC4011 Pin Configuration
CLC4011 Pin Assignments
SOIC-14 / TSSOP-14
SOIC-14 / TSSOP-14
Pin No.
Pin Name
OUT1
-IN1
Description
1
2
Output, channel 1
Negative input, channel 1
Positive input, channel 1
Positive supply
1
2
3
4
14
13
12
11
10
9
OUT1
-IN1
+IN1
+VS
OUT4
-IN4
3
+IN1
4
+V
S
5
+IN2
-IN2
Positive input, channel 2
Negative input, channel 2
Output, channel 2
+IN4
-VS
6
7
OUT2
OUT3
-IN3
8
Output, channel 3
5
6
7
+IN2
+IN3
-IN3
9
Negative input, channel 3
Positive input, channel 3
Negative supply
10
11
12
13
14
+IN3
-IN2
-V
S
8
OUT2
OUT3
+IN4
-IN4
Positive input, channel 4
Negative input, channel 4
Output, channel 4
OUT4
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
Typical Performance Characteristics
T = 25°C, V = +2.7V, R = R = 5kΩ, R = 10kΩ to V /2; G = 2; unless otherwise noted.
A
S
f
g
L
S
Non-Inverting Frequency Response at V = 5V
Inverting Frequency Response at V = 5V
S
S
V
= 0.2V
V
= 0.2V
pp
o
pp
o
G = 1
R = 0
f
G = 2
R = 5kΩ
R = 5kΩ
f
f
R = 5kΩ
f
R = 5kΩ
f
R = 5kΩ
f
G = 5
R = 5kΩ
f
R = 5kΩ
f
0.01
0.1
1
10
0.01
0.1
1
10
Frequency (MHz)
Frequency (MHz)
Non-Inverting Frequency Response at V = 2.7V
Inverting Frequency Response at V = 2.7V
S
S
V
= 0.2V
R = 5kΩ
G = 1
R = 0
f
o
pp
f
G = 2
R = 5kΩ
G = -2
f
G = -1
R = 5kΩ
f
G = -10
G = 5
R = 5kΩ
f
G = -5
0.01
0.1
0.01
0.1
1
10
1
10
Frequency (MHz)
Frequency (MHz)
Frequency Response vs C
Frequency Response vs R
L
L
V
= 0.05V
C
R
o
L
= 100Ω
s
C
R
L
s
= 0Ω
R
= 1kΩ
R
= 10kΩ
L
L
C
L
R
= 0Ω
s
C
L
R
R
= 200Ω
L
= 0Ω
s
+
Rs
R
= 50Ω
L
-
CL RL
5kΩ
5kΩ
0.01
0.1
1
10
0.01
0.1
1
10
Frequency (MHz)
Frequency (MHz)
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
Typical Performance Characteristics
T = 25°C, V = +2.7V, R = R = 5kΩ, R = 10kΩ to V /2; G = 2; unless otherwise noted.
A
S
f
g
L
S
Frequency Response vs.V
Open Loop Gain & Phase vs. Frequency
OUT
140
120
V
= 5V
s
V
= 5V
s
R
= 10kΩ
L
No load
V
= 1V
pp
o
100
80
0
60
40
20
0
-45
-90
-135
-180
V
= 4V
pp
o
V
= 2V
pp
o
R
= 10kΩ
No load
L
-20
100 101 102 103 104 105 106 107 108
Frequency (Hz)
0.01
0.1
1
10
Frequency (MHz)
2nd Harmonic Distortion vs V
3rd Harmonic Distortion vs V
OUT
OUT
-20
-30
-40
-50
-60
-20
-30
-40
50kHz
-50
100kHz
50kHz
100kHz
-60
20kHz
50kHz
-70
-70
10kHz
10kHz, 20kHz
-80
-80
10kHz
-90
-90
0.5
1
0.5
1.5
2
2.5
1
1.5
2
2.5
Output Amplitude (V )
Output Amplitude (V )
pp
pp
2nd & 3rd Harmonic Distortion at V = 2.7V
Input Voltage Noise
S
-20
55
50
45
40
35
30
25
20
15
10
5
V
= 1V
pp
o
R
= 200Ω
-30
-40
-50
-60
-70
-80
-90
L
R
= 1kΩ
L
R
= 200Ω
L
R
= 10kΩ
L
R
= 1kΩ
L
R
= 10kΩ
L
0
0
20
40
60
80
100
0.1k
1k
10k
100k
1M
Frequency (kHz)
Frequency (Hz)
© 2009 - 2014 Exar Corporation
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
Typical Performance Characteristics
T = 25°C, V = +2.7V, R = R = 5kΩ, R = 10kΩ to V /2; G = 2; unless otherwise noted.
A
S
f
g
L
S
CMRR
PSRR
0
0
-10
-20
-10
-20
-30
-40
-50
-60
-70
-80
-90
-30
-40
-50
-60
-70
-80
-90
10
100
1000
10000
100000
10
100
1000
10000
100000
Frequency (Hz)
Frequency (Hz)
Output Swing vs. Load
Pulse Response vs. Common Mode Voltage
1.35
R
= 10kΩ
L
1.2V offset
0.6V offset
R
= 1kΩ
L
R
= 75Ω
No offset
-0.6V offset
-1.2V offset
L
0
R
= 100Ω
L
R
= 200Ω
L
R
= 75/100Ω
L
-1.35
-2.0
0
2.0
Time (1µs/div)
Input Voltage (0.4V/div)
Crosstalk vs. Frequency
© 2009 - 2014 Exar Corporation
8 / 17
exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
Application Information
+Vs
6.8μF
0.1μF
General Description
The CLCx011 family of amplifiers are single supply, general
purpose, voltage-feedback amplifiers. They are fabricated
on a complimentary bipolar process, feature a rail-to-rail
input and output, and are unity gain stable.
Input
+
Output
RL
-
0.1μF
6.8μF
Basic Operation
Figures 1, 2, and 3 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
Figure 4 shows the typical non-inverting gain circuit for
single supply applications.
G = 1
-Vs
Figure 3: Unity Gain Circuit
+Vs
+Vs
6.8μF
6.8μF
+
0.1μF
+
In
0.1μF
Input
+
-
Out
Output
-
RL
Rf
0.1μF
6.8μF
Rf
Rg
Rg
G = 1 + (Rf/Rg)
-Vs
Figure 4: Single Supply Non-Inverting Gain Circuit
Figure 1: Typical Non-Inverting Gain Circuit
Power Dissipation
+Vs
6.8μF
Power dissipation should not be a factor when operating
under the stated 10kΩ load condition. However, applications
with low impedance, DC coupled loads should be analyzed
to ensure that maximum allowed junction temperature is
not exceeded. Guidelines listed below can be used to verify
that the particular application will not cause the device to
operate beyond it’s intended operating range.
R1
0.1μF
+
Output
Rg
Input
-
RL
0.1μF
Rf
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
6.8μF
G = - (Rf/Rg)
-Vs
temperature, the package thermal resistance value Theta
(θ ) is used along with the total die power dissipation.
JA
JA
For optimum input offset
voltage set R1 = Rf || Rg
T
= T
+ (θ × P )
Ambient JA D
Junction
Figure 2: Typical Inverting Gain Circuit
Where T
is the temperature of the working
Ambient
environment.
© 2009 - 2014 Exar Corporation
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
In order to determine P , the power dissipated in the load
needs to be subtracted from the total power delivered by the
supplies.
D
2.5
2
TSSOP-14
P = P
- P
load
D
supply
SOIC-14
1.5
1
Supply power is calculated by the standard power equation.
SOIC-8
P
supply
= V
× I
supply RMSsupply
V
= V - V
S+ S-
supply
0.5
0
MSOP-8
-20
Power delivered to a purely resistive load is:
-40
0
20
40
60
80
100
120
2
Ambient Temperature (°C)
P
load
= ((V
)
)/Rload
eff
load RMS
Figure 5. Maximum Power Derating
The effective load resistor (Rload ) will need to include
eff
the effect of the feedback network. For instance, Rload in
Figure 3 would be calculated as:
eff
Input Common Mode Voltage
The common mode input range extends to 250mV below
ground and to 250mV above Vs, in single supply operation.
Exceeding these values will not cause phase reversal.
However, if the input voltage exceeds the rails by more
than 0.5V, the input ESD devices will begin to conduct. The
output will stay at the rail during this overdrive condition. If
the absolute maximum input voltage (700mV beyond either
rail) is exceeded, externally limit the input current to 5mA
as shown in Figure 6.
R || (R + R )
L
f
g
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, P can be found from
D
P = P
D
+ P
- P
Quiescent
Dynamic load
10k
Input
+
-
Output
Quiescent power can be derived from the specified I values
S
along with known supply voltage, V
. Load power can
supply
be calculated as above with the desired signal amplitudes
using:
Figure 6. Circuit for Input Current Protection
(V
)
= V
/ √2
peak
load RMS
( I
)
= ( V
)
/ Rload
eff
load RMS
load RMS
Driving Capacitive Loads
Increased phase delay at the output due to capacitive loading
can cause ringing, peaking in the frequency response, and
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
possible unstable behavior. Use a series resistance, R ,
S
P
= (V - V
)
× ( I )
load RMS
between the amplifier and the load to help improve stability
and settling performance. Refer to Figure 7.
Dynamic
S+
load RMS
Assuming the load is referenced in the middle of the power
rails or V /2.
Input
+
-
supply
Rs
Output
CL
RL
Rf
The CLC2011 is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions. Figure 5
shows the maximum safe power dissipation in the package
vs. the ambient temperature for the packages available.
Rg
Figure 7. Addition of R for Driving Capacitive Loads
S
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exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
Table 1 provides the recommended R for various capacitive
Layout Considerations
S
loads. The recommended R values result in approximately
S
General layout and supply bypassing play major roles in
high frequency performance. Exar has evaluation boards to
use as a guide for high frequency layout and as an aid in
device testing and characterization. Follow the steps below
as a basis for high frequency layout:
<1dB peaking in the frequency response. The Frequency
Response vs. CL plot, on page 6, illustrates the response
of the CLCx011.
ꢀ■
Include 6.8µF and 0.1µF ceramic capacitors for power supply
CL (pF)
RS (Ω)
-3dB BW (MHz)
decoupling
ꢀ■
Place the 6.8µF capacitor within 0.75 inches of the power pin
10pF
20pF
50pF
100pF
0
0
2.2
2.4
2.5
2
ꢀ■
Place the 0.1µF capacitor within 0.1 inches of the power pin
ꢀ■
Remove the ground plane under and around the part,
especially near the input and output pins to reduce parasitic
capacitance
0
100
ꢀ■
Minimize all trace lengths to reduce series inductances
Table 1: Recommended R vs. C
S
L
Refer to the evaluation board layouts below for more
information.
For a given load capacitance, adjust R to optimize the
S
tradeoff between settling time and bandwidth. In general,
Evaluation Board Information
reducing R will increase bandwidth at the expense of
S
The following evaluation boards are available to aid in the
testing and layout of these devices:
additional overshoot and ringing.
Overdrive Recovery
Evaluation Board #
CEB006
Products
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for the
amplifier to return to its normal or linear operating point.The
recovery time varies, based on whether the input or output
is overdriven and by how much the range is exceeded.
The CLCx011 will typically recover in less than 50ns from
an overdrive condition. Figure 8 shows the CLC2011 in an
overdriven condition.
CLC2011 in SOIC
CLC2011 in MSOP
CLC4011 in TSSOP
CLC4011 in SOIC
CEB010
CEB019
CEB018
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in
Figures 9-16 These evaluation boards are built for dual-
supply operation. Follow these steps to use the board in a
single-supply application:
1. Short -VS to ground.
2. Use C3 and C4, if the -VS pin of the amplifier is not
directly connected to the ground plane.
Figure 8: Overdrive Recovery
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Figure 11. CEB006 Bottom View
Figure 9. CEB006 & CEB010 Schematic
Figure 12. CEB010 Top View
Figure 10. CEB006 Top View
Figure 13. CEB010 Bottom View
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Figure 16. CEB018 Bottom View
Figure 14. CEB018 Schematic
Figure 15. CEB018 Top View
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Mechanical Dimensions
MSOP-8
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Mechanical Dimensions
SOIC-8 Package
SOIC-14 Package
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TSSOP-14 Package
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Ordering Information
Part Number
Package
Green
Operating Temperature Range
Packaging
CLC2011 Ordering Information
CLC2011ISO8X
SOIC-8
SOIC-8
Yes
Yes
N/A
Yes
Yes
N/A
-40°C to +125°C
-40°C to +125°C
N/A
Tape & Reel
Mini Tape & Reel
N/A
CLC2011ISO8MTR
CLC2011ISO8EVB
CLC2011IMP8X
Evaluation Board
MSOP-8
-40°C to +125°C
-40°C to +125°C
N/A
Tape & Reel
Mini Tape & Reel
N/A
CLC2011IMP8MTR
CLC2011IMP8EVB
CLC4011 Ordering Information
MSOP-8
Evaluation Board
CLC4011ISO14X
SOIC-14
SOIC-14
Yes
Yes
N/A
Yes
Yes
N/A
-40°C to +125°C
-40°C to +125°C
N/A
Tape & Reel
Mini Tape & Reel
N/A
CLC4011ISO14MTR
CLC4011ISO14EVB
CLC4011ITP14X
Evaluation Board
TSSOP-14
-40°C to +125°C
-40°C to +125°C
N/A
Tape & Reel
Mini Tape & Reel
N/A
CLC4011ITP14MTR
CLC4011ITP14EVB
TSSOP-14
Evaluation Board
Moisture sensitivity level for all parts is MSL-1. Mini tape and reel quantity is 250.
Revision History
Revision
Date
Description
Reformat into Exar data sheet template. Updated PODs and thermal resistance numbers. Updated
ordering information table to include MTR and EVB part numbers. Increased operating temperature to
+125°C.
January 19,
2015
1D (ECN 1504-01)
For Further Assistance:
Email: CustomerSupport@exar.com or HPATechSupport@exar.com
Exar Technical Documentation: http://www.exar.com/techdoc/
Exar Corporation Headquarters and Sales Offices
48760 Kato Road
Fremont, CA 94538 - USA
Tel.: +1 (510) 668-7000
Fax: +1 (510) 668-7001
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation
assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free
of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information
in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected
to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation
receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR
Corporation is adequately protected under the circumstances.
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
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