74FR2245SC [FAIRCHILD]

Octal Bidirectional Transceiver with 3-STATE Outputs; 八路双向收发器与3态输出
74FR2245SC
型号: 74FR2245SC
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Octal Bidirectional Transceiver with 3-STATE Outputs
八路双向收发器与3态输出

逻辑集成电路 光电二极管
文件: 总5页 (文件大小:44K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
April 1995  
Revised August 1999  
74FR2245  
Octal Bidirectional Transceiver with 3-STATE Outputs  
General Description  
Features  
The 74FR2245 contains eight non-inverting bidirectional  
buffers with 3-STATE outputs and is intended for bus-ori-  
ented applications. Current sinking capability is 64 mA on  
the A Port. The Transmit/Receive (T/R) input determines  
the direction of data flow through the bidirectional trans-  
ceiver. Transmit (active-HIGH) enables data from A Ports  
to B Ports; Receive (active-LOW) enables data from B  
Ports to A Ports. The Output Enable input, when HIGH, dis-  
ables both A and B Ports by placing them in a High Z con-  
dition.  
Non-inverting buffers  
Bidirectional data path  
Guaranteed pin-to-pin skew  
25series resistors in B outputs eliminate the need for  
external resistors  
3-STATE outputs drive bus lines or buffer memory  
address resistors  
Ordering Code:  
Order Number Package Number  
Package Description  
74FR2245SC  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” letter to the ordering code.  
Logic Symbol  
Connection Diagram  
Truth Table  
Pin Descriptions  
Inputs  
Output  
Pin Names  
Description  
OE  
L
T/R  
L
OE  
Output Enable Input (Active-LOW)  
Transmit/Receive Input  
Bus B Data to Bus A  
Bus A Data to Bus B  
High Z State  
T/R  
L
H
A0–A7  
B0–B7  
Side A Inputs or 3-STATE Outputs  
Side B Inputs or 3-STATE Outputs  
H
X
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
© 1999 Fairchild Semiconductor Corporation  
DS012114  
www.fairchildsemi.com  
Logic Diagram  
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2
Absolute Maximum Ratings(Note 1)  
Recommended Operating  
Conditions  
Storage Temperature  
65°C to +150°C  
Ambient Temperature under Bias  
Junction Temperature under Bias  
VCC Pin Potential to Ground Pin  
Input Voltage (Note 2)  
55°C to +125°C  
55°C to +150°C  
0.5V to +7.0V  
Free Air Ambient Temperature  
Supply Voltage  
0°C to +70°C  
+4.5V to +5.5V  
0.5V to +7.0V  
Input Current (Note 2)  
30 mA to +5.0 mA  
Voltage Applied to Output  
in HIGH State (with VCC = 0V)  
Standard Output  
0.5V to VCC  
Note 1: Absolute maximum ratings are values beyond which the device  
may be damaged or have its useful life impaired. Functional operation  
under these conditions is not implied.  
3-STATE Output  
0.5V to +5.5V  
Current Applied to Output  
in LOW State (Max)  
Note 2: Either voltage limit or current limit is sufficient to protect inputs.  
twice the rated IOL (mA)  
4000V  
ESD Last Passing Voltage (Min)  
DC Electrical Characteristics  
V
Symbol  
Parameter  
Input HIGH Voltage  
Min  
Typ  
Max  
Units  
Conditions  
CC  
V
V
V
V
2.0  
V
V
V
V
V
V
V
V
Recognized HIGH Signal  
Recognized LOW Signal  
IH  
Input LOW Voltage  
0.8  
IL  
Input Clamp Diode Voltage  
Output HIGH Voltage  
1.2  
Min  
Min  
Min  
Max  
Max  
Max  
I
I
I
I
I
I
= −18 mA  
CD  
OH  
IN  
2.4  
2.0  
= −3 mA (A , B )  
n n  
OH  
OH  
OL  
OL  
OL  
= −15 mA (A , B )  
n
n
V
Output LOW Voltage  
0.5  
= 1 mA (B )  
n
OL  
0.75  
0.55  
= 12 mA (B )  
n
= 64 mA (A )  
n
I
I
Input HIGH Current  
5
µA  
Max  
IH  
V
= 2.7V (OE, T/R)  
= 7.0V (OE, T/R)  
IN  
IN  
Input HIGH Current  
Breakdown Test  
BVI  
7
µA  
Max  
V
I
Input HIGH Current  
Breakdown Test (I/O)  
BVIT  
100  
µA  
Max  
V
V
= 5.5V (A , B )  
n n  
IN  
I
Input LOW Current  
Input Leakage Test  
250  
µA  
Max  
0.0  
IL  
= 0.5V (OE, T/R)  
= 1.9 µA  
IN  
V
4.75  
V
I
ID  
ID  
All Other Pins Grounded  
= 150 mV  
I
Output Circuit Leakage Current  
3.75  
µA  
0.0  
V
IOD  
OD  
All Other Pins Grounded  
I
I
I
I
I
I
I
I
+ I  
Output Leakage Current  
Output Leakage Current  
Output Short-Circuit Current  
Output HIGH Leakage Current  
Bus Drainage Test  
25  
150  
225  
50  
µA  
µA  
Max  
Max  
Max  
Max  
0.0  
V
V
V
V
V
= 2.7V (A , B )  
n n  
IH  
IL  
OZH  
OUT  
OUT  
OUT  
OUT  
OUT  
+ I  
= 0.5V (A , B )  
n n  
OZL  
100  
mA  
µA  
= 0.0V (A , B )  
n n  
OS  
= V (A , B )  
CEX  
ZZ  
CC  
n
n
100  
75  
µA  
= 5.25V (A , B )  
n
n
Power Supply Current  
Power Supply Current  
Power Supply Current  
55  
75  
55  
mA  
mA  
mA  
Max  
Max  
Max  
All Outputs HIGH  
All Outputs LOW  
Outputs 3-STATE  
CCH  
CCL  
CCZ  
110  
75  
C
Input Capacitance  
8.0  
pF  
pF  
5.0  
5.0  
IN  
OE, T/R  
17.0  
A , B  
n n  
3
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AC Electrical Characteristics  
T
= +25°C  
T = 0°C to +70°C  
A
A
V
= +5.0V  
= 50 pF  
Typ  
V
= +5.0V  
C = 50 pF  
L
CC  
CC  
Symbol  
Parameter  
Units  
C
L
Min  
1.0  
1.0  
2.5  
2.5  
1.7  
1.7  
Max  
4.4  
4.4  
7.5  
7.5  
6.5  
6.5  
Min  
1.0  
1.0  
2.5  
2.5  
1.7  
1.7  
Max  
t
Propagation Delay  
A to B or B to A  
n
4.4  
4.4  
7.5  
7.5  
6.5  
6.5  
PLH  
ns  
ns  
ns  
t
PHL  
n
n
n
t
Output Enable Time  
PZH  
t
PZL  
t
Output Disable Time  
PHZ  
t
PLZ  
Extended AC Electrical Characteristics  
Symbol  
Parameter  
T
= 0°C to +70°C  
T
= 0°C to +70°C  
Units  
A
A
V
= +5.0V  
= 50 pF  
V
= +5.0V  
CC  
CC  
C
C
= 250 pF  
L
L
Eight Outputs Switching  
(Note 3)  
(Note 4)  
Min  
1.0  
1.0  
2.5  
2.5  
1.3  
1.3  
Max  
7.0  
Min  
2.5  
2.5  
Max  
10.0  
10.0  
t
Propagation Delay  
to B or B to A  
n
PLH  
ns  
ns  
ns  
ns  
ns  
ns  
t
t
t
t
t
t
A
7.0  
PHL  
PZH  
PZL  
n
n
n
Output Enable Time  
10.0  
10.0  
6.5  
Output Disable Time  
PHZ  
PLZ  
6.5  
Pin-to-Pin Skew  
for HL Transitions  
Pin-to-Pin Skew  
for LH Transitions  
Pin-to-Pin Skew  
for HL/LH Transitions  
OSHL  
1.7  
1.0  
3.3  
(Note 5)  
t
OSLH  
(Note 5)  
t
OST  
(Note 5)  
Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase,  
i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc.  
Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load  
capacitors in the standard AC load. This specification pertains to single output switching only.  
Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi-  
cation applies to any outputs switching HIGH-to-LOW (t  
teed with all outputs switching in phase.  
), LOW-to-HIGH (t  
), or HIGH-to-LOW and/or LOW-to-HIGH (t  
). Specifications guaran-  
OST  
OSHL  
OSLH  
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4
Physical Dimensions inches (millimeters) unless otherwise noted  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
Package Number M20B  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
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5
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