74VCX16721MTD [FAIRCHILD]

Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs; 低电压20位D型触发器具有​​3.6V容限输入和输出
74VCX16721MTD
型号: 74VCX16721MTD
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs
低电压20位D型触发器具有​​3.6V容限输入和输出

触发器
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中文:  中文翻译
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March 1998  
Revised April 1999  
74VCX16721  
Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant  
Inputs and Outputs  
General Description  
The VCX16721 contains twenty non-inverting D-type flip-  
flops with 3-STATE outputs and is intended for bus oriented  
applications.  
Features  
1.8V–3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
tPD (CLK to On)  
The 74VCX16721 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O compatibility up to 3.6V.  
3.5 ns max for 3.0V to 3.6V VCC  
4.4 ns max for 2.3V to 2.7V VCC  
8.8 ns max for 1.65V to 1.95V VCC  
The 74VCX16721 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Power-off high impedance inputs and outputs  
Supports live insertion and withdrawal (Note 1)  
Static Drive (IOH/IOL  
)
±24 mA @ 3.0V VCC  
±18 mA @ 2.3V VCC  
±6 mA @ 1.65V VCC  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to V  
through a pull-up resistor; the minimum  
CC  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74VCX16721MTD  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
OE  
Description  
Output Enable Input (Active LOW)  
Clock Input  
CLK  
D0–D19  
O0–O19  
CE  
Inputs  
Outputs  
Clock Enable Input (Active LOW)  
© 1999 Fairchild Semiconductor Corporation  
DS500143.prf  
www.fairchildsemi.com  
Connection Diagram  
Truth Table  
D0–D19  
O0–O19  
CLK  
X
CE  
X
OE  
H
L
X
X
L
Z
O0  
L
X
H
L
L
L
L
H
X
H
L or H  
L
L
O0  
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial (HIGH or LOW, inputs may not float)  
Z = High Impedance  
O
= Previous O before LOW-to-HIGH transition of Clock  
0
0
= LOW-to-HIGH transition  
Functional Description  
The VCX16721 contains twenty D-type flip-flops with 3-  
STATE standard outputs. The twenty flip-flops will store the  
state of their individual D-type inputs that meet the setup  
and hold time requirements on the LOW-HIGH Clock (CLK)  
transition, when the Clock-Enable (CE) is LOW. The 3-  
STATE standard outputs are controlled by the Output-  
Enable (OE). When OE is HIGH, the standard outputs are  
in high impedance mode but this does not interfere with  
entering new data into the flip-flops.  
Logic Diagram  
www.fairchildsemi.com  
2
Absolute Maximum Ratings(Note 2)  
Recommended Operating  
Conditions (Note 4)  
Supply Voltage (VCC  
)
0.5V to +4.6V  
0.5V to +4.6V  
DC Input Voltage (VI)  
Power Supply  
Output Voltage (VO)  
Operating  
1.65V to 3.6V  
1.2V to 3.6V  
Outputs 3-STATE  
0.5V to +4.6V  
0.5V to VCC + 0.5V  
50 mA  
Data Retention Only  
Input Voltage  
Outputs Active (Note 3)  
DC Input Diode Current (IIK) VI < 0V  
0.3V to +3.6V  
Output Voltage (VO)  
Output in Active States  
Output in “OFF” State  
Output Current in IOH/IOL  
DC Output Diode Current (IOK  
)
0V to VCC  
VO < 0V  
50 mA  
+50 mA  
0.0V to 3.6V  
VO > VCC  
DC Output Source/Sink Current  
(IOH/IOL  
V
V
V
CC = 3.0V to 3.6V  
CC = 2.3V to 2.7V  
CC = 1.65V to 2.3V  
±24 mA  
±18 mA  
±6 mA  
)
±50 mA  
DC VCC or GND Current per  
Supply Pin (ICC or GND)  
±100 mA  
Free Air Operating Temperature  
(TA)  
Storage Temperature Range (TSTG  
)
65°C to +150°C  
40°C to +85°C  
Minimum Input Edge Rate (t/V)  
V
IN = 0.8V to 2.0V, VCC = 3.0V  
10 ns/V  
Note 2: The Absolute Maximum Ratings are those values beyond which  
the safety of the device cannot be guaranteed. The device should not be  
operated at these limits. The parametric values defined in the Electrical  
Characteristics tables are not guaranteed at the Absolute Maximum Rat-  
ings. The “Recommended Operating Conditions” table will define the condi-  
tions for actual device operation.  
Note 3: I Absolute Maximum Rating must be observed.  
O
Note 4: Floating or unused inputs must be held HIGH or LOW.  
DC Electrical Characteristics (2.7V < V 3.6V)  
CC  
V
CC  
Symbol  
Parameter  
Conditions  
Min  
Max  
Units  
(V)  
2.7 3.6  
2.7 3.6  
2.7 3.6  
2.7  
V
V
V
HIGH Level Input Voltage  
LOW Level Input Voltage  
HIGH Level Output Voltage  
2.0  
V
V
IH  
0.8  
IL  
I
I
I
I
I
I
I
I
= −100 µA  
= −12 mA  
= −18 mA  
= −24 mA  
= 100 µA  
= 12 mA  
V 0.2  
CC  
V
OH  
OH  
OH  
OH  
OH  
OL  
OL  
OL  
OL  
2.2  
2.4  
2.2  
V
3.0  
V
3.0  
V
V
LOW Level Output Voltage  
2.7 3.6  
2.7  
0.2  
0.4  
V
OL  
V
= 18 mA  
3.0  
0.4  
V
= 24 mA  
3.0  
0.55  
±5.0  
V
I
I
Input Leakage Current  
0 V 3.6V  
2.7 3.6  
µA  
I
I
3-STATE Output Leakage  
0 V 3.6V  
O
OZ  
2.7 3.6  
±10  
µA  
V = V or V  
IL  
I
IH  
I
I
Power-OFF Leakage Current  
Quiescent Supply Current  
0 (V , V ) 3.6V  
0
10  
20  
µA  
µA  
µA  
µA  
OFF  
CC  
I
O
V = V or GND  
2.7 3.6  
2.7 3.6  
2.7 3.6  
I
CC  
V
V
(V , V ) 3.6V (Note 5)  
±20  
750  
CC  
I
O
I  
Increase in I per Input  
= V 0.6V  
IH CC  
CC  
CC  
Note 5: Outputs disabled or 3-STATE only.  
3
www.fairchildsemi.com  
DC Electrical Characteristics (2.3V V 2.7V)  
CC  
V
(V)  
CC  
Symbol  
Parameter  
Conditions  
Min  
Max  
Units  
V
V
V
HIGH Level Input Voltage  
LOW Level Input Voltage  
HIGH Level Output Voltage  
2.3 2.7  
2.3 2.7  
2.3 2.7  
2.3  
1.6  
V
V
IH  
0.7  
IL  
I
= −100 µA  
= −6 mA  
= −12 mA  
= −18 mA  
= 100 µA  
= 12 mA  
= 18 mA  
V 0.2  
CC  
V
OH  
OH  
I
2.0  
1.8  
1.7  
V
OH  
I
2.3  
V
OH  
I
2.3  
V
OH  
V
LOW Level Output Voltage  
I
2.3 2.7  
2.3  
0.2  
0.4  
V
OL  
OL  
I
V
OL  
I
2.3  
0.6  
V
OL  
I
I
Input Leakage Current  
0 V 3.6V  
2.3 2.7  
±5.0  
µA  
I
I
3-STATE Output Leakage  
0 V 3.6V  
O
OZ  
2.3 2.7  
±10  
µA  
V = V or V  
IL  
I
IH  
I
I
Power-OFF Leakage Current  
Quiescent Supply Current  
0 (V , V ) 3.6V  
0
10  
20  
µA  
µA  
µA  
OFF  
CC  
I
O
V = V or GND  
2.3 2.7  
2.3 2.7  
I
CC  
V
(V , V ) 3.6V (Note 6)  
±20  
CC  
I
O
Note 6: Outputs disabled or 3-STATE only.  
DC Electrical Characteristics (1.65V V < 2.3V)  
CC  
V
(V)  
CC  
Symbol  
Parameter  
Conditions  
Min  
Max  
Units  
V
V
V
HIGH Level Input Voltage  
LOW Level Input Voltage  
HIGH Level Output Voltage  
1.65 - 2.3 0.65 × V  
V
V
IH  
CC  
1.65 - 2.3  
0.35 × V  
IL  
CC  
I
= −100 µA  
= −6 mA  
= 100 µA  
= 6 mA  
1.65 - 2.3  
1.65  
V 0.2  
CC  
V
OH  
OH  
I
1.25  
V
OH  
V
LOW Level Output Voltage  
I
1.65 - 2.3  
1.65  
0.2  
0.3  
V
OL  
OL  
I
V
OL  
I
I
Input Leakage Current  
0 V 3.6V  
1.65 - 2.3  
±5.0  
µA  
I
I
3-STATE Output Leakage  
0 V 3.6V  
O
OZ  
1.65 - 2.3  
±10  
µA  
V = V or V  
IL  
I
IH  
I
I
Power-OFF Leakage Current  
Quiescent Supply Current  
0 (V , V ) 3.6V  
0
10  
20  
µA  
µA  
µA  
OFF  
CC  
I
O
V = V or GND  
1.65 - 2.3  
1.65 - 2.3  
I
CC  
V
(V , V ) 3.6V (Note 7)  
±20  
CC  
I
O
Note 7: Outputs disabled or 3-STATE only.  
www.fairchildsemi.com  
4
AC Electrical Characteristics (Note 8)  
T
= −40°C to +85°C, C = 30 pF, R = 500Ω  
A
L
L
Symbol  
Parameter  
V
= 3.3V ± 0.3V  
V
= 2.5V ± 0.2V  
V = 1.8V ± 0.15V  
CC  
Units  
CC  
CC  
Min  
250  
0.8  
0.8  
0.8  
1.5  
1.0  
1.5  
Max  
Min  
200  
1.0  
1.0  
1.0  
1.5  
1.0  
1.5  
Max  
Min  
100  
1.5  
1.5  
1.5  
2.5  
1.0  
4.0  
Max  
f
t
t
t
t
t
t
t
t
Maximum Clock Frequency  
MHz  
ns  
MAX  
, t  
Prop Delay CLK to O  
Output Enable Time  
Output Disable Time  
Setup Time  
3.5  
3.8  
3.7  
4.4  
4.9  
4.2  
8.8  
9.8  
7.6  
PHL PLH  
n
, t  
ns  
PZL PZH  
, t  
ns  
PLZ PHZ  
ns  
S
Hold Time  
ns  
H
Pulse Width  
ns  
W
Output to Output Skew  
(Note 9)  
OSHL  
OSLH  
0.5  
0.5  
0.75  
ns  
Note 8: For C = 50 F, add approximately 300 ps to the AC maximum specification.  
L
P
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The  
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t  
) or LOW-to-HIGH (t  
).  
OSLH  
OSHL  
Dynamic Switching Characteristics  
T
= +25°C  
V
(V)  
A
CC  
Symbol  
Parameter  
Conditions  
= 30 pF, V = V , V = 0V  
Units  
Typical  
0.25  
0.6  
V
V
V
Quiet Output Dynamic Peak V  
C
C
C
1.8  
2.5  
3.3  
1.8  
2.5  
3.3  
1.8  
2.5  
3.3  
OLP  
OL  
L
L
L
IH  
CC  
IL  
V
0.8  
Quiet Output Dynamic Valley V  
Quiet Output Dynamic Valley V  
= 30 pF, V = V , V = 0V  
0.25  
0.6  
0.8  
1.5  
OLV  
OL  
IH  
CC  
IL  
V
V
= 30 pF, V = V , V = 0V  
OHV  
OH  
IH  
CC  
IL  
1.9  
2.2  
Capacitance  
T
= +25°C  
A
Symbol  
Parameter  
Conditions  
= 1.8V, 2.5V or 3.3V, V = 0V or V  
CC  
Units  
Typical  
C
Input Capacitance  
Output Capacitance  
Power Dissipation Capacitance  
V
6
7
pF  
pF  
pF  
IN  
CC  
I
C
C
V = 0V or V , V = 1.8V, 2.5V or 3.3V  
I CC CC  
OUT  
PD  
V = 0V or V , f = 10 MHz,  
20  
I
CC  
V
= 1.8V, 2.5V or 3.3V  
CC  
5
www.fairchildsemi.com  
AC Loading and Waveforms  
TEST  
SWITCH  
tPLH, tPHL  
Open  
tPZL, tPLZ  
6V at VCC = 3.3 ± 0.3V;  
VCC x 2 at VCC = 2.5 ± 0.2V; 1.8V ± 0.15V  
tPZH, tPHZ  
GND  
FIGURE 1. AC Test Circuit  
FIGURE 2. Waveform for Inverting and  
Non-Inverting Functions  
FIGURE 3. 3-STATE Output High Enable and  
Disable Times for Low Voltage Logic  
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic  
FIGURE 5. Propagation Delay, Pulse Width and  
FIGURE 6. Setup Time, Hold Time and  
Recovery Time for Low Voltage Logic  
trec Waveforms  
VCC  
Symbol  
3.3V ± 0.3V  
1.5V  
2.5V ± 0.2V  
VCC/2  
1.8V ± 0.15V  
VCC/2  
Vmi  
Vmo  
VX  
1.5V  
VCC/2  
VCC/2  
V
OL + 0.3V  
V
OL + 0.15V  
V
OL + 0.15V  
VY  
V
OH 0.3V  
V
OH 0.15V  
VOH 0.15V  
www.fairchildsemi.com  
6
Physical Dimensions inches (millimeters) unless otherwise noted  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Package Number MTD56  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.  

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