74VHCT373MTCX [FAIRCHILD]
Bus Driver, AHCT/VHCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, PLASTIC, TSSOP-20;
| 型号： | 74VHCT373MTCX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Bus Driver, AHCT/VHCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, PLASTIC, TSSOP-20 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总10页 (文件大小：158K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
January 1998
74VHC373 • 74VHCT373
Octal D-Type Latch with 3-STATE Outputs
General Description
Features
n High Speed:
The VHC/VHCT373 is an advanced high speed CMOS octal
D-type latch with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining
the CMOS low power dissipation. This 8-bit D-type latch is
controlled by a latch enable input (LE) and an output enable
input (OE). The latches appear transparent to data when
latch enable (LE) is HIGH. When LE is low, the data that
meets the setup time is latched. When the OE input is high,
the eight outputs are in a high impedance state.
=
=
=
=
@
@
VHC tpd 5.0 ns (typ) VCC 5V
VHCT tpd 5.1 ns (typ) VCC 5V
n High Noise Immunity:
=
=
VHC VNIH VNIL 28% VCC (Min)
=
=
VHCT VIH 2.0V, VIL 0.8V
n Power Down Protection:
VHC Inputs Only
VHCT Inputs and Outputs
n Low Noise:
=
VHC VOLP 0.6V (typ)
An input protection circuit ensures that 0V–7V can be ap-
plied to the input pins without regard to the supply voltage.
This device can be used to interface 5V to 3V systems and
two supply systems such as battery back up. This circuit pre-
vents device destruction due to mismatched supply and in-
put voltages.
=
VHCT VOLP 0.8V (typ)
n Low Power Dissipation:
=
=
@
ICC 4 µA (Max) Ta 25˚C
n Pin and Function Compatible with 74HC/HCT373
Ordering Code:
Commercial
74VHC373M
Package Number
M20B
Package Description
20-Lead Molded JEDEC SOIC
20-Lead Molded EIAJ SOIC
20-Lead Molded JEDEC Type 1 TSSOP
20-Lead Molded DIP
74VHC373SJ
74VHC373MTC
74VHC373N
M20D
MTC20
N20A
74VHCT373M
74VHCT373SJ
74VHCT373MTC
74VHCT373N
M20B
20-Lead Molded JEDEC SOIC
20-Lead Molded EIAJ SOIC
20-Lead Molded JEDEC Type 1 TSSOP
20-Lead Molded DIP
M20D
MTC20
N20A
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Assignment for
DIP,TSSOP and SOIC
DS011555-1
DS011555-2
© 1998 Fairchild Semiconductor Corporation
DS011555
www.fairchildsemi.com
Pin Descriptions
Truth Table
Pin
Description
Inputs
Outputs
Names
LE
X
OE
H
L
Dn
X
On
Z
D0–D7
LE
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Outputs
H
H
L
L
L
OE
L
H
X
H
O0–O7
L
O0
=
=
=
=
H
L
Z
X
O
HIGH Voltage Level
LOW Voltage Level
High Impedance
Immaterial
=
Previous O before HIGH to Low transition of Latch Enable
0
0
Functional Description
The VHC/VHCT373 contains eight D-type latches with
3-STATE standard outputs. When the Latch Enable (LE) in-
put is HIGH, data on the Dn inputs enters the latches. In this
condition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW, the latches store the information that was present on
the D inputs a setup time preceding the HIGH-to-LOW tran-
sition of LE. The 3-STATE standard outputs are controlled by
the Output Enable (OE) input. When OE is LOW, the stan-
dard outputs are in the 2-state mode. When OE is HIGH, the
standard outputs are in the high impedance mode but this
does not interfere with entering new data into the latches.
Logic Diagram
DS011555-3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC
)
−0.5V to + 7.0V
−0.5V to + 7.0V
DC Input Voltage (VIN
)
Supply Voltage (VCC
)
DC Output Voltage (VOUT
VHC
)
VHC
2.0V to + 5.5V
4.5V to + 5.5V
0V to + 5.5V
0V to VCC
−0.5V to VCC + 0.5V
−0.5V to +7.0V
−20 mA
VHCT
VHCT (Note 2)
Input Voltage (VIN
)
Input Diode Current (IIK
)
Output Voltage (VOUT
)
±
Output Diode Current (VHC)
(VHCT)
20 mA
−20 mA
Operating Temperature (TOPR
)
VHC/VHCT
−40˚C to +85˚C
±
±
DC Output Current (IOUT
)
25 mA
75 mA
Input Rise and Fall Time (tr, tf)
DC VCC/GND Current (ICC
)
=
±
z
100 ns/V
VCC 3.3V 0.3V (VHC only)
0
Storage Temperature (TSTG
Lead Temperature (TL)
(Soldering, 10 sec)
)
−65˚C to +150˚C
=
±
z
20 ns/V
VCC 5.0 0.5V
0
Note 1: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifications
should be met, without exception, to ensure that the system design is reliable
over its power supply, temperature, and output/input loading variables. Fair-
child does not recommend operation outside databook specifications.
260˚C
>
Note 2:
V
OUT
V
CC
only if output is in H or Z state.
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics for VHC
=
=
TA +25˚C
TA −40˚C
VCC
(V)
Symbol
VIH
Parameter
to +85˚C
Units
Conditions
Min
1.50
Typ
Max
Min
Max
High Level Input
Voltage
2.0
3.0−5.5
2.0
1.50
V
V
0.7 VCC
0.7 VCC
VIL
Low Level Input
Voltage
0.50
0.50
3.0−5.5
2.0
0.3 VCC
0.3 VCC
=
=
IOH −50 µA
VOH
High Level Output
Voltage
1.9
2.9
2.0
3.0
4.5
1.9
2.9
VIN VIH
3.0
V
V
or VIL
4.5
4.4
4.4
=
IOH −4 mA
3.0
2.58
3.94
2.48
3.80
=
IOH −8 mA
4.5
=
=
IOL 50 µA
VOL
Low Level Output
Voltage
2.0
0.0
0.0
0.0
0.1
0.1
0.1
0.1
VIN VIH
3.0
V
V
or VIL
4.5
0.1
0.1
=
IOL 4 mA
3.0
0.36
0.36
0.44
0.44
=
IOL 8 mA
4.5
=
±
±
IOZ
IIN
3-STATE Output
Off-State Current
5.5
0.25
2.5
µA
µA
µA
VIN VIH or VIL
=
VOUT VCC or GND
=
±
±
Input Leakage
Current
0−5.5
5.5
0.1
4.0
1.0
VIN 5.5 or GND
=
ICC
Quiescent Supply
Current
40.0
VIN VCC or GND
Noise Characteristics for VHC
VCC
(V)
=
Symbol
Parameter
TA +25˚C
Units
Conditions
Typ Limits
=
CL 50 pF
VOLP (Note 4)
VOLV (Note 4)
VIHD (Note 4)
VILD (Note 4)
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
5.0
5.0
5.0
5.0
0.6
0.9
−0.9
3.5
V
V
V
V
=
CL 50 pF
−0.6
=
CL 50 pF
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
=
1.5
CL 50 pF
Note 4: Parameter guaranteed by design.
3
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DC Electrical Characteristics for VHCT
=
=
TA +25˚C
TA −40˚C
VCC
(V)
Symbol
Parameter
Units
Conditions
to +85˚C
Min
2.0
2.0
Typ
Max
Min
Max
VIH
VIL
High Level Input Voltage
Low Level Input Voltage
4.5
5.5
4.5
5.5
4.5
4.5
4.5
4.5
5.5
2.0
2.0
V
V
0.8
0.8
0.8
0.8
= =
VIN VIH IOH −50 µA
VOH
VOL
IOZ
High Level Output Voltage
Low Level Output Voltage
3-STATE Output Off-State Current
3.15
2.5
3.65
0.0
3.15
2.4
V
V
=
or VIL IOH −8 mA
= =
VIN VIH IOL 50 µA
0.1
0.1
V
=
or VIL IOL 8 mA
0.36
0.44
V
=
VIN VIH or VIL
±
±
0.25
2.5
µA
=
VOUT VCC or GND
=
±
±
IIN
Input Leakage Current
Quiescent Supply Current
Maximum ICC/Input
0–5.5
5.5
0.1
1.0
µA
µA
VIN 5.5V or GND
=
VIN VCC or GND
ICC
ICCT
4.0
40.0
1.50
=
5.5
1.35
+0.5
mA
VIN 3.4V
=
Other Inputs VCC or GND
=
IOFF
Output Leakage Current (Power
Down State)
0.0
+0.5
µA
VOUT 5.5V
Noise Characteristics for VHCT
VCC
(V)
=
Symbol
Parameter
TA +25˚C
Units
Conditions
Typ
Limits
1.2
=
CL 50 pF
VOLP (Note 5)
VOLV (Note 5)
VIHD (Note 5)
VILD (Note 5)
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
5.0
5.0
5.0
5.0
0.8
V
V
V
V
=
CL 50 pF
−0.8
−1.2
2.0
=
CL 50 pF
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
=
CL 50 pF
0.8
Note 5: Parameter guaranteed by design.
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4
AC Electrical Characteristics for VHC
=
=
TA +25˚C
TA −40˚C
VCC
(V)
Symbol
Parameter
Units
Conditions
to +85˚C
Min
Typ
7.0
9.5
4.9
6.4
7.3
9.8
5.0
6.5
7.3
9.8
5.5
7.0
9.5
6.5
Max
11.0
14.5
7.2
Min
Max
13.0
16.5
8.5
=
CL 15 pF
±
tPLH
tPHL
Propagation Delay
Time (LE to On)
3.3 0.3
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
ns
ns
ns
=
CL 50 pF
=
±
5.0 0.5
CL 15 pF
=
9.2
10.5
13.5
17.0
8.5
CL 50 pF
=
±
tPLH
tPHL
Propagation Delay
Time (D to On)
3.3 0.3
11.4
14.9
7.2
CL 15 pF
=
CL 50 pF
=
±
5.0 0.5
CL 15 pF
=
9.2
10.5
13.5
17.0
9.5
CL 50 pF
=
=
±
tPZL
tPZH
3-STATE
Output
3.3 0.3
11.4
14.9
8.1
ns
ns
ns
ns
RL 1 kΩ
CL 15 pF
=
CL 50 pF
=
±
Enable Time
5.0 0.5
CL 15 pF
=
10.1
13.2
9.2
11.5
15.0
10.5
1.5
CL 50 pF
=
=
±
tPLZ
3-STATE Output
Disable Time
3.3 0.3
RL 1 kΩ
CL 50 pF
=
±
tPHZ
tOSLH
tOSHL
CIN
5.0 0.5
CL 50 pF
=
±
Output to Output
Skew
3.3 0.3
1.5
(Note 6)
CL 50 pF
=
±
5.0 0.5
1.0
1.0
CL 50 pF
=
VCC Open
Input Capacitance
Output Capacitance
4
6
10
10
pF
pF
pF
=
COUT
CPD
VCC 5.0V
Power Dissipation
Capacitance
27
(Note 7)
=
=
|t
PHL max
Note 6: Parameter guaranteed by design. t
|t
PLH max
− t
|; t
− t min|
PHL
OSLH
PLH min
OSHL
Note 7:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average oper-
=
ating current can be obtained by the equation: I (opr.)
C
• V
• f + I /8 (per Latch). The total C when n pcs. of the Latch operates can be calculated
CC
PD
CC IN CC PD
=
by the equation: C (total) 14 + 13n.
PD
AC Operating Requirements for VHC
=
=
TA +25˚C
TA −40˚C
VCC
(V)
Symbol
Parameter
Units
to +85˚C
Min
5.0
5.0
4.0
4.0
1.0
1.0
Typ
Max
Min
5.0
5.0
4.0
4.0
1.0
1.0
Max
±
tW(H)
Minimum Pulse
Width (LE)
3.3 0.3
ns
ns
ns
±
5.0 0.5
±
3.3 0.3
tS
Minimum Set-Up
Time
±
5.0 0.5
±
3.3 0.3
tH
Minimum Hold
Time
±
5.0 0.5
5
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AC Electrical Characteristics for VHCT
=
=
TA +25˚C
TA −40˚C
VCC
(V)
Symbol
Parameter
Units
Conditions
to +85˚C
Min
Typ
7.7
8.5
5.1
5.9
6.3
7.1
6.8
Max
12.3
13.3
8.5
Min
Max
13.5
14.5
9.5
=
CL 15 pF
±
tPLH
tPHL
tPLH
tPHL
tPZL
tPZH
tPLZ
tPHZ
tOSLH
Propagation Delay
Time (LE to On)
5.0 0.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
ns
ns
ns
ns
=
CL 50 pF
=
±
Propagation Delay
Time (D to On)
5.0 0.5
CL 15 pF
=
9.5
10.5
12.5
13.5
12.0
CL 50 pF
=
=
±
3-STATE Output
Enable Time
5.0 0.5
10.9
11.9
11.2
RL 1 kΩ
CL 15 pF
=
CL 50 pF
=
=
±
3-STATE Output
Disable Time
5.0 0.5
RL 1 kΩ
CL 50 pF
±
Output to Output
Skew
5.0 0.5
1.0
10
1.0
10
(Note 9)
tOSHL
CIN
=
VCC Open
Input Capacitance
Output Capacitance
4
9
pF
pF
pF
=
COUT
CPD
VCC 5.0V
Power Dissipation
Capacitance
27
(Note 9)
=
=
|t
PHL max
Note 8: Parameter guaranteed by design. t
|t
max − t
|; t
− t
|
PHL min
OSLH
PLH
PLH min
OSHL
Note 9:
C
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average oper-
PD
=
ating current can be obtained by the equation: I
(opr.)
C
• V • f + I /8 (per F/F).
CC IN CC
CC
PD
AC Operating Requirements for VHCT
=
=
TA +25˚C
TA −40˚C
VCC
(V)
Symbol
Parameter
Units
to +85˚C
Min
6.5
1.5
3.5
Typ
Max
Min
Max
±
tW(H)
Minimum Pulse Width (LE)
Minimum Set-Up Time
Minimum Hold Time
5.0 0.5
6.5
1.5
3.5
ns
ns
ns
±
5.0 0.5
tS
tH
±
5.0 0.5
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6
7
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit—JEDEC SOIC (M)
Package Number M20B
20-Lead Plastic EIAJ SOIC (SJ)
Package Number M20D
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic JEDEC TSSOP Type I (MTC)
Package Number MTC20
9
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead (0.300" Wide) Molded Dual-in-Line Package
Package Number N20A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI-
CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
Fairchild Semiconductor
Corporation
Fairchild Semiconductor
Europe
Fairchild Semiconductor
Hong Kong Ltd.
National Semiconductor
Japan Ltd.
Americas
Customer Response Center
Tel: 1-888-522-5372
Fax: +49 (0) 1 80-530 85 86
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Tel: +39 (0) 2 57 5631
Tel: +852 2737-7200
Fax: +852 2314-0061
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
相关型号：
74VHCT373SJ
IC AHCT/VHCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, EIAJ TYPE2, PLASTIC, SOIC-20, Bus Driver/Transceiver
NSC
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