FAN2108_技术文档

September 2008

FAN2108 — TinyBuck™

3-24V Input, 8A, High-Efficiency, Integrated Synchronous

Buck Regulator

Features

Description

The FAN2108 TinyBuck™ is a highly efficient, small

footprint, 8A, synchronous buck regulator.

Wide Input Voltage Range: 3V-24V

Wide Output Voltage Range: 0.8V to 80% V_IN

8A Output Current

The FAN2108 contains both synchronous MOSFETs

and a controller/driver with optimized interconnects in

one package, which enables designers to solve high-

current requirements in a small area with minimal

external components.

Programmable Frequency Operation: 200KHz to

600KHz

Over 95% Peak Efficiency

External compensation, programmable switching

frequency, and current limit features allow design

optimization and flexibility.

Integrated Schottky Diode on Low-side MOSFET

Boosts Efficiency

Internal Bootstrap diode

The summing current mode modulator uses lossless

current sensing for current feedback and over-current

protection. Voltage feedforward helps operation over a

wide input voltage range.

Power-Good Signal

Pre-Bias Startup

Accepts Ceramic Capacitors on Output

External Compensation for Flexible Design

Input Under-Voltage Lockout

Programmable Current Limit

Fairchild’s advanced BiCMOS power process,

combined with low-R_DS(ON)internal MOSFETs and a

thermally efficient MLP package, provide the ability to

dissipate high power in a small package.

Under-Voltage, Over-Voltage, and Thermal

Shutdown Protections

Output over-voltage, under-voltage, and thermal

shutdown protections help protect the device from

damage during fault conditions. FAN2108 prevents pre-

biased output discharge during startup in point-of-load

applications.

Internal Soft-Start

5x6mm, 25-Pin, 3-Pad MLP Package

Applications

Servers

Point-of-Load Regulation

High-End Computing Systems

Graphics Cards

Battery-Powered Equipment

Set-Top Boxes

Ordering Information

Operating

Part Number Temperature Range

Eco

Status

Packing

Method

Package

FAN2108MPX

-10°C to 85°C

-40°C to 85°C

Molded Leadless Package (MLP) 5x6mm

Green

Tape and Reel

FAN2108EMPX

For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.

FAN2108 • Rev. 1.0.0

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Typical Application

Figure 1. Typical Application Diagram

Block Diagram

Figure 2. Block Diagram

FAN2108 • Rev. 1.0.0

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2

Pin Configuration

Figure 3. MLP 5x6mm Pin Configuration (Bottom View)

Pin Definitions

Pin #

P1, 6-12

P2, 2-5

Name Description

SW

VIN

Switching Node.

Power Input Voltage. Connect to the main input power source.

P3, 21-23

PGND Power Ground. Power return and Q2 source.

High-Side Drive BOOT Voltage. Connect through capacitor (C_BOOT) to SW. The IC

1

BOOT

PGOOD

EN

includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to

_CCwhen SW is LOW.

V

Power-Good Flag. An open-drain output that pulls LOW when FB is outside a ±10% range

of the reference. PGOOD does not assert HIGH until the fault latch is enabled.

13

14

ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the

regulator after a latched fault condition. This input has an internal pull-up when the IC is

functioning normally. When a latched fault occurs, EN is discharged by a current sink.

15

16

VCC

Input Bias Supply for IC. The IC’s logic and analog circuitry are powered from this pin.

Analog Ground. The signal ground for the IC. All internal control voltages are referred to

this pin. Tie this pin to the ground island/plane through the lowest impedance connection.

AGND

Current Limit. A resistor (R_ILIM) from this pin to AGND can be used to program the current-

limit trip threshold lower than the default setting.

17

ILIM

Oscillator Frequency. A resistor (R_T) from this pin to AGND sets the PWM switching

frequency.

18

19

20

24

25

R(T)

FB

Output Voltage Feedback. Connect through a resistor divider to the output voltage.

Compensation. Error amplifier output. Connect the external compensation network

between this pin and FB.

COMP

NC

No Connect. This pin is not used.

Ramp Amplitude. A resistor (R_RAMP) connected from this pin to V_INsets the ramp amplitude

and provides voltage feedforward functionality.

RAMP

FAN2108 • Rev. 1.0.0

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3

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device

reliability. The absolute maximum ratings are stress ratings only.

Parameter

VIN to PGND

VCC to AGND

BOOT to PGND

BOOT to SW

Conditions

Min.

Max.

28

Unit

V

AGND=PGND

Continuous

6

V

35

V

-0.3

-0.5

-5

6.0

V

24.0

30

V

SW to PGND

All other pins

ESD

Transient (t < 20ns, f < 600KHz)

V

-0.3

2

V_CC+0.3

V

Human Body Model, JEDEC JESD22-A114

Charged Device Model, JEDEC JESD22-C101

kV

2.5

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to absolute maximum ratings.

Symbol

V_CC

Parameter

Bias Voltage

Conditions

VCC to AGND

Min.

4.5

3

Typ.

Max.

5.5

Unit

V

5.0

V_IN

Supply Voltage

VIN to PGND

FAN2108MPX

FAN2108EMPX

24

V

-10

-40

+85

+125

600

°C

kHz

T_A

Ambient Temperature

T_J

f

Junction Temperature

Switching Frequency

Thermal Information

Symbol

Parameter

Min.

Typ.

Max.

+150

+300

+215

+220

Unit

°C

T_STG

T_L

Storage Temperature

-65

Lead Soldering Temperature, 10 Seconds

Vapor Phase, 60 Seconds

°C

T_VP

T_I

°C

Infrared, 15 Seconds

°C

P1 (Q2)

P2 (Q1)

P3

4

7

°C/W

W

Thermal Resistance: Junction-to-Case

θ_JC

4

Thermal Resistance: Junction-to-Mounting Surface⁽¹⁾

Power Dissipation, T_A=25°C⁽¹⁾

35

θ_J-PCB

P_D

2.8

Note:

1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 24. Actual results

are dependent on mounting method and surface related to the design.

FAN2108 • Rev. 1.0.0

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4

Electrical Specifications

Electrical specifications are the result of using the circuit shown in Figure 1 unless otherwise noted.

Symbol

Parameter

Conditions

Min. Typ. Max. Unit

Power Supplies

SW=Open, FB=0.7V, V_CC=5V,

8

12

mA

f

_SW=600KHz

I_CC

V_CCCurrent

Shutdown: EN=0, V_CC=5V

Rising V_CC

7

10

µA

V

4.1

4.3

300

4.5

V_UVLO

V_CCUVLO Threshold

Hysteresis

mV

Oscillator

255

540

300

600

50

345

660

65

KHz

ns

R_T=50KΩ

R_T=24KΩ

f

Frequency

t_ON

Minimum On-Time⁽²⁾

16V_IN, 1.8V_OUT, R_T=30KΩ,

V_RAMP

Ramp Amplitude, peak-to–peak

Minimum Off-Time⁽²⁾

0.53

100

V

R_RAMP=200KΩ

t_OFF

150

ns

Reference

FAN2108MPX, 25°C

FAN2108EMPX, 25°C

794

795

800 806

800 805

mV

Reference Voltage (see Figure 4 for

Temperature Coefficient)

V_FB

Error Amplifier

G

DC Gain⁽²⁾

Gain Bandwidth Product⁽²⁾

80

12

85

15

dB

MHz

V

_CC=5V

BW

V_COMP

I_SINK

Output Voltage

0.4

1.5

0.8

3.2

2.2

1.2

Output Current, Sourcing

V_CC=5V, V_COMP=2.2V

V_CC=5V, V_COMP=1.2V

V_FB=0.8V, 25°C

mA

nA

I_SOURCEOutput Current, Sinking

I_BIASFB Bias Current

Protection and Shutdown

-850 -650 -450

R_ILIMOpen at 25°C (see Circuit

Description)

I_LIM

Current Limit

12

15

18

-9

A

I_ILIM

T_TSD

T_HYS

V_OVP

V_UVLO

V_FLT

I_LIMCurrent

-11

-10

+155

+30

µA

°C

Over-Temperature Shutdown

Over-Temperature Hysteresis

Over-Voltage Threshold

Under-Voltage Shutdown

Fault Discharge Threshold

Internal IC Temperature

Two Consecutive Clock Cycles

16 Consecutive Clock Cycles

Measured at FB Pin

110

68

115 121 %V_OUT

73

78 %V_OUT

250

mV

V_{FLT_HYS}Fault Discharge Hysteresis

Measured at FB Pin (V_FB~500mV)

Soft-Start

t_SS

t_EN

V_OUTto Regulation (T0.8)

Fault Enable/SSOK (T1.0)

5.3

6.7

ms

Frequency=600KHz

Note:

2. Specifications guaranteed by design and characterization; not production tested.

www.fairchildsemi.com

FAN2108 • Rev. 1.0.0

5

Electrical Specifications (Continued)

Recommended operating conditions are the result of using the circuit shown in Figure 1 unless otherwise noted.

Symbol

Parameter

Conditions

Min. Typ. Max. Unit

Control Functions

V_{EN_R}

EN Threshold, Rising

1.35 2.00

V

V_{EN_HYS}EN Hysteresis

250

800

1

mV

KΩ

µA

Ω

R_EN

I_EN

EN Pull-Up Resistance

EN Discharge Current

Auto-Restart Mode

R_FB

FB OK Drive Resistance

800

FB < V_REF

FB > V_REF

I_OUT< 2mA

-14

+7

-11

-8

V_PG

PGOOD Threshold

PGOOD Output Low

%V_REF

V

+10 +13.5

0.4

V_{PG_L}

FAN2108 • Rev. 1.0.0

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6

Typical Characteristics

1.010

1.005

1.000

0.995

0.990

1.20

1.10

1.00

0.90

0.80

-50

0

50

100

150

-50

0

50

100

150

Temperature (^oC)

Figure 4. Reference Voltage (V_FB

)

Figure 5. Reference Bias Current (I_FB

)

vs. Temperature, Normalized

1500

1200

900

600

300

0

1.02

1.01

1.00

0.99

0.98

600KHz

300KHz

-50

0

50

100

150

0

20

40

60

80

100

120

140

Temperature (^oC)

R_T(K )

Ω

Figure 6. Frequency vs. R_T

Figure 7. Frequency vs. Temperature, Normalized

1.4

1.2

1

1.04

1.02

1.00

0.98

0.96

Q1 ~0.32%/°C

Q2 ~0.35%/°C

0.8

0.6

-50

0

50

100

150

0

50

100

150

Temperature (^oC)

Temperature (°C)

Figure 9. ILIM Current (I_ILIM) vs. Temperature,

Normalized

Figure 8. R_DSvs. Temperature, Normalized

(V_CC=V_GS=5V)

FAN2108 • Rev. 1.0.0

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7

Application Circuit

Figure 10. Application Circuit: 1.8V_OUT, 500KHz

Typical Performance Characteristics

Typical operating characteristics using the circuit shown in Figure 10. V_IN=12V, V_CC=5V, unless otherwise specified.

Efficiency @ Vo=1.8V, fsw=500KHz, Ta=25⁰C

Efficiency @ Vo=3.3V, fsw=300KHz, Ta=25⁰C

100

95

90

85

80

75

70

95

90

85

80

75

70

Vin=5V

Vin=8V

Vin=10V

Vin=12V

Vin=14V

Vin=20V

Vin=12V

Vin=16V

Vin=20V

Vin=24V

0

2

4

6

8

0

2

4

6

8

Load Current (A)

Figure 11. 1.8V_OUTEfficiency Over V_INvs. Load

Figure 12. 3.3V_OUTEfficiency Over V_INvs. Load

Efficiency@ Vin=12V, Vo=1.8V

Load Regulation @ Vo=0.8V, 500kHz, 25°C

0.8012

Vin=8V

95

90

85

0.801

Vin=12V

0.8008

Vin=16V

0.8006

0.8004

0.8002

0.8

Vin=20V

Vin=24V

300KHz

500KHz

600KHz

80

75

70

0.7998

0.7996

0.7994

0.7992

0

1

2

3

4

5

6

7

8

0

1

2

3

4

5

6

7

8

Load Current (A)

Figure 13. 1.8V_OUTEfficiency Over Frequency

vs. Load

Figure 14. 0.8V_OUTLoad Regulation Over V_IN

vs. Load

FAN2108 • Rev. 1.0.0

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8

Typical Performance Characteristics (Continued)

Typical operating characteristics using the circuit shown in Figure 10. V_IN=12V, V_CC=5V, unless otherwise specified.

V_OUT

SW

PGOOD

EN

Figure 15. Startup, 3A Load

Figure 16. Startup with 1V Pre-Bias on V_out

SW

EN

V_OUT

PGOOD

EN

Figure 17. Shutdown, 1A Load

Figure 18. Restart on Fault

HS and LS MOSFET Temperature

90

V_OUT

LSFET@ 20Vin

80

LSFET@ 12Vin

HSFET@ 20Vin

70

HSFET@ 12Vin

60

50

40

30

20

I_OUT

0

2

4

6

8

Load Current (A)

Figure 20. MOSFET Temperature – Still Air at Room

Temperature

Figure 19. Transient Response, 2-8A Load

FAN2108 • Rev. 1.0.0

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9

Circuit Description

Initialization

Soft-Start

Once V_CCexceeds the UVLO threshold and EN is

HIGH, the IC checks for an open or shorted FB pin

before releasing the internal soft-start ramp (SS).

Once internal SS ramp has charged to 0.8V (T0.8), the

output voltage is in regulation. Until SS ramp reaches

1.0V (T1.0), the fault latch is inhibited.

If R1 is open (Figure 1), the error amplifier output

(COMP) is forced LOW and no pulses are generated.

After the SS ramp times out (T1.0), an under-voltage

latched fault occurs.

To avoid skipping the soft-start cycle, it is necessary to

apply V_INbefore V_CCreaches its UVLO threshold.

Soft-start time is a function of oscillator frequency.

If the parallel combination of R1 and R_BIASis ≤ 1KΩ, the

internal SS ramp is not released and the regulator does

not start.

1.35V

EN

2400 CLKs

0.8V

Bias Supply

FB

The FAN2108 requires a 5V supply rail to bias the IC

and provide gate-drive energy. Connect a ≥ 1.0µf X5R

or X7R decoupling capacitor between VCC and PGND.

Fault

Latch

Enable

1.0V

0.8V

Since V_CCis used to drive the internal MOSFET gates,

supply current is frequency and voltage dependent.

Approximate V_CCcurrent (I_CC) is calculated by:

SS

3200 CLKs

4000 CLKs

V_CC− 5

I_CC

= 4.58 + [(

+ 0.013)•(f −128)]

(1)

(mA)

227

T0.8

where frequency (f) is expressed in KHz.

T1.0

Enable

Figure 21. Soft-Start Timing Diagram

FAN2108 has an internal pull-up to enable pin so that

the IC is enabled once V_CCis applied. Connecting a

small capacitor across EN and AGND delays the rate of

voltage rise on the EN pin. EN pin also serves for the

restart whenever a fault occurs (refer to the Auto-

Restart section). For applications where sequencing is

required, FAN2108 can be enabled (after the V_CC

comes up) with external control, as shown in Figure 20.

The regulator does not allow the low-side MOSFET to

operate in full synchronous rectification mode until

internal SS ramp reaches 95% of V_REF(~0.76V). This

helps the regulator to start on a pre-biased output and

ensures that inductor current does not "ratchet" up

during the soft-start cycle.

V

_CCUVLO or toggling the EN pin discharges the SS and

FAN2108

resets the IC.

14

EN

Setting the Output Voltage

The output voltage of the regulator can be set from 0.8V

to 80% of V_INby an external resistor divider (R1 and

3.3n

R_BIASin Figure 1).

The internal reference is 0.8V with 650nA, sourced from

the FB pin to ensure that, if the pin is open, the

regulator does not start.

Figure 20. Enabling with External Control

Setting the Frequency

Oscillator frequency is determined by an external resistor,

R_T, connected between the R(T) pin and AGND.

Resistance is calculated by:

The external resistor divider is calculated using:

V_OUT− 0.8V

R1

0.8V

=

+ 650nA

(3)

R_BIAS

(10⁶/ f ) −135

Connect R_BIASbetween FB and AGND.

(2)

R_T

=

(KΩ)

65

where R_Tis in KΩ and frequency (f) is in KHz.

The regulator cannot start if R_Tis left open.

FAN2108 • Rev. 1.0.0

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10

The over-current protection fault latch is active during

the soft-start cycle. Use a 1% resistor for R_ILIM

Calculating the Inductor Value

.

Typically the inductor is set for a ripple current (ΔI_L) of

10% to 35% of the maximum DC load. Regulators

requiring fast transient response use a value on the

high side of this range; while regulators that require very

low output ripple and/or use high-ESR capacitors

restrict allowable ripple current.

In case R_ILIMis not connected, the IC uses an internal

default current-limit threshold.

Loop Compensation

The loop is compensated using a feedback network

around the error amplifier. Figure 22 shows a complete

V_OUT

type-3

compensation

network.

For

type-2

V_OUT• (1-

)

(4)

V_IN

compensation, eliminate R3 and C3.

L =

ΔIL • f

where f is the oscillator frequency.

Setting the Ramp Resistor Value

The internal ramp voltage excursion (ΔV_RAMP) during t_ON

should be set to 0.6V at nominal operating point. R_RAMP

is approximately:

(V_IN−1.8) •V_OUT

18x10⁻⁶•V_IN• f

R_RAMP(KΩ)

=

− 2

(5)

where frequency (f) is expressed in KHz.

Figure 22. Compensation Network

Since the FAN2108 employs summing current-mode

architecture, type-2 compensation can be used for

many applications. For applications that require wide

loop bandwidth and/or use very low-ESR output

capacitors, type-3 compensation may be required.

Setting the Current Limit

There are two levels of current-limit thresholds in

FAN2108. The first level of protection is through an

internal default limit set at the factory to limit output

current beyond normal usage levels. The second level

of protection is externally settable at the ILIM pin.

Current-limit protection is enabled whenever the lower

of the two thresholds is reached. FAN2108 uses its

internal low-side MOSFET for current-sensing. The

current-limit threshold voltage (V_ILIM) is compared to a

scaled version of voltage drop across the low-side

MOSFET, sampled at the end of each PWM off-

time/cycle. The internal default threshold (with I_LIMopen)

is temperature compensated.

Protection

The converter output is monitored and protected

against extreme overload, short-circuit, over-voltage,

under-voltage, and over-temperature conditions.

An internal fault latch is set for any fault intended to

shut down the IC. When the fault latch is set, the IC

discharges V_OUTby enhancing the low-side MOSFET

until FB<0.25V. The MOSFET is not turned on again

unless FB>0.5V. This behavior discharges the output

without causing undershoot (negative output voltage).

The ILIM pin can source a 10µA current that can be

used to establish a lower, temperature–dependent,

current-limit threshold by connecting a resistor (R_ILIM

)

between ILIM and AGND. R_ILIMcan be approximated

with the equation:

Under-Voltage Shutdown

If voltage on the FB pin remains below the under-

voltage threshold for 16 consecutive clock cycles, the

fault latch is set and the converter shuts down. This

protection is not active until the internal SS ramp

reaches 1.0V during soft-start.

V_out• 3.33 •10⁶

R_ILIM(KΩ)= 95 + 3 •I_out• K_T• K1+

(6)

R_ramp• f_sw

where:

Over-Voltage Protection / Shutdown

If voltage on the FB pin exceeds the over-voltage

threshold for two consecutive clock cycles, the fault

latch is set and shutdown occurs.

I

= Desired current limit setpoint in Amps;

K_T

= Normalized temperature coefficient of the

low-side MOSFET (Q2 from Figure 8);

K1

= Overload co-efficient (use 1.2 to 1.4);

V_OUT= Set output voltage;

A shorted high-side MOSFET condition is detected

when SW voltage exceeds ~0.7V while the low-side

MOSFET is fully enhanced. The fault latch is set

immediately upon detection.

R_ramp= Ramp resistor used in KΩ; and

f_sw

= Selected switching frequency in KHz.

After 16 consecutive, pulse-by-pulse, current-limit

cycles, the fault latch is set and the regulator shuts

down. Cycling V_CCor EN restores operation after a

normal soft-start cycle (refer to Auto-Restart section).

The two fault protection circuits above are active all the

time, including during soft-start.

FAN2108 • Rev. 1.0.0

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11

Auto-Restart

Over-Temperature Protection (OTP)

After a fault, EN pin is discharged by a 1µA current sink

to a 1.1V threshold before the internal 800KΩ pull-up is

restored. A new soft-start cycle begins when EN

charges above 1.35V.

The chip incorporates an over-temperature protection

circuit that sets the fault latch when a die temperature of

about 150°C is reached. The IC restarts when the die

temperature falls below 125°C.

Depending on the external circuit, the FAN2108 can be

configured to remain latched-off or to automatically

restart after a fault.

Power-Good (PGOOD) Signal

PGOOD is an open-drain output that asserts LOW

when V_OUTis out of regulation, as measured at the FB

pin. Thresholds are specified in the Electrical

Specifications section. PGOOD does not assert HIGH

until the fault latch is enabled (T1.0).

Table 1. Fault / Restart Configurations

EN Pin

Controller / Restart State

Pull to GND

OFF (Disabled)

Pull-up to V_CCwith No Restart – Latched OFF(After

PCB Layout

100K

V_CCComes Up)

Open

Immediate Restart After Fault

New Soft-Start Cycle After:

Cap. to GND

t

_DELAY(ms)=3.9 • C(nf)

With EN is left open, restart is immediate.

If auto-restart is not desired, tie the EN pin to the VCC

pin or pull it HIGH after V_CCcomes up with a logic gate

to keep the 1µA current sink from discharging EN to

1.1V. Figure 23 shows one method to pull up EN to V_CC

for a latch configuration.

VCC

15

Figure 24. Recommended PCB Layout

100K

FAN2108

EN

14

3.3n

Figure 23. Enable Control with Latch Option

FAN2108 • Rev. 1.0.0

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12

Physical Dimensions

2X

TOP VIEW

2X

RECOMMENDED LAND PATTERN

ALL VALUES TYPICAL EXCEPT WHERE NOTED

SIDE VIEW

SEATING

PLANE

A) DIMENSIONS ARE IN MILLIMETERS.

B) DIMENSIONS AND TOLERANCES PER

ASME Y14.5M, 1994

C) DIMENSIONS DO NOT INCLUDE MOLD

FLASH OR BURRS.

D) DESIGN BASED ON JEDEC MO-220

VARIATION WJHC

E) TERMINALS ARE SYMMETRICAL AROUND THE

X & Y AXIS EXCEPT WHERE DEPOPULATED.

F) DRAWING FILENAME: MKT-MLP25AREV2

BOTTOM VIEW

Figure 25. 5x6mm Molded Leadless Package (MLP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

FAN2108 • Rev. 1.0.0

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13

FAN2108 • Rev. 1.0.0

www.fairchildsemi.com

14


型号：	FAN2108
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	TinyBuck⑩ 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator TinyBuck⑩ 3-24V输入， 8A ，高效，集成的同步降压稳压器稳压器
文件：	总14页 (文件大小：503K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FAN2108 [FAIRCHILD]

相关型号：

FAN2108EMPX

FAN2108EMPX

FAN2108EMPX_12

FAN2108MPX

FAN2108MPX

FAN2108MPX_12

FAN2108_12

FAN2110

FAN2110EMPX

FAN2110EMPX

FAN2110EMPX_12

FAN2110MPX