FAN53600AUC33X [FAIRCHILD]
3 MHz, 600 mA / 1A Synchronous Buck Regulator; 3 MHz的600毫安/ 1A同步降压稳压器
| 型号： | FAN53600AUC33X |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 3 MHz, 600 mA / 1A Synchronous Buck Regulator |
| 文件： | 总16页 (文件大小：1359K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 2012
FAN53600 / FAN53610
3 MHz, 600 mA / 1A Synchronous Buck Regulator
Features
Description
The FAN53600/10 is a 3 MHz step-down switching voltage
regulator, available in 600 mA or 1 A options, that delivers a
fixed output from an input voltage supply of 2.3 V to 5.5 V.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
600 mA or 1 A Output Current Capability
26 µA Typical Quiescent Current
3 MHz Fixed-Frequency Operation
Best-in-Class Load Transient Response
Best-in-Class Efficiency
Using
a
proprietary architecture with synchronous
rectification, the FAN53600/10 is capable of delivering a
peak efficiency of 92%, while maintaining efficiency over
80% at load currents as low as 1 mA.
The regulator operates at a nominal fixed frequency of
3 MHz, which reduces the value of the external components
to as low as 1 µH for the output inductor and 4.7 µF for the
output capacitor. In addition, the Pulse-Width Modulation
(PWM) modulator can be synchronized to an external
frequency source.
2.3 V to 5.5 V Input Voltage Range
0.8 V to 3.3 V Fixed Output Voltage
Low Ripple Light-Load PFM Mode
Forced PWM and External Clock Synchronization
Internal Soft-Start
At moderate and light loads, Pulse Frequency Modulation
(PFM) is used to operate the device in Power-Save Mode
with a typical quiescent current of 26 µA. Even with such a
low quiescent current, the part exhibits excellent transient
response during large load swings. At higher loads, the
system automatically switches to fixed-frequency control,
operating at 3 MHz. In Shutdown Mode, the supply current
drops below 1 µA, reducing power consumption. For
applications that require minimum ripple or fixed frequency,
PFM Mode can be disabled using the MODE pin.
Input Under-Voltage Lockout (UVLO)
Thermal Shutdown and Overload Protection
Optional Output Discharge
6-Bump WLCSP, 0.4 mm Pitch
Applications
.
.
.
.
3G, 4G, WiFi®, WiMAX™, and WiBro® Data Cards
The FAN53600/10 is available in 6-bump, 0.4 mm pitch,
Wafer-Level Chip-Scale Package (WLCSP).
Tablets
DSC, DVC
Netbooks®, Ultra-Mobile PCs
All trademarks are the property of their respective owners.
Figure 1.
Typical Application
Temperature
Ordering Information
Output
Max. Output
Current
Active
Part Number
Package
Packing
Voltage(1)
Discharge(2)
Range
FAN53600AUC33X
FAN53610AUC29X
Notes:
3.3 V
2.9 V
600 mA
1 A
Yes
Yes
WLCSP-6,
0.4 mm Pitch
Tape and
Reel
–40 to +85°C
1. Other voltage options available on request. Contact a Fairchild representative.
2. All voltage and output current options are available with or without active discharge. Contact a Fairchild representative.
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN56310 • Rev. 1.0.0
www.fairchildsemi.com
Pin Configurations
A1
B1
C1
A2
B2
C2
MODE
SW
VIN
EN
FB
GND
Figure 2. Bumps Facing Down
Figure 3. Bumps Facing Up
Pin Definitions
Pin #
Name
Description
MODE. Logic 1 on this pin forces the IC to stay in PWM Mode. Logic 0 allows the IC to automatically
A1
MODE switch to PFM Mode during light loads. The regulator also synchronizes its switching frequency to
two times the frequency provided on this pin. Do not leave this pin floating.
B1
C1
C2
SW
FB
Switching Node. Connect to output inductor.
Feedback. Connect to output voltage.
GND
Ground. Power and IC ground. All signals are referenced to this pin.
Enable. The device is in Shutdown Mode when voltage to this pin is <0.4 V and enabled when
>1.2 V. Do not leave this pin floating.
B2
A2
EN
VIN
Input Voltage. Connect to input power source.
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above
the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended
exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings
are stress ratings only.
Symbol
VIN
Parameter
Min.
–0.3
–0.3
–0.3
–0.3
Max.
7.0
VIN + 0.3(3)
VIN + 0.3(3)
VIN + 0.3(3)
Unit
V
Input Voltage
VSW
Voltage on SW Pin
EN and MODE Pin Voltage
Other Pins
V
VCTRL
V
V
Human Body Model per JESD22-A114
Charged Device Model per JESD22-C101
3.5
1.5
Electrostatic Discharge
Protection Level
ESD
kV
TJ
TSTG
TL
Junction Temperature
Storage Temperature
–40
–65
+150
+150
+260
°C
°C
°C
Lead Soldering Temperature, 10 Seconds
Note:
3. Lesser of 7 V or VIN+0.3 V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding
them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
2.3
0
Typ.
Max.
5.5
600
1
Unit
V
VCC
Supply Voltage Range
Output Current
FAN53600
FAN53610
mA
A
IOUT
0
L
Inductor
1
µH
µF
µF
CIN
Input Capacitor
2.2
4.7
10
Output Capacitor VOUT<2.7 V
VOUT ≥2.7 V
1.6
12.0
COUT
TA
TJ
Operating Ambient Temperature
Operating Junction Temperature
–40
–40
+85
°C
°C
+125
Thermal Properties
Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with two-layer 1s2p
boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature TJ(max) at a
given ambient temperature TA.
Symbol
Parameter
Typical
Unit
Junction-to-Ambient Thermal Resistance
150
°C/W
θJA
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
3
Electrical Characteristics
Minimum and maximum values are at VIN = VEN = 2.3 V to 5.5 V, VMODE = 0V (AUTO Mode), and TA = -40°C to +85°C; circuit of
Figure 1, unless otherwise noted. Typical values are at TA = 25°C, VIN = VEN = 3.6 V, VOUT=2.9 V.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Power Supplies
No Load, Not Switching
PWM Mode
26
3
µA
mA
µA
V
IQ
Quiescent Current
I(SD)
Shutdown Supply Current
VIN = 3.6 V, EN = GND
0.25
2.15
200
1.00
2.27
VUVLO Under-Voltage Lockout Threshold Rising VIN
VUVHYST Under-Voltage Lockout Hysteresis
Logic Inputs: EN and MODE Pins
mV
VIH
VIL
Enable HIGH-Level Input Voltage
Enable LOW-Level Input Voltage
1.2
V
V
0.4
VLHYST Logic Input Hysteresis Voltage
IIN Enable Input Leakage Current
Switching and Synchronization
100
mV
µA
Pin to VIN or GND
0.01
1.00
fSW
Switching Frequency(4)
VIN = 3.6 V, TA = 25°C
2.7
1.3
3.0
1.5
3.3
1.7
MHz
MHz
fSYNC
MODE Synchronization Range(4)
Square Wave at MODE Input
Regulation
ILOAD = 0 to 600 mA
PWM Mode
1.207
1.207
1.784
1.784
1.233
1.233
1.820
1.820
1.272
1.259
1.875
1.856
V
V
V
V
1.233V
1.820V
ILOAD = 0 to 600 mA
PWM Mode
VO
Output Voltage Accuracy
I
LOAD = 0 to 400 mA, VIN ≥ VOUT
+
+
2.755
(-5%)
2.987
(+3%)
2.900
V
150mV
2.900V
ILOAD = 0 to 600 mA, VIN ≥ VOUT
300 mV
2.813
(-3%)
2.987
(+3%)
2.900
180
V
tSS
Output Driver
PMOS On Resistance
NMOS On Resistance
Soft-Start
From EN Rising Edge
300
µs
VIN = VGS = 3.6 V
VIN = VGS = 3.6 V
Open-Loop for FAN53600
Open-Loop for FAN53610
EN = GND
175
165
1100
1750
230
150
15
mΩ
mΩ
mA
mA
Ω
RDS(on)
900
1250
2000
ILIM(OL) PMOS Peak Current Limit
1500
RDIS
Output Discharge Resistance
TTSD
THYS
Thermal Shutdown
CCM Only
°C
Thermal Shutdown Hysteresis
°C
Notes:
4. Limited by the effect of tOFF minimum (see Operation Description section).
5. The Electrical Characteristics table reflects open-loop data.
© 2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN53600 / FAN53610 • Rev. 1.0.0
4
Typical Performance Characteristics
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), and TA = 25°C.
98%
95%
92%
89%
86%
83%
80%
100%
95%
90%
85%
80%
75%
70%
- 40C, AUTO
+25C, AUTO
+85C, AUTO
- 40C, PWM
+25C, PWM
+85C, PWM
3.6 VIN
4.2 VIN
5.0 VIN
5.5 VIN
0
200
400
600
800
1000
0
200
400
600
800
1000
Load Current (mA)
Load Current (mA)
Figure 4. Efficiency vs. Load Current and Input
Voltage, VOUT=3.3 V, Dotted for Decreasing Load
Figure 5. Efficiency vs. Load Current and
Temperature VIN=5 V, VOUT=3.3 V, Dotted for FPWM
98%
95%
92%
89%
86%
100%
95%
90%
85%
80%
- 40C, AUTO
+25C, AUTO
+85C, AUTO
- 40C, PWM
+25C, PWM
3.2 VIN
3.6 VIN
4.2 VIN
83%
75%
5.0 VIN
+85C, PWM
80%
70%
0
200
400
600
800
1000
0
200
400
600
800 1000
Load Current (mA)
Load Current (mA)
Figure 6. Efficiency vs. Load Current and Input
Voltage, VOUT=2.9 V, Dotted for Decreasing Load
Figure 7. Efficiency vs. Load Current and
Temperature, VOUT=2.9 V, Dotted for FPWM
95%
93%
91%
89%
87%
85%
83%
81%
95%
90%
85%
80%
75%
70%
65%
- 40C, AUTO
+25C, AUTO
+85C, AUTO
- 40C, PWM
+25C, PWM
+85C, PWM
79%
2.7 VIN
3.6 VIN
4.2 VIN
5.0 VIN
77%
75%
0
200
400
600
800
1000
0
200
400
600
800
1000
Load Current (mA)
Load Current (mA)
Figure 8. Efficiency vs. Load Current and Input
Voltage, VOUT=1.82 V, Dotted for Decreasing Load
Figure 9. Efficiency vs. Load Current
and Temperature, VOUT=1.82 V, Dotted for FPWM
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
5
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), and TA = 25°C.
91%
88%
85%
82%
79%
76%
73%
70%
90%
85%
80%
75%
70%
65%
60%
- 40C, AUTO
+25C, AUTO
+85C, AUTO
- 40C, PWM
+25C, PWM
+85C, PWM
2.7 VIN
3.6 VIN
4.2 VIN
5.0 VIN
0
200
400
600
800
1000
0
200
400
600
800
1000
Load Current (mA)
Load Current (mA)
Figure 10. Efficiency vs. Load Current and Input
Voltage, VOUT=1.23 V, Dotted for Decreasing Load
Figure 11. Efficiency vs. Load Current and
Temperature, VOUT=1.23 V, Dotted for FPWM
3
3
2.7VIN, AUTO
2.7VIN, AUTO
3.6VIN, AUTO
4.2VIN, AUTO
3.6VIN, AUTO
4.2VIN, AUTO
2
2
5.0VIN, AUTO
5.0VIN, AUTO
2.7VIN, PWM
3.6VIN, PWM
2.7VIN, PWM
3.6VIN, PWM
1
1
0
4.2VIN, PWM
5.0VIN, PWM
4.2VIN, PWM
5.0VIN, PWM
0
-1
-2
-1
-2
0
200
400
600
800
1000
0
200
400
600
800
1000
Load Current (mA)
Load Current (mA)
Figure 12. ∆VOUT (%) vs. Load Current and Input
Voltage, VOUT=1.82 V, Normalized to 3.6 VIN, 500mA
Load, FPWM, Dotted for Auto Mode
Figure 13. ∆VOUT (%) vs. Load Current and Input
Voltage, VOUT=1.23 V, Normalized to 3.6 VIN, 500 mA
Load, FPWM, Dotted for Auto Mode
500
400
300
200
500
400
300
200
100
100
PWM
PWM
PFM
PFM
100% d.c.
100% d.c.
0
0
2.9
3.4
3.9
4.4
4.9 5.4
3.3
3.8
4.3
4.8
5.3
Input Voltage (V)
Input Voltage (V)
Figure 14. PFM / PWM /100% Duty Cycle Boundary
vs. Input Voltage, VOUT=3.3 V
Figure 15. PFM / PWM /100% Duty Cycle Boundary
vs. Input Voltage, VOUT=2.9 V
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
6
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), and TA = 25°C.
500
500
400
300
200
100
0
400
300
200
100
0
PWM
PFM
PWM
PFM
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Input Voltage (V)
Figure 16. PFM / PWM Boundary vs. Input Voltage,
OUT=1.82 V
Figure 17. PFM / PWM Boundary vs. Input Voltage,
VOUT=1.23 V
V
40
35
30
25
20
15
10
40
35
30
25
20
- 40C, EN=VIN
+25C, EN=VIN
+85C, EN=VIN
- 40C, EN=1.8V
+25C, EN=1.8V
+85C, EN=1.8V
- 40C, EN=VIN
+25C, EN=VIN
+85C, EN=VIN
- 40C, EN=1.8V
+25C, EN=1.8V
+85C, EN=1.8V
15
10
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.0
3.5
4.0
4.5
5.0 5.5
Input Voltage (V)
Input Voltage (V)
Figure 18. Quiescent Current vs. Input Voltage and
Temperature, VOUT=2.9 V, EN=VIN Solid, Dotted for
EN=1.8 V
Figure 19. Quiescent Current vs. Input Voltage and
Temperature, VOUT=1.82 V, EN=VIN Solid, Dotted for
EN=1.8 V
25
20
15
10
25
20
15
10
5
5
- 40C
- 40C
+25C
+25C
+85C
+85C
0
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Input Voltage (V)
Figure 20. Quiescent Current vs. Input Voltage and
Temperature, VOUT=2.9 V, Mode=EN=VIN (FPWM)
Figure 21. Quiescent Current vs. Input Voltage and
Temperature, VOUT=1.82 V, Mode=EN=VIN (FPWM)
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
7
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), and TA = 25°C.
100
80
60
40
20
0
50
40
30
20
10
0
3.2VIN, AUTO
3.6VIN, AUTO
5.0VIN, AUTO
3.2VIN, PWM
3.6VIN, PWM
5.0VIN, PWM
2.7VIN, AUTO
3.6VIN, AUTO
5.0VIN, AUTO
2.7VIN, PWM
3.6VIN, PWM
5.0VIN, PWM
0
200
400
600
800
1000
0
200
400
600
800
1000
Load Current (mA)
Load Current (mA)
Figure 22. Output Ripple vs. Load Current and Input
Voltage, VOUT=2.9 V, FPWM, Dotted for Auto Mode
Figure 23. Output Ripple vs. Load Current and Input
Voltage, VOUT=2.9 V, FPWM, Dotted for Auto Mode
3,500
3,000
2,500
3,500
3,000
2,500
2,000
2,000
3.2VIN, AUTO
3.6VIN, AUTO
1,500
1,500
5.0VIN, AUTO
2.7VIN, AUTO
3.2VIN, PWM
3.6VIN, AUTO
1,000
1,000
3.6VIN, PWM
5.0VIN, AUTO
5.0VIN, PWM
2.7VIN, PWM
500
500
3.6VIN, PWM
5.0VIN, PWM
0
0
0
200
400
600
800
1000
0
200
400
600
800 1000
Load Current (mA)
Load Current (mA)
Figure 24. . Frequency vs. Load Current and Input
Voltage, VOUT=2.9 V, Auto Mode, Dotted for FPWM
Figure 25. Frequency vs. Load Current and Input
Voltage, VOUT=1.82 V, Auto Mode, Dotted for FPWM
Figure 26. Load Transient, VIN=5 V, VOUT=3.3 V,
10-200-10 mA, 100 ns Edge
Figure 27. Load Transient, VIN=5 V, VOUT=3.3 V, 200-
800-200 mA, 100 ns Edge
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
8
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), and TA = 25°C.
Figure 28. Load Transient, VIN=5 V, VOUT=2.9 V,
10-200-10 mA, 100 ns Edge
Figure 29. Load Transient, VIN=5 V, VOUT=2.9 V,
200-800-200 mA, 100 ns Edge
Figure 30. Line Transient, 3.3-3.9-3.3 VIN, 10 µs Edge,
Figure 31. Line Transient, 3.3-3.9-3.3 VIN, 10 µs Edge,
V
OUT=2.9 V, 58 mA Load
VOUT=2.9 V, 600 mA Load
Figure 32. Combined Line / Load Transient,
OUT=2.9V, 3.9-3.3-3.9 VIN, 10 µs Edge, 58-500-58 mA
Load, 100 ns Edge
Figure 33. Startup, 50 Ω Load
V
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
9
Typical Performance Characteristics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), and TA = 25°C.
Figure 34. Startup, 4.7 Ω Load
Figure 35. Over-Current, Load Increasing Past Current
Limit, FAN53600
Figure 36. 250 mΩ Fault, Rapid Fault, FAN53600
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
10
Operation Description
The FAN53600/10 is a 3 MHz, step-down switching voltage
regulator, available in 600 mA or 1 A options, that delivers a
fixed output from an input voltage supply of 2.3 V to 5.5 V.
All voltage options can be ordered with a feature that actively
discharges FB to ground through a 230 Ω path when EN is
LOW. Raising EN above its threshold voltage activates the
part and starts the soft-start cycle. During soft-start, the
internal reference is ramped using an exponential RC shape
to prevent overshoot of the output voltage. Current limiting
minimizes inrush during soft-start.
Using
a
proprietary architecture with synchronous
rectification, the FAN53600/10 is capable of delivering a
peak efficiency of 92%, while maintaining efficiency over
80% at load currents as low as 1 mA.
The regulator operates at a nominal fixed frequency of
3 MHz, which reduces the value of the external components
to as low as 1 µH for the output inductor and 4.7 µF for the
output capacitor. In addition, the PWM modulator can be
synchronized to an external frequency source.
The IC may fail to start if heavy load is applied during startup
and/or if excessive COUT is used. This is due to the current-
limit fault response, which protects the IC in the event of an
over-current condition present during soft-start.
The current required to charge COUT during soft-start,
commonly referred to as “displacement current,” is given as:
Control Scheme
dV
The FAN53600/10 uses a proprietary, non-linear, fixed-
frequency PWM modulator to deliver a fast load transient
response, while maintaining a constant switching frequency
over a wide range of operating conditions. The regulator
performance is independent of the output capacitor ESR,
allowing the use of ceramic output capacitors. Although this
type of operation normally results in a switching frequency
that varies with input voltage and load current, an internal
frequency loop holds the switching frequency constant over
a large range of input voltages and load currents.
IDISP = COUT
•
(2)
dt
dV
dt
where the
term refers to the soft-start slew rate above.
To prevent shutdown during soft-start, the following condition
must be met:
IDISP + ILOAD < IMAX(DC)
(3)
where IMAX(DC) is the maximum load current the IC is
guaranteed to support.
For very light loads, the FAN53600/10 operates in
Discontinuous Current (DCM), single-pulse, PFM Mode;
which produces low output ripple compared with other PFM
architectures. Transition between PWM and PFM is
seamless, with a glitch of less than 18 mV at VOUT during the
transition between DCM and CCM modes.
Startup into Large COUT
Multiple soft-start cycles are required for no-load startup if
COUT is greater than 15 μF. Large COUT requires light initial
load to ensure the FAN53600/10 starts appropriately. The IC
shuts down for 1.3 ms when IDISP exceeds ILIMIT for more
than 210 μs of current limit. The IC then begins a new soft-
start cycle. Since COUT retains its charge when the IC is off,
the IC reaches regulation after multiple soft-start attempts.
Combined
with
exceptional
transient
response
characteristics, the very low quiescent current of the
controller (26 µA) maintains high efficiency, even at very light
loads, while preserving fast transient response for
applications requiring tight output regulation.
MODE Pin
100% Duty Cycle Operation
Logic 1 on this pin forces the IC to stay in PWM Mode. Logic
0 allows the IC to automatically switch to PFM during light
loads. If the MODE pin is toggled, with a frequency between
1.3 MHz and 1.7 MHz, the converter synchronizes its
switching frequency to two times the frequency on the
MODE pin (fMODE).
When VIN approaches VOUT, the regulator increases its duty
cycle until 100% duty cycle is reached. As the duty cycle
approaches 100%, the switching frequency declines due to
the minimum off-time (tOFF(MIN)) of about 50 ns imposed by
the control circuit. When 100% duty cycle is reached, VOUT
follows VIN with a drop-out voltage (VDROPOUT) determined by
the total resistance between VIN and VOUT as calculated by:
The MODE pin is internally buffered with a Schmitt trigger,
which allows the MODE pin to be driven with slow rise and
fall times. An asymmetric duty cycle for frequency
synchronization is also permitted as long as the minimum
time below VIL(MAX) or above VIH(MAX) is 100 ns.
VDROPOUT = ILOAD
•
PMOSRDS(ON) + DCRL
(1)
Enable and Soft-Start
When EN is LOW, all circuits are off and the IC draws
~50 nA of current. When EN is HIGH and VIN is above its
UVLO threshold, the regulator begins a soft-start cycle. The
output ramp during soft-start is a fixed slew rate of 50 mV/μs
from 0 to 1 VOUT, then 12.5 mV/μs until the output reaches its
setpoint. Regardless of the state of the MODE pin, PFM
Mode is enabled to prevent current from being discharged
from COUT if soft-start begins when COUT is charged.
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
11
Current Limit, Fault Shutdown, and Restart
Minimum Off-Time and Switching Frequency
A heavy load or short circuit on the output causes the current
in the inductor to increase until a maximum current threshold
is reached in the high-side switch. Upon reaching this point,
the high-side switch turns off, preventing high currents from
causing damage. The regulator continues to limit the current
cycle by cycle. After 16 cycles of current limit, the regulator
triggers an over-current fault, causing the regulator to shut
down for about 1.3 ms before attempting a restart.
tOFF(MIN) is 50 ns. This imposes constraints on the maximum
VOUT
that the FAN53600/10 can provide, or the maximum
VIN
output voltage it can provide at low VIN while maintaining a
fixed switching frequency in PWM Mode.
When VIN is LOW, fixed switching frequency is maintained as
long as:
If the fault was caused by short circuit, the soft-start circuit
attempts to restart and produces an over-current fault after
about 250 μs, which results in a duty cycle of less than 0%,
limiting power dissipation.
VOUT
≤ 1− tOFF(MIN) • fSW ≈ 0.85 .
V
IN
The switching frequency drops when the regulator cannot
provide sufficient duty cycle at 3 MHz to maintain regulation.
This occurs when VOUT >0.85 VIN at high load currents. The
calculation for switching frequency is given by:
The closed-loop peak-current limit, ILIM(PK), is not the same as
the open-loop tested current limit, ILIM(OL), in the Electrical
Characteristics table. This is primarily due to the effect of
propagation delays of the IC current-limit comparator.
1
fSW = min
,3MHz
(4)
tSW (MAX )
Under-Voltage Lockout (UVLO)
When EN is HIGH, the under-voltage lockout keeps the part
from operating until the input supply voltage rises high
enough to properly operate. This ensures no misbehavior of
the regulator during startup or shutdown.
where:
VOUT + IOUT • ROFF
VIN − IOUT • RON −VOUT
tSW (MAX ) = 50ns • 1+
(5)
Thermal Shutdown (TSD)
where:
When the die temperature increases, due to a high load
condition and/or a high ambient temperature, the output
switching is disabled until the temperature on the die has
fallen sufficiently. The junction temperature at which the
thermal shutdown activates is nominally 150°C with a
15°C hysteresis.
ROFF =RDSON _ N + DCRL
RON =RDSON _ P + DCRL .
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
12
Applications Information
Selecting the Inductor
The increased RMS current produces higher losses through
the RDS(ON) of the IC MOSFETs, as well as the inductor DCR.
The output inductor must meet both the required inductance
and the energy handling capability of the application. The
inductor value affects average current limit, the PWM-to-
PFM transition point, output voltage ripple, and efficiency.
Increasing the inductor value produces lower RMS currents,
but degrades transient response. For a given physical
inductor size, increased inductance usually results in an
inductor with lower saturation current and higher DCR.
The ripple current (∆I) of the regulator is:
Table 1 shows the effects of inductance higher or lower than
the recommended 1 μH on regulator performance.
VOUT
VIN
VIN −VOUT
L • fSW
ΔI ≈
•
(6)
Output Capacitor
The maximum average load current, IMAX(LOAD), is related to
the peak current limit, ILIM(PK), by the ripple current, given by:
Table 2 suggests 0402 capacitors. 0603 capacitors may
further improve performance in that the effective capacitance
is higher. This improves transient response and output ripple.
ΔI
2
IMAX(LOAD) = ILIM(PK )
−
(7)
Increasing COUT has no effect on loop stability and can
therefore be increased to reduce output voltage ripple or to
improve transient response. Output voltage ripple, ∆VOUT, is:
The transition between PFM and PWM operation is
determined by the point at which the inductor valley current
crosses zero. The regulator DC current when the inductor
current crosses zero, IDCM, is:
2
f
⋅C
2⋅D⋅
⋅ESR
1
SW
OUT
ΔV
= ΔI
+
OUT
L
(10)
(
1−D
)
8⋅ f
⋅C
SW OUT
ΔI
2
(8)
IDCM
=
Input Capacitor
The 2.2 μF ceramic input capacitor should be placed as
close as possible between the VIN pin and GND to minimize
parasitic inductance. If a long wire is used to bring power to
the IC, additional “bulk” capacitance (electrolytic or tantalum)
should be placed between CIN and the power source lead to
reduce ringing that can occur between the inductance of the
power source leads and CIN.
The FAN53600/10 is optimized for operation with L = 1 μH,
but is stable with inductances up to 2.2 μH (nominal). The
inductor should be rated to maintain at least 80% of its value
at ILIM(PK)
.
Efficiency is affected by inductor DCR and inductance value.
Decreasing the inductor value for a given physical size
typically decreases DCR; but since ∆I increases, the RMS
current increases, as do the core and skin effect losses:
The effective capacitance value decreases as VIN increases
due to DC bias effects.
ΔI2
12
2
(9)
IRMS
=
IOUT(DC)
+
Table 1. Effects of Changes in Inductor Value (470 nH Recommended Value) on Regulator Performance
Inductor Value
Increase
IMAX(LOAD)
Increase
Decrease
∆VOUT
Decrease
Increase
Transient Response
Degraded
Decrease
Improved
Table 2. Recommended Passive Components and Variation Due to DC Bias
Component
Description
Vendor
Min.
Typ.
Comment
1 μH, 2012, 190 mΩ,
Murata LQM21PN1R0MC0
Not recommended for 1A load
1 μH
0.8 A
L1
Utilized to generate graphs,
Figure 4 — Figure 36
1 μH, 1.4 A, 85 mΩ,
Murata LQM2MPN1R0M
1 μH
2.2 μF
4.7 μF
2016
Murata or Equivalent
GRM155R60J225ME15
GRM188R60J225KE19D
Decrease primarily due to DC bias
(VIN) and elevated temperature
2.2 μF, 6.3 V, X5R,
CIN
1.0 μF
1.6 μF
0402
Murata or Equivalent
GRM188R60G106ME47D
Decrease primarily due to DC bias
(VOUT) and elevated temperature
COUT
4.7 μF, X5R 0603
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
13
PCB Layout Guidelines
There are only three external components: the inductor and
the input and output capacitors. For any buck switcher IC,
including the FAN53600/10, it is important to place a low-ESR
input capacitor very close to the IC, as shown in Figure 37.
The input capacitor ensures good input decoupling, which
helps reduce noise at the output terminals and ensures that
the control sections of the IC do not behave erratically due to
excessive noise. This reduces switching cycle jitter and
ensures good overall performance. It is important to place the
common GND of CIN and COUT as close as possible to the C2
terminal. There is some flexibility in moving the inductor further
away from the IC; in that case, VOUT should be considered at
the COUT terminal.
Figure 37. 3 MHz PCB Layout Guidance
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
14
Physical Dimensions
Figure 38. 6-Bump WLCSP, 0.4mm Pitch
Product-Specific Dimensions
Product
D
E
X
Y
FAN53600AUC33X
FAN53610AUC29X
FAN53610UC33X
1.160 ±0.030
1.160 ±0.030
1.160 ±0.030
0.860 ±0.030
0.860 ±0.030
0.860 ±0.030
0.230
0.230
0.230
0.180
0.180
0.180
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without
notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most
recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which
covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
15
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
www.fairchildsemi.com
16
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