FAN7024MUX [FAIRCHILD]
675mW CMOS Mono Power Amplifier with Shutdown; 675mW CMOS单声道功率放大器，带有关断
| 型号： | FAN7024MUX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 675mW CMOS Mono Power Amplifier with Shutdown |
| 文件： | 总16页 (文件大小：374K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN7024
675mW CMOS Mono Power Amplifier with
Shutdown
Features
Description
• Continuous Average Power is 675mW (8Ω)
• Low THD: Typical 0.3% @ Po=500mW
• PSRR@217Hz, Input Terminated : 60dB
• Do Not Need Output Coupling Capacitor or Bootstrap
Capacitor
The FAN7024 is a bridge connected audio power amplifier
capable of delivering 675mW of continuous average power
to an 8Ω load with less than 0.3%(THD) from a 5V power
supply. The FAN7024 requires few external components and
operates on low supply voltage from 2.3V to 5.5V. Since the
FAN7024 does not require output coupling capacitors,
bootstrap capacitors, or snubber networks, it is ideally suited
for low power portable systems that require minimum
volume and weight. The FAN7024 features an externally
controlled gain and low power consumption shutdown mode
(0.1uA,typ.). Additional FAN7024 features include thermal
shutdown protection, unity gain stability, and external gain
set.
• Low Shutdown Current: Typical 0.1µA
• Shutdown: High Active
• Click & Pop Suppression circuitry
• Built in TSD Circuit
Typical Applications
• Cellular Phone
• PDA
• Portable Audio Systems
8MSOP
1
10MLP
1
BOTTOM VIEW
Internal Block Diagram
IN-
VO1
4
5
3
IN+
20KΩ
20KΩ
2
BP
100KΩ
8
VDD/2
6
VO2
VDD
100KΩ
BIAS
&
Shutdown
1
SD
GND
7
Rev. 1.0.0
©2003 Fairchild Semiconductor Corporation
FAN7024
Pin Assignments
VO2 GND VDD VO1
8
7
6
5
10
9
1
2
3
4
5
VO2
NC
VDD
NC
VO1
SD
0 2 4
BP
YWW
8
GND
IN+
IN-
7
6
1
2
3
4
SD BP IN+ IN-
10MLP(BOTTOM VIEW)
8MSOP
Pin Definitions
( ) : 10MLP
Pin Number
Pin Name
SD
Pin Function Description
1(1)
2(2)
3(4)
Shutdown. Hold high to shutdown, hold low for normal operation
Bypass. Tap to voltage divider for internal mid-supply bias
Noninverting input
BP
IN+
4(5)
IN-
Inverting input
5(6)
6(8)
V
V
Power amplifier output1
Supply voltage input
O1
DD
7(3)
8(10)
GND
V
O2
Ground connection for circuitry
Power amplifier output2
2
FAN7024
Absolute Maximum Ratings (Note 2)
Parameter
Maximum Supply Voltage
Input Voltage
Symbol
Value
6.0
-0.3 ~ V +0.3
DD
Unit
V
V
Remark
V
DD
V
IN
Power Dissipation
Storage Temperature
Junction Temperature
P
Internally Limited
W
°C
°C
D
T
-65 ~ +150
150
STG
T
J
190
166
50
8MSOP
10MLP, Single-Layer
10MLP, Multi-Layer
Thermal Resistance
Junction to Ambient
Rthja
°C/W
Recommended Operating Conditions (Note 2)
Parameter
Operating Supply Voltage
Operating Temperature
Symbol
Min.
2.3
-40
Typ.
-
-
Max.
5.5
85
Unit
V
°C
V
DD
T
OPR
3
FAN7024
Electrical Characteristics(Note1,2)
(R = 8Ω, Ta = 25°C, unless otherwise specified)
L
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
V
DD
= 5.0V, UNLESS OTHERWISE SPECIFIED
Quiescent Power Supply Current
Shutdown Current
Output Offset Voltage
Output Power
I
I
V
P
V
V
V
= 0V,I = 0A
-
-
-
-
-
2.3
0.1
0
5.5
1.0
50
-
mA
µA
mV
mW
DD
IN
O
= V
DD
SD
SD
= 0V
IN
OS
THD = 1%(Max.), f = 1kHz
675
O
P
O
= 500mW , Av=6dB,
-
rms
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
THD+N
0.2
%
20Hz<f<20kHz, BW<80kHz
V
ripple
=200mV
sinp-p
f=217Hz(Terminated input)
f=1kHz(Terminated input)
f=217Hz(Unterminated input)
f=1kHz(Unterminated input)
-
-
-
-
63
65
70
70
-
-
-
-
PSRR
dB
V
DD
= 3.3V, UNLESS OTHERWISE SPECIFIED
Quiescent Power Supply Current
Shutdown Current
Output Offset Voltage
Output Power
I
I
V
P
V
V
V
= 0V,I = 0A
-
-
-
-
-
1.9
0.1
0
4
1.0
50
-
mA
µA
mV
mW
DD
IN
O
= V
DD
SD
SD
= 0V
IN
OS
THD = 1%(Max.), f = 1kHz
265
O
P
O
= 250mW , Av=6dB,
-
rms
Total Harmonic Distortion+Noise
Power Supply Rejection Ratio
THD+N
0.3
%
20Hz<f<20kHz, BW<80kHz
V
ripple
=200mV
sinp-p
f=217Hz(Terminated input)
f=1kHz(Terminated input)
f=217Hz(Unterminated input)
f=1kHz(Unterminated input)
-
-
-
-
63
65
70
70
-
-
-
-
PSRR
dB
V
DD
= 2.6V, UNLESS OTHERWISE SPECIFIED
Quiescent Power Supply Current
Shutdown Current
Output Offset Voltage
Output Power
I
I
V
P
V
V
V
= 0V,I = 0A
-
-
-
-
-
1.7
0.1
0
3.5
1.0
50
-
mA
µA
mV
mW
DD
IN
O
= V
DD
SD
SD
= 0V
IN
OS
THD = 1%(Max.), f = 1kHz
130
O
P
O
= 100mW , Av=6dB,
-
rms
Total Harmonic Distortion+Noise
THD+N
PSRR
0.4
%
20Hz<f<20kHz, BW<80kHz
V
ripple
=200mV
sinp-p
Power Supply Rejection Ratio
f=217Hz(Terminated input)
f=1kHz(Terminated input)
-
-
63
65
-
-
dB
Note 1 : All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2 : Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating
Conditions indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical
Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific
performance limits. This assumes that the device is whitin the Operating Ratings. Specifications are not guaranteed for
parameters where no limit is given, however, the typical value is a good indication of device performance.
4
FAN7024
Typical Application Circuit
RF
20KΩ
CI
RI
IN-
VO1
4
3
5
8
0.39uF
20KΩ
IN+
RL
20KΩ
20KΩ
2
6
1uF
BP
CB
8Ω/16Ω/32Ω
100KΩ
VDD/2
VDD
VO2
VDD
CS
10uF
100KΩ
BIAS
20KΩ
&
Shutdown
1
SD
GND
7
NC
External Components Descriptions
Components
Functional Descriptions
The inverting input resistor which sets the closed-loop gain in conjunction with Rf. This
1. R
2. C
I
resistor also forms a high pass filter with C at fc=1/(2πR C )
I
I I
The input coupling capacitor blocks the DC voltage at the amplifier’s input terminals. Also
creates a high pass with R at fc=1/(2πR C ). Refer to the section, Proper Selection of
I
I
I I
External Components, for an explanation of how to determine the value of C .
I
3. R
4. C
The feedback resistor which sets closed-loop gain in conjunction with R .
I
F
S
The supply bypass capacitor which provides power supply filtering. Refer to the
Application Information section for proper placement and selection of the supply
bypass capacitor.
The bypass pin capacitor which provides half-supply filtering. Refer to the Proper
Selection of External Components section for information concerning proper placement
5. C
B
and selecting C ’s value.
B
5
FAN7024
Performance Chracteristics
10
10
VDD=5V
VDD=5V
RL=8Ω
RL=16Ω
Av=6dB
Av=6dB
BW < 80kHz
BW < 80kHz
1
1
f = 20KHz
f = 20KHz
f = 1KHz
0.1
0.1
f = 1KHz
f = 20Hz
50m
f = 20Hz
0.01
10m
0.01
10m
50m
100m
500m
1
100m
Output Power (W)
500m
1
Output Power (W)
Figure 1. THD+N vs. Output Power
Figure 2. THD+N vs. Output Power
10
10
VDD=5V
RL=32Ω
Av=6dB
VDD=3.3V
RL=8Ω
Av=6dB
BW < 80kHz
BW < 80kHz
1
1
f = 20KHz
f = 20KHz
f = 1KHz
0.1
0.1
f = 1KHz
f = 20Hz
f = 20Hz
50m
0.01
10m
0.01
10m
100m
Output Power (W)
500m
1
50m
100m
Output Power (W)
500m
1
Figure 4. THD+N vs. Output Power
Figure 3. THD+N vs. Output Power
10
10
VDD=3.3V
VDD=3.3V
RL=16Ω
RL=32Ω
Av=6dB
Av=6dB
BW < 80kHz
BW < 80kHz
1
1
f = 20KHz
f = 20KHz
f = 20Hz
0.1
0.1
f = 1KHz
f = 20Hz
f = 1KHz
50m
0.01
10m
0.01
10m
50m
100m
Output Power (W)
500m
1
100m
500m
1
Output Power (W)
Figure 5. THD+N vs. Output Power
Figure 6. THD+N vs. Output Power
6
FAN7024
Performance Characteristics (Continued)
10
10
VDD=2.6V
RL=8Ω
VDD=2.6V
RL=16Ω
Av=6dB
BW < 80kHz
Av=6dB
BW < 80kHz
1
1
f = 20KHz
f = 20KHz
f = 1KHz
0.1
0.1
f = 1KHz
f = 20Hz
f = 20Hz
0.01
10m
0.01
10m
50m
100m
500m
1
50m
100m
Output Power (W)
500m
1
Output Power (W)
Figure 7. THD+N vs. Output Power
Figure 8. THD+N vs. Output Power
10
10
1
VDD=2.6V
VDD=5V
RL=32Ω
RL=8Ω
Av=6dB
Po=500mW
BW < 80kHz
BW < 80kHz
1
f = 20KHz
f = 20Hz
0.1
0.1
f = 1KHz
50m
0.01
0.01
10m
20
50
100
200
500
1k
2k
5k
10k
20k
100m
500m
1
Output Power (W)
Frequency (Hz)
Figure 9. THD+N vs. Output Power
Figure 10. THD+N vs. Frequency
10
1
10
1
VDD=5V
VDD=5V
RL=16Ω
RL=32Ω
Po=250mW
BW < 80kHz
Po=200mW
BW < 80kHz
0.1
0.1
0.01
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Frequency (Hz)
Figure 11. THD+N vs. Frequency
Figure 12. THD+N vs. Frequency
7
FAN7024
Performance Characteristics (Continued)
10
10
1
VDD=3.3V
RL=8Ω
VDD=3.3V
RL=16Ω
Po=250mW
BW < 80kHz
Po=200mW
BW < 80kHz
1
0.1
0.1
0.01
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Frequency (Hz)
Figure 13. THD+N vs. Frequency
Figure 14. THD+N vs. Frequency
10
10
1
VDD=3.3V
VDD=2.6V
RL=32Ω
RL=8Ω
Po=100mW
BW < 80kHz
Po=125mW
BW < 80kHz
1
0.1
0.1
0.01
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Figure 15. THD+N vs. Frequency
Figure 16. THFDre+qNuevncsy.(FHzr)equency
10
1
10
1
VDD=2.6V
VDD=2.6V
RL=16Ω
RL=32Ω
Po=100mW
BW < 80kHz
Po=75mW
BW < 80kHz
0.1
0.1
0.01
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
20
50
100
200
500
1k
2k
5k
10k
20k
Frequency (Hz)
Figure 17. THD+N vs. Frequency
Figure 18. THFDre+qNuevncsy.(FHzr)equency
8
FAN7024
Performance Characteristics (Continued)
0
0
VDD = 5V
VDD = 5V
-10
-10
-20
-30
-40
-50
-60
-70
-80
-90
Vripple = 250mV
RL = 8Ω
Vripple = 250mV
RL = 8Ω
-20
-30
-40
-50
Vin = 0V (Input Grounded)
Av = 6dB
Vin = 0V (Input Open)
-60
-70
-80
-90
C
= 1.0uF
B
C
= 1.0uF
B
-100
-110
-120
-100
20
50
100 200
500 1k
2k
5k 10k 20k
50k 100k
20
50 100 200
500 1k
2k
5k 10k 20k
50k 100k
Frequency (Hz)
Frequency (Hz)
Figure 19. Power Supply Rejection Ratio
Figure 20. Power Supply Rejection Ratio
0
0
VDD = 3.3V
VDD = 3.3V
-10
-20
-10
-20
-30
-40
-50
-60
-70
-80
-90
Vripple = 250mV
RL = 8Ω
Vripple = 250mV
RL = 8Ω
Vin = 0V (Input Grounded)
Av = 6dB
Vin = 0V (Input Open)
-30
-40
-50
-60
-70
-80
-90
C
= 1.0uF
B
C
= 1.0uF
B
-100
-110
-120
-100
20
50
100 200
500 1k
2k
5k 10k 20k
50k 100k
20
50 100 200
500 1k
2k
5k 10k 20k
50k 100k
Frequency (Hz)
Frequency (Hz)
Figure 21. Power Supply Rejection Ratio
Figure 22. Power Supply Rejection Ratio
1m
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
500u
VDD = 5V
Vin = 0V
Temp. = 25°C
RL = 8Ω
Av = 6dB
100u
50u
10u
5u
VO1+VO2
1u
50n
10n
5n
1n
0
1
2
3
4
5
20
50
100
200
500
1k
2k
5k
10k
20k
Supply Voltage(V)
Figure 24. Supply Current vs. Supply Voltage
Frequency (Hz)
Figure 23. Noise Floor
9
FAN7024
Performance Characteristics (Continued)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
2.5
Vin = 0V
VDD=5V
Temp. = 25°C
2.0
RL=8Ω
1.5
1.0
0.5
0.0
RL=16Ω
RL=32 Ω
f=1KHz
THD+N<1%
BW<80kHz
V
DD=5V
0
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
Shutdown Voltage(V)
Output Power (W)
Figure 25. Supply Current vs. Shutdown Voltage
Figure 26. Power Dissipation vs. Output Power
1.4
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
f=1KHz
RL=8 Ω
BW<80kHz
f=1KHz
RL=16 Ω
BW<80kHz
1.2
1.0
0.8
0.6
0.4
0.2
0.0
10% THD+N
10% THD+N
1% THD+N
1% THD+N
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Supply Voltage(V)
Supply Voltage(V)
Figure 27. Output Power vs. Supply Voltage
Figure 28. Output Power vs. Supply Voltage
0.6
0.5
0.4
0.3
0.2
0.1
0.0
3.0
f=1KHz
RL=32 Ω
BW<80kHz
10MLP(Multi-Layer) : 2.5Wmax
2.5
2.0
1.5
1.0
0.5
0.0
10% THD+N
10MLP(Single-Layer) : 753mWmax
8MSOP : 657mWmax
1% THD+N
0
25
50
75
100
125
150
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Power Dissipation [W]
Figure 29. OutputSPupopwlyeVrovltsag.eS(Vu)pply Voltage
Figure 30. Power Derating Curve
10
FAN7024
Application Informations
Power Supply Bypassing
Proper power supply bypassing is critical for low noise and high power supply rejection. A larger capacitor may help to
increase immunity to the supply noise. However, considering economical design, attaching 10uF electrolytic capacitor or tan-
talum capacitor with 0.1uF ceramic capacitor to the V
DD
pin as close as possible is enough to get a good supply noise rejec-
tion. The capacitor location on both the bypass pin and power supply pin should be as close to the device as possible.
Connecting a 1uF capacitor, C , between the bypass pin and ground improves the internal bias voltage’s stability and
B
improves the amplifier’s PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. The selection
of bypass capacitors, especially C , depends on desired PSRR requirements, click and pop performance as explained in the
B
section, Proper Selection of External Components, system cost, and size constraints.
Shutdown Function
In order to reduce power consumption while not in use, the FAN7024 contains a shutdown function(pin 1) to externally turn
off the amplifier’s bias circuitry. This shutdown feature turns the amplifier off when a logic high is placed on the shutdown
pin. The trigger point between a logic low and high level is typically half supply. It is best to switch between ground and sup-
ply to provide maximum device performance. By switching the shutdown pin to the V , the supply current of the FAN7024
DD
will be minimized in the shutdown mode. While the device isdisabled with shutdown pin voltages less than V , the shut-
DD
down current may be greater than the typical value of 0.1uA. In either case, the shutdown pin should be tied to a definite volt-
age because leaving the pin floating may result in an unwanted state change. In many applications, a microcontroller or
microprocessor output is used to control the shutdown circuitry which provides a quick, smooth transition into shutdown.
Another solution is to use a single-pole, single-throw switch in conjunction with an external pull-up resistor.
When the switch is closed, the shutdown pin is connected to ground and the device is enabled. If the switch is open, the
FAN7024 will be disabled through the external pull-up resistor. This scheme guarantees that the shutdown pin will not float.
This prevents unwanted state changes.
Bridge Configuration Explantion
As shown in typical appliction circuit, the FAN7024 has two operational amplifiers internally, allowing for a few different
amplifier configurations. The first amplifier’s gain is externally configurable, while the second amplifier is internally fixed in
a unity-gain, inverting configuration. The close-loop gain of the first amplifier is set by selecting the ratio of R to R while the
F
I
second amplifier’s gain is fixed by two internal 20kΩ resistors. In the typical application circuit, the output of the first ampli-
fier serves as the input of the second amplifier which results in both amplifiers producing signals indentical in magnitude, but
out of phase 180°. Consequently the differential gain of the device is
RF
RI
------
AVD = 2 ⋅
(1)
By driving the load differentially through outputs V and V , an amplifier configuration commonly referred to as "bridged
O1
O2
mode" is established. Bridged mode operation is different from the classical single-ended amplifier configuration where one
side of its load is connected to ground.
A bridge amplfier design has a few distinct advantages over the single-ended configuration, as it provides differential drive to
the load, thus doubling output swing for a specified supply voltage. Four times the output power is possible as compared to a
single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not
current limited or clipped.
A bridgge configuration , such as the one used in FAN7024, also creates a second advantage over single-ended amplifiers.
Since the differential outputs, V and V , are biased at half-suppy, no net DC voltage exists across the load. This eliminates
O1
O2
the need for an output coupling capacitor which is required in a single supply, single-ended amplifier configuration. If an out-
put coupling capacitor is not used in a single-ended configuration, the half-supply bias across the load would result in both
increased internal IC power dissipation as well as permanant loudspeaker damage.
Adaptive Q-current Control Circuit
Among the several kinds of the analog amplifiers, a class-AB amplifier satisfies moderate total harmonic distortion(THD) and
the efficiency. In general, the output distortion is proportional to the quiescent-current(Q-current) of the output stage, but
power efficiency is inversely propotional to that. To satisfy both needs, an adaptive Q-current control(AQC) technique is pro-
posed. The AQC circuit controls the Q-current with respect to the amount of the output distortion, whereas it is not activated
when no input signals are applied or no output distortion is sensed.
11
FAN7024
Power Dissipation
Power dissipation is a major concern when designing any power amplifier and must be thoroughly uderstood to ensure a suc-
cessful design. Equation (2) states the maximum power dissipation point for a bridged amplifier operating at a given supply
voltage and driving a specified output load.
V2DD
(2)
----------------
PDMAX = 4 ⋅
2π2RL
Since the FAN7024 is driving a bridged amplifier, the internal maximum power dissipation point of the FAN7024 results from
equation (2). Even with the large internal power dissipation, the FAN7024 does not require heat sinking over a wide range of
ambient temperature. From equation (2), assuming a 5V power supply and an 8Ω load, the maximum power dissipation point
is 633mW. The maximum power dissipation point obtained from equation (2) must not be greater than the power dissipation
that results from equation (3) :
(TJMAX – TA)
PDMAX = ---------------------------------
(3)
Rthja
For package 8MSOP(FAN7024MU), R =190°C/W, T
=150°C for the FAN7024.
thja
JMAX
Depending on the ambient temperature, T , of the system surroundings, equation (3) can be used to find the maximum internal
A
power dissipation supported by the IC packaging. If the result of equation (2) is greater than that of equation (3), then decrease
the supply voltage, increase the load impedance, or reduce the ambient temperature, T . If these measures are insufficient, a
A
heat sink can be added to reduce T . For the typical application of a 5V power supply, with 8Ω load, the maximum ambient
A
temperature possible without violating the maximum junction temperature is approximately 30°C provided that device opera-
tion is around the power dissipation point. Internal power dissipation is a function of output power and thus, if typical opera-
tion is not around the maximum power dissipation point, the ambient temperature can be increased. Refer to the Performance
Characteristics curves for power dissipation information for lower output powers.
Proper Selection of External Components
Selection of external components in applications using integrated power amplifiers is critical to optimize device and system
performance. While the FAN7024 is tolerant of external component combinations, consideration to component values must be
used to maximize overall system quality. The FAN7024 is unity-gain stable and this gives a designer maximum system flexi-
bility. The FAN7024 should be used in low gain configurations to minimize THD+N values and maximize the signal-to-noise
ratio. Low gain configurations require large input signals to obtain a given output power. Besides gain, one of the major con-
siderations is the closed-loop bandwidth of the amplifier. The input coupling capacitor, C , forms a first order high pass filter
I
which limits low frequency response. This value should be chosen based on needed frequency response for a few distinct rea-
sons.
Selection of Capacitor Size
In the typical application, an input capacitor, C , is required to allow the amplifier to bias the input signal to the proper DC
I
level for optimum operation. In this case, C and R form a high-pass filter with the corner frequency
I
I
1
fc = ------------------
(4)
2πRICI
The value of C is important to consider, as it directly affects the bass(low frequency) performance of the circuit. Clearly a cer-
I
tain sized capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers used in
portable systems, whether internal or external, have little ability to reproduce signals below 150Hz. Thus using large input
capacitor may not increase systme performance. In addition to systme cost and size, click and pop performance is affected by
the size of the input coupling capacitor, C . A larger input coupling capacitor requires more charge to reach its quiescent DC
I
voltage(normally V /2). This charge comes from the output via feedback and is apt to create pops upon device enable. Thus,
DD
by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be minimized.
Besides minimizing the input capacitor sizes, careful consideration should be paid to the bypass capacitor value. Bypass
capacitor, C , is the most critical component to minimize turn-on pops since it determines how fast the FAN7024 turns on.
B
The slower the FAN7024’s outputs ramp to their quiescent DC voltage(normally V /2), the smaller the turn-on pop. Thus
DD
choosing C equal to 1.0uF along with a small value of C (in the range of 0.1uF to 0.39uF), should produce a clickless and
B
I
popless shutdown function. While the device will function properly, (no oscillations or motorboating), with C equal to 0.1uF,
B
the device will be much more susceptible to turn-on clicks and pops. Thus, a value of C equal to 1uF or larger is recom-
B
12
FAN7024
mended in all but the most cost sensitive designs.
Pop Noise Reduction
The FAN7024 contains circuitry to minimize turn-on and shutdown transients or ’clicks and pop’. For this discussion, turn-on
refers to either applying the power supply voltage or when the shutdown mode is deactivated.
To reduce the pop noise, the FAN7024 has some delay. During that delay, the input capacitor is precharged and the normal
operation is prepared. Such delay time can be controlled by choosing C . The delay time is expressed as
B
CB
40uA
(5)
tdelay = 2.5V ⋅ -------------- + 20ms
13
FAN7024
Mechanical Dimensions
Package
Dimensions in millimeters
8MSOP
14
FAN7024
Mechanical Dimensions
Package
Dimensions in millimeters
10MLP
BOTTOM VIEW
15
FAN7024
Ordering Information
Device
Package
Operating Temperature
Packing
Tube
Tape& Reel
Tape& Reel
FAN7024MU
FAN7024MUX
FAN7024MPX
8MSOP
10MLP
-40°C ~ +85°C
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
8/28/03 0.0m 001
Stock#DSxxxxxxxx
2003 Fairchild Semiconductor Corporation
相关型号：
FAN7031MTF
2W Stereo Power Amplifier with Four Selectable Gain Setting and Headphone Drive
FAIRCHILD
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