FAN7383MX_WS [FAIRCHILD]
HB Based Peripheral Driver With Pwm;
| 型号： | FAN7383MX_WS |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | HB Based Peripheral Driver With Pwm 驱动 接口集成电路 |
| 文件： | 总16页 (文件大小：1252K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2007
FAN7383
Half-Bridge Gate-Drive IC
Features
Description
Floating Channel Designed for Bootstrap Operation to
The FAN7383 is a half-bridge gate-drive IC with
shutdown and programmable dead-time control
functions for driving MOSFETs and IGBTs that operate
up to +600V.
+600V.
Typically 350mA/650mA Sourcing/Sinking Current
Driving Capability for Both Channels
Extended Allowable Negative VS Swing to -9.8V for
Fairchild’s high voltage process and common-mode
noise canceling technique give stable operation of high-
side drivers under high-dv/dt noise circumstances.
Signal Propagation at VDD=VBS=15V
High-Side Output in Phase of IN Signal
Built-in UVLO Functions for Both Channels
Built-in Common-Mode dv/dt Noise Canceling Circuit
Typically Internal 330ns Minimum Dead-Time
An advanced level-shift circuit allows high-side gate
driver operation up to VS= -9.8V (typical) for VBS=15V.
The UVLO circuits for both channels prevent malfunction
when VDD and VBS are lower than the specified
Programmable Turn-On Delay Time Control
(Dead-Time)
threshold voltage.
Output drivers typically source/sink 350mA/650mA,
respectively, which is suitable for all kinds of half and full
bridge inverter.
Applications
SMPS
Motor Drive Inverter
Fluorescent Lamp Ballast
HID Ballast
14-SOP
Ordering Information
Part Number
FAN7383M(1)
FAN7383MX(1)
Package
Pb-Free
Operating Temperature Range Packing Method
Tube
-40°C ~ 125°C
14-SOP
Yes
Tape & Reel
Note:
1. These devices passed wave soldering test by JESD22A-111.
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
Typical Application Circuit
VDC
RBOOT
DBOOT
VDD
PWM
IN
1
2
3
4
5
6
7
14
13
12
11
10
9
VB
PWM IC
RHON
Shutdown
Control
SD
DT
HO1
RHOFF
HO2
VS
CBOOT
VDD
LO1
LO2
GND
NC
RDT
NC
NC
8
RLOFF
RLON
FAN7383 Rev.01
Figure 1. Application Circuit for Half-Bridge Switching Power Supply
VDC
VCC
VDD
VDD
VB
VB
HO1
HO1
HO2
VS
HO2
VS
IN
PHA
PHB
SD
Forward
IN
SD
M
SD
FAN7383
FAN7383
Reverse
DC Motor
Controller
LO1
LO2
LO1
LO2
DT
DT
GND
GND
FAN7383 Rev.01
Figure 2. Application Circuit for Full-Bridge DC Motor Driver
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
2
Internal Block Diagram
14 VB
UVLO
R
13 HO1
12 HO2
R
NOISE
CANCELLER
S
Q
11 VS
SCHMITT
TRIGGER INPUT
HS(ON/OFF)
1
2
3
IN
UVLO
4
VDD
SHOOT THOUGH
PREVENTION
SD
DT
LO1
LO2
5
6
LS(ON/OFF)
DELAY
DEAD-TIME
{ DTMIN=330nsec }
7
GND
FAN7383 Rev:01
Figure 3. Functional Block Diagram of FAN7383
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
3
Pin Configuration
IN
SD
DT
1
2
3
4
5
6
7
14 VB
13 HO1
12 HO2
11 VS
VDD
10 NC
LO1
LO2
GND
9
8
NC
NC
FAN7383 Rev:00
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
1
Name
Description
IN
SD
Logic Input for Gate Driver
Logic Input for Shutdown (Active Low)
Programmable Dead-Time Control with External Resistor
Low-Side Supply Voltage
Low-Side Driver Source Output
Low-Side Driver Sink Output
Ground
2
3
DT
4
VDD
LO1
LO2
GND
N.C.
N.C.
N.C.
VS
5
6
7
8
Not connected
9
Not connected
10
11
12
13
14
Not connected
High-Side Floating Supply Return
High-Side Driver Sink Output
High-Side Driver Source Output
High-Side Floating Supply
HO2
HO1
VB
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
4
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. TA = 25°C unless otherwise specified.
Symbol
VS
Parameter
High-side offset voltage
Min.
VB-25
-0.3
Max.
VB+0.3
625
Unit
V
VB
High-side floating supply voltage
High-side floating output voltage HO1, HO2
Low-side and logic fixed supply voltage
Low-side output voltage LO1, LO2
Logic input voltage (IN)
V
VHO
VDD
VLO
VS-0.3
-0.3
VB+0.3
25
V
V
-0.3
VDD+0.3
VDD+0.3
VDD+0.3
5.0
V
VIN
-0.3
V
VSD
Shutdown logic input voltage
Dead-time control voltage
-0.3
V
VDT
-0.3
V
GND
dVS/dt
Logic ground
VDD-25
VDD+0.3
50
V
Allowable offset voltage slew rate
Power dissipation
V/ns
W
(2)(3)(4)
PD
1.0
θJA
TJ
Thermal resistance, junction-to-ambient
Junction temperature
110
°C/W
°C
°C
150
TSTG
Storage temperature
150
Notes:
2. When mounted on 76.2 x 114.3 x 1.6mm PCB. (FR-4 glass epoxy material).
3. Please refer to:
JESD51-2: Integral circuits thermal test method environmental conditions - Natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
4. Do not exceed PD under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VB
Parameter
High-side floating supply voltage
High-side floating supply offset voltage
Low-side supply voltage
Condition
Min.
VS+15
6-VDD
15
Max.
VS+20
600
Unit
V
VS
V
VDD
VHO
VLO
VIN
20
V
High-side (HO) output voltage
Low-side (LO) output voltage
Logic input voltage (IN)
VS
VB
V
GND
GND
-40
VDD
VDD
125
V
V
TA
Ambient temperature
°C
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
5
Electrical Characteristics
VBIAS (VDD, VBS) = 15.0V, RDT = GND, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are
referenced to GND. The VO and IO parameters are referenced to VS and GND and are applicable to the respective
outputs HO and LO.
Symbol
SUPPLY CURRENT SECTION
IQBS Quiescent VBS supply current
IQDD
Parameter
Condition
Min. Typ. Max. Unit
VIN=0V or 5V
35
90
Quiescent VDD supply current
VDD supply current at shutdown mode
Operating VBS supply current
Operating VDD supply current
Offset supply leakage current
VIN=0V or 5V, RDT=0Ω
SD=GND
650
650
400
900
900
700
(5)
ISD
μA
IPBS
IPDD
ILK
fIN=20kHz,rms value
fIN=20kHz,rms value, RDT=0Ω
VB=VS=600V
950 1200
10
POWER SUPPLY SECTION
VDDUV+ VDD and VBS supply under-voltage
VBSUV+ positive going threshold
10.7 11.6 12.5
10.0 10.8 11.6
0.8
VDDUV- VDD and VBS supply under-voltage
VBSUV- negative going threshold
V
VDDUVH VDD and VBS supply under-voltage
VBSUVH lockout hysteresis
GATE DRIVER OUTPUT SECTION
VOH
VOL
IO+
High-level output voltage, VBIAS-VO
Low-level output voltage, VO
IO=20mA
1.0
0.6
V
V
Output high short-circuit pulse current
Output low short-circuit pulsed current
VO=0V, VIN=5V with PW<10µs
VO=15V, VIN=0V with PW<10µs
250
500
350
650
mA
mA
IO-
Allowable negative VS pin voltage for IN
signal propagation to HO
VS
-9.8 -7.0
V
LOGIC INPUT SECTION (INPUT AND SHUTDOWN)
VIH
VIL
Logic "1" input voltage
2.9
2.9
V
V
Logic "0" input voltage
1.2
IIN+
IIN-
Logic "1" input bias current
Logic "0" input bias current
Shutdown "1" input voltage
Shutdown "0" input voltage
Input pull-down resistance
VIN=5V
VIN=0V
50
100
2.0
1.2
μA
μA
V
SD+
SD-
RPD
V
100
KΩ
Note:
5.This parameter guaranteed by design.
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
6
Dynamic Electrical Characteristics
VBIAS (VDD, VBS) = 15.0V, VS = GND, CL=1000pF, RDT = GND, and TA = 25°C, unless otherwise specified.
Symbol
Parameter
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
Conditions
Min. Typ. Max. Unit
tON
tOFF
tR
VS=0V
500
170
50
670
250
100
80
VS=0V or 600V(5)
ns
tF
Turn-off fall time
30
(5)
tSD
Shutdown propagation delay
100
330
180
420
RDT=0Ω
250
ns
µs
DT1,
DT2
Dead-time LO OFF to HO ON and HO
OFF to LO ON
RDT=200KΩ
RDT=0Ω
1.20 1.68 2.30
0
0
60
DMT
Dead-time matching
ns
RDT=200KΩ
150
Note:
5.These parameters guaranteed by design.
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
7
Typical Characteristics
11.6
11.4
11.2
11.0
10.8
10.6
10.4
10.2
10.0
12.0
11.8
11.6
11.4
11.2
11.0
10.8
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 5. VDD/VBS UVLO (+) vs. Temperature
Figure 6. VDD/VBS UVLO (-) vs. Temperature
1000
800
600
400
200
100
80
60
40
20
0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 7. VDD Quiescent Current vs. Temperature
Figure 8. VBS Quiescent Current vs. Temperature
1600
1400
1200
1000
800
800
600
400
200
0
600
400
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 9. VDD Operating Current vs. Temperature
Figure 10. VBS Operating Current vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
8
Typical Characteristics (Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
80
60
40
20
0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 11. Logic Input Current vs. Temperature
Figure 12. Logic Input High Voltage vs. Temperature
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 13. Logic Input Low Voltage vs. Temperature
Figure 14. SD Positive Threshold vs. Temperature
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
80
60
40
20
0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 15. SD Negative Threshold vs. Temperature
Figure 16. Rising Time vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
9
Typical Characteristics (Continued)
700
600
500
400
300
200
80
60
40
20
0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 17. Falling Time vs. Temperature
Figure 18. Turn-on Delay Time vs. Temperature
300
250
200
150
100
50
400
360
320
280
240
0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 19. Turn-off Falling Time vs. Temperature
Figure 20. Dead-Time (RDT=0kΩ) vs. Temperature
2.0
1.6
1.2
0.8
0.4
0.0
2.4
2.2
2.0
1.8
1.6
1.4
1.2
0
20
40
60
80 100 120 140 160 180 200
RDT [kohm]
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Figure 21. Dead Time (RDT=200kΩ) vs. Temperature
Figure 22. RDT vs. Dead Time
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
10
Typical Characteristics (Continued)
-6
-8
-10
-12
-14
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Figure 23. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
11
Switching Time Definitions
10μF 100nF
+15V
FAN7383
10μF 100nF
+15V
IN
1
2
3
4
5
6
7
14
13
12
11
10
9
VB
SD
DT
HO1
HO1, 2
HO2
VS
SD
1nF
VDD
LO1
LO2
GND
NC
NC
NC
LO1, 2
1nF
8
FAN7383 Rev:00
Figure 24. Switching Time Test Circuit
IN
HO1, 2
LO1, 2
SD
Shutdown
Shutdown
DT2
DT1
DT2
DT1
DT1
FAN7383 Rev:00
Figure 25. Input / Output Waveforms
50%
50%
IN
tOFF
90%
tON
LO1, 2
HO1, 2
10%
90%
tON
tOFF
10%
FAN7383 Rev:00
Figure 26. Switching Time Waveform Definitions
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
12
50%
SD
90%
HO or LO
tSD
FAN7383 Rev:00
Figure 27. Shutdown Waveform Definition
90%
HO
LO
10%
DT1
DT2
90%
MDT= DT1-DT2
10%
FAN7383 Rev:00
Figure 28. Dead-Time Waveform Definition
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
13
Typical Application Information
1. Normal Operating Consideration
3. Layout Consideration
The FAN7383 is a single PWM input half-bridge gate-
drive IC with programmable dead-time and shutdown
function.
For optimum performance of high- and low-side gate
drivers, cannot be achieved without taking due
considerations must be taken during printed circuit board
(PCB) layout.
The dead-time is set with a resistor (RDT) at the DT pin.
The wide dead-time programming range provides the
flexibility to optimize drive signal timing for a selection of
switching devices (MOSFET or IGBT) and applications.
3.1 Supply Capacitors
If the output stages are able to quickly turn on the
switching device with high value of current, the supply
capacitors must be placed as close as possible to the
device pins (VDD and GND for the ground-tied supply, VB
The turn-on time delay circuitry (Dead-Time)
accommodates resistor values from 0Ω to 200kΩ with a
dead-time proportional to the RDT resistance.
and VS for the floating supply) to minimize parasitic
inductance and resistance.
Grounding the DT pin programs the FAN7383 to drive
both outputs with minimum dead time.
3.2 Gate Drive Loop
If the SD pin voltage decrease below 1.2V in normal
operation, the IC enters the shutdown mode.
Current loops behave like an antenna, able to receive
and transmit noise. To reduce the noise coupling/
emission and improve the power switch turn-on and off
performances, gate drive loops must be reduced as
much as possible.
2. Under-Voltage Lockout (UVLO)
The FAN7383 has an under-voltage lockout (UVLO)
protection circuitry for high and low side channels to
prevent malfunction when VDD or VBS is lower than the
3.3 Ground Plane
specified threshold voltage. The UVLO circuitry monitors
the supply voltage (VDD) and bootstrap capacitor voltage
Ground plane must not be placed under or nearby the
high-voltage floating side to minimize noise coupling.
(VBS) independently.
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
14
Package Dimensions
14-SOP
Dimensions are in millimeters unless otherwise noted.
0.05
0.002
MIN
1.55 0.10
0.061 0.004
#14
#1
#8
#7
6.00 0.30
0.236 0.012
1.80
MAX
0.071
3.95 0.20
0.156 0.008
5.72
0.225
0.60 0.20
0.024 0.008
January 2001, Rev. A
Figure 29. 14-Lead Small Outline Package (SOP)
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
15
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
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As used herein:
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which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
device, or system whose failure to perform can be
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I23
© 2006 Fairchild Semiconductor Corporation
FAN7383 Rev. 1.0.3
www.fairchildsemi.com
16
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