FDB7030L [FAIRCHILD]

N-Channel Logic Level Enhancement Mode Field Effect Transistor; N沟道逻辑电平增强模式场效应晶体管
FDB7030L
型号: FDB7030L
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

N-Channel Logic Level Enhancement Mode Field Effect Transistor
N沟道逻辑电平增强模式场效应晶体管

晶体 晶体管 场效应晶体管
文件: 总4页 (文件大小:475K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
April 1998  
FDP7030L / FDB7030L  
N-Channel Logic Level Enhancement Mode Field Effect Transistor  
General Description  
Features  
These N-Channel logic level enhancement mode power field  
effect transistors are produced using Fairchild's proprietary,  
high cell density, DMOS technology. This very high density  
process is especially tailored to minimize on-state resistance.  
These devices are particularly suited for low voltage  
applications such as DC/DC converters and high efficiency  
switching circuits where fast switching, low in-line power  
loss, and resistance to transients are needed.  
100 A, 30 V. RDS(ON) = 0.007 W @ VGS=10 V  
RDS(ON) = 0.010 W @ VGS=5 V.  
Critical DC electrical parameters specified at elevated  
temperature.  
Rugged internal source-drain diode can eliminate the need  
for an external Zener diode transient suppressor.  
High density cell design for extremely low RDS(ON)  
.
175°C maximum junction temperature rating.  
_________________________________________________________________________________  
D
G
S
Absolute Maximum Ratings  
Symbol Parameter  
TC = 25°C unless otherwise noted  
FDP7030L  
FDB7030L  
Units  
VDSS  
VGSS  
ID  
Drain-Source Voltage  
30  
V
V
A
Gate-Source Voltage - Continuous  
Drain Current - Continuous  
±20  
(Note 1)  
(Note 1)  
100  
75  
- Pulsed  
300  
PD  
Total Power Dissipation @ TC = 25°C  
Derate above 25°C  
125  
W
W/°C  
°C  
0.83  
Operating and Storage Temperature Range  
-65 to 175  
TJ,TSTG  
TL  
Maximum lead temperature for soldering purposes,  
1/8" from case for 5 seconds  
275  
°C  
THERMAL CHARACTERISTICS  
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient  
1.2  
°C/W  
°C/W  
RqJC  
R
62.5  
JA  
q
© 1998 Fairchild Semiconductor Corporation  
FDP7030L Rev.D1  
Electrical Characteristics (TC = 25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
DRAIN-SOURCE AVALANCHE RATINGS (Note 1)  
WDSS  
IAR  
Single Pulse Drain-Source Avalanche Energy  
Maximum Drain-Source Avalanche Current  
VDD = 15 V, ID = 38 A  
200  
38  
mJ  
A
OFF CHARACTERISTICS  
Drain-Source Breakdown Voltage  
30  
V
BVDSS  
VGS = 0 V, ID = 250 µA  
ID = 250 µA, Referenced to 25 oC  
mV/oC  
Breakdown Voltage Temp. Coefficient  
Zero Gate Voltage Drain Current  
36  
DBVDSS/DTJ  
10  
1
µA  
mA  
nA  
nA  
IDSS  
VDS = 24 V, VGS = 0 V  
TJ =125 °C  
Gate - Body Leakage, Forward  
Gate - Body Leakage, Reverse  
100  
-100  
IGSSF  
IGSSR  
VGS = 20 V, VDS = 0 V  
VGS = -20 V, VDS = 0 V  
ON CHARACTERISTICS (Note 2)  
Gate Threshold Voltage  
1
1.5  
-5  
2
V
VGS(th)  
VDS = VGS, ID = 250 µA  
ID = 250 µA, Referenced to 25 oC  
Gate Threshold Voltage Temp.Coefficient  
mV/oC  
DVGS(th)/DTJ  
RDS(ON)  
Static Drain-Source On-Resistance  
VGS = 10 V, ID = 50 A  
0.006 0.007  
0.009 0.011  
W
TJ = 125°C  
0.009  
0.01  
VGS = 5 V, ID = 40 A  
VGS = 10 V, VDS = 10 V  
VDS = 10 V, ID = 50 A  
ID(on)  
gFS  
On-State Drain Current  
60  
A
S
Forward Transconductance  
50  
DYNAMIC CHARACTERISTICS  
Input Capacitance  
VDS = 15 V, VGS = 0 V,  
f = 1.0 MHz  
2150  
1290  
420  
pF  
pF  
pF  
Ciss  
Coss  
Crss  
Output Capacitance  
Reverse Transfer Capacitance  
SWITCHING CHARACTERISTICS (Note 2)  
Turn - On Delay Time  
Turn - On Rise Time  
10  
20  
nS  
nS  
tD(on)  
VDD = 15 V, ID = 75 A,  
VGS = 10 V, RGEN = 6 W  
RGS = 10 W  
160  
225  
tr  
Turn - Off Delay Time  
Turn - Off Fall Time  
70  
95  
nS  
nS  
tD(off)  
140  
195  
tf  
Qg  
Qgs  
Qgd  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
VDS = 12 V  
ID = 50 A, VGS= 4.5 V  
35  
12  
18  
50  
nC  
nC  
nC  
DRAIN-SOURCE DIODE CHARACTERISTICS  
Maximum Continuos Drain-Source Diode Forward Current (Note 1)  
100  
300  
1.3  
A
A
V
IS  
Maximum Pulsed Drain-Source Diode Forward Current  
(Note 2)  
ISM  
VSD  
Drain-Source Diode Forward Voltage  
1
VGS = 0 V, IS = 50 A (Note 2)  
0.85  
1.1  
TJ = 125°C  
Notes  
1. Calculated continuous current based on maximum allowable junction temperature. Actual maximum continuous current limited by package constraints to 75A.  
2. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.  
FDP7030L Rev.D1  
Typical Electrical Characteristics  
3
2.5  
2
100  
V
= 10V  
8.0  
5.0  
GS  
V GS =3.5V  
4.5  
80  
60  
40  
20  
0
6.0  
4.0  
4.0  
4.5  
5.0  
60  
1.5  
1
3.5  
6.0  
8.0  
10.0  
3.0  
2
0.5  
0
0.5  
1
1.5  
2.5  
0
20  
40  
80  
100  
V
, DRAIN-SOURCE VOLTAGE (V)  
DS  
I
, DRAIN CURRENT (A)  
D
Figure 2. On-Resistance Variation with  
Drain Current and Gate  
Voltage.  
Figure 1. On-Region Characteristics.  
0.025  
0.02  
0.015  
0.01  
0.005  
0
1.6  
ID =50A  
ID = 50A  
VGS = 10V  
1.4  
1.2  
1
125°C  
25°C  
0.8  
0.6  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
2
4
6
8
10  
T
, JUNCTION TEMPERATURE (°C)  
J
V
, GATE TO SOURCE VOLTAGE (V)  
GS  
Figure 3. On-Resistance Variation  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
with Temperature.  
60  
60  
50  
40  
30  
20  
10  
0
V
= 10V  
V
GS  
=0V  
DS  
10  
1
T = 125°C  
A
25°C  
0.1  
T = -55°C  
A
-55°C  
0.01  
0.001  
25  
125°C  
0.0001  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
0
0.2  
V
0.4  
0.6  
0.8  
1
1.2  
1.4  
V
, GATE TO SOURCE VOLTAGE (V)  
GS  
, BODY DIODE FORWARD VOLTAGE (V)  
SD  
Figure 6. Body Diode Forward Voltage  
Variation with Source Current  
and Temperature.  
Figure 5. Transfer Characteristics.  
FDP7030L Rev.D1  
Typical Electrical Characteristics (continued)  
5000  
10  
I
= 50A  
D
V
= 6.0V  
DS  
3000  
2000  
12V  
8
6
4
2
0
C
iss  
24V  
C
oss  
1000  
500  
C
rss  
f = 1 MHz  
VGS = 0V  
200  
0
20  
40  
, GATE CHARGE (nC)  
60  
80  
1
2
5
10  
20  
30  
Q
g
V
DS  
, DRAIN TO SOURCE VOLTAGE (V)  
Figure 8. Capacitance Characteristics.  
Figure 7. Gate Charge Characteristics.  
8000  
6000  
4000  
2000  
0
500  
300  
SINGLE PULSE  
Rq  
=1.2° C/W  
JC  
100  
50  
TC = 25°C  
20  
10  
5
VGS = 10V  
SINGLE PULSE  
RqJC= 1.2o C/W  
TC = 25 °C  
2
1
0.01  
0.1  
1
10  
100  
1000  
0.1  
0.5  
1
5
10  
30 50  
V
, DRAIN-SOURCE VOLTAGE (V))  
SINGLE PULSE TIME (ms)  
DS  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum Power  
Dissipation.  
1
D = 0.5  
0.5  
0.3  
0.2  
0.2  
R
(t) = r(t) * R  
JC  
q
JC  
q
R
= 1.2 °C/W  
JC  
q
0.1  
0.1  
P(pk)  
0.05  
0.05  
0.02  
t
1
t
2
0.03  
0.01  
T
- T = P * R  
(t)  
JC  
J
C
q
0.02  
Duty Cycle, D = t /t  
1
2
Single Pulse  
0.01  
0.01  
0.05  
0.1  
0.5  
1
5
10  
50  
100  
500  
1000  
t
,TIME (ms)  
1
Figure 11. Transient Thermal Response Curve.  
FDP7030L Rev.D1  

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