FDC796N-G [FAIRCHILD]
Transistor;
| 型号： | FDC796N-G |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Transistor |
| 文件： | 总6页 (文件大小：185K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2004
FDC796N
30V N-Channel PowerTrench MOSFET
General Description
Features
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
low gate charge, low RDS(ON) and fast switching speed.
• 12.5 A, 30 V.
RDS(ON)
=
9 mΩ @ VGS = 10 V
RDS(ON) = 12 mΩ @ VGS = 4.5 V
• High performance trench technology for extremely
low RDS(ON)
Applications
• Low gate charge
• DC/DC converter
• Power management
• Load switch
• High power and current handling capability
• Fast switching speed.
Bottom Drain
G
S
6
1
2
3
S
5
4
S
S
S
SuperSOT-6TM FLMP
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
30
V
VGSS
ID
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
± 20
12.5
40
(Note 1a)
A
PD
Maximum Power Dissipation
(Note 1a)
(Note 1b)
2
1.1
−55 to +150
W
°C
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
60
111
0.5
RθJA
RθJA
RθJC
°C/W
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.796
FDC796N
7’’
8mm
3000 units
FDC796N Rev D (W)
2004 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
30
V
VGS = 0 V,
ID = 250 µA
∆BVDSS
Breakdown Voltage Temperature
25
ID = 250 µA, Referenced to 25°C
mV/°C
Coefficient
∆TJ
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate–Body Leakage
VDS = 24 V,
VGS = ± 20 V, VDS = 0 V
VGS = 0 V
10
±100
µA
nA
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
1
2
3
V
VDS = VGS
,
ID = 250 µA
∆VGS(th)
Gate Threshold Voltage
– 5.6
ID = 250 µA, Referenced to 25°C
mV/°C
Temperature Coefficient
∆TJ
VGS = 10 V,
VGS = 4.5 V,
ID = 12.5 A
ID = 11 A
7.4
9.5
9
9
mΩ
Static Drain–Source
On Resistance
RDS(on)
gFS
12
16
VGS = 10 V, ID = 12.5 A, TJ=125°C
Forward Transconductance
VDS = 10 V,
ID = 12.5 A
48.4
S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
V
DS = 15 V,
V GS = 0 V,
1444
342
135
pF
pF
pF
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
RG
Gate Resistance
VGS = 15 mV, f = 1.0 MHz
1.25
Ω
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD = 15 V,
ID = 1 A,
10
3.8
26
13
14
4
20
7.6
42
23
20
ns
ns
ns
VGS = 10 V,
RGEN = 6 Ω
ns
Qg
Qgs
Qgd
V
DS = 15 V,
ID = 12.5 A,
nC
nC
nC
VGS = 5 V
5
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
1.5
1.2
A
V
VSD
Drain–Source Diode Forward
VGS = 0 V, IS = 1.5 A
(Note 2)
0.73
Voltage
trr
Diode Reverse Recovery Time
25
15
nS
nC
IF = 12.5 A,
diF/dt = 100 A/µs
Qrr
Diode Reverse Recovery Charge
Notes: 1.
RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting
surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
60°C/W when
b)
111°C/W when mounted
on a minimum pad of 2 oz
copper
mounted on a 1in2 pad
of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDC796N Rev D (W)
Typical Characteristics
2.4
2.2
2
50
VGS = 10V
6.0V
4.5V
4.0V
VGS = 3.5V
40
30
20
10
0
3.5V
1.8
1.6
1.4
1.2
1
4.0V
4.5V
20
5.0V
6.0V
10V
3.0V
0.8
0
10
30
40
50
0
0.5
1
1.5
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.024
1.6
1.4
1.2
1
ID = 12.5A
VGS = 10V
ID = 6.3 A
0.02
0.016
0.012
0.008
0.004
TA = 125oC
TA = 25oC
0.8
0.6
-50
-25
0
25
50
75
100
125
150
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
50
VGS = 0V
VDS = 5V
10
1
40
30
20
10
0
TA = 125oC
25oC
0.1
TA = 125oC
25oC
-55oC
0.01
0.001
0.0001
-55oC
0
0.2
0.4
0.6
0.8
1
1.2
1.5
2
2.5
3
3.5
4
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC796N Rev D (W)
Typical Characteristics
10
2000
1600
1200
800
400
0
f = 1MHz
GS = 0 V
ID = 12.5A
VDS = 10V
V
15V
CISS
8
6
4
2
0
20V
COSS
CRSS
0
5
10
15
20
25
30
0
5
10
15
20
25
30
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
10
50
10µs
SINGLE PULSE
θJA = 111°C/W
A = 25°C
R
100µs
1ms
RDS(ON) LIMIT
40
30
20
10
0
T
10ms
100ms
1s
10s
DC
1
VGS = 10V
SINGLE PULSE
0.1
R
θJA = 111oC/W
T
A = 25oC
0.01
0.01
0.1
1
10
100
0.001
0.01
0.1
1
10
100
1000
VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
R
θJA(t) = r(t) * RθJA
θJA = 111 °C/W
0.2
0.1
0.1
P(pk)
0.05
t1
0.02
t2
0.01
0.01
T
J - TA = P * RθJA(t)
SINGLE PULSE
Duty Cycle, D = t1 / t2
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDC796N Rev D (W)
Dimensional Outline and Pad Layout
FDC796N Rev D (W)
TRADEMARKS
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I8
相关型号：
FDC796N_NL
Power Field-Effect Transistor, 12.5A I(D), 30V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, FLMP, SUPERSOT-6
FAIRCHILD
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