FDS8433 [FAIRCHILD]
Single P-Channel 2.5V Specified MOSFET; 单P沟道2.5V指定MOSFET
| 型号： | FDS8433 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Single P-Channel 2.5V Specified MOSFET |
| 文件： | 总8页 (文件大小：197K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1998
PRELIMINARY
FDS8433A
Single P-Channel 2.5V Specified MOSFET
Features
General Description
• -5 A, -20 V. RDS(on) = 0.045 Ω @ VGS = -4.5 V
RDS(on) = 0.070 Ω @ VGS = -2.5 V
This P-Channel enhancement mode power field effect
transistors is produced using Fairchild’s proprietary,
high cell density, DMOS technology. This very high
density processis especially tailored to minimize
on-state resistance and provide superior switching
performance.
• Fast switching speed.
• High density cell design for extremely low RDS(on)
.
• High power and current handling capability.
Applications
• Load switch
• DC/DC converter
• Battery protection
D
5
6
7
8
4
D
D
3
2
1
D
G
S
S
SO-8
S
TA = 25°C unless otherwise noted
Absolute Maximum Ratings
Symbol
Parameter
FDS8433A
Units
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
-20
V
V
A
8
±
(Note 1a)
(Note 1a)
-5
-50
PD
Power Dissipation for Single Operation
2.5
W
(Note 1b)
(Note 1c)
1.2
1
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
C
°
Thermal Characteristics
θ
(Note 1a)
(Note 1)
R
R
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
50
25
C/W
C/W
JA
°
°
JC
θ
Package Outlines and Ordering Information
Device Marking
Device
Reel Size
Tape Width
Quantity
FDS8433A
FDS8433A
13’’
12mm
2500 units
1998 Fairchild Semiconductor Corporation
FDS8433A Rev. B1
TA = 25°C unless otherwise noted
DMOS Electrical Characteristics
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250
A
-20
V
µ
DSS
BV
∆
Breakdown Voltage Temperature
Coefficient
ID = -250 A, Referenced to 25 C
-25
mV/ C
°
µ
°
TJ
IDSS
Zero Gate Voltage Drain Current
VDS = -16 V, VGS = 0 V
-1
A
µ
IGSSF
IGSSR
Gate-Body Leakage Current, Forward VGS = 8 V, VDS = 0 V
Gate-Body Leakage Current, Reverse VGS = -8 V, VDS = 0 V
100
-100
nA
nA
(Note 2)
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250
A
-0.4
-25
-0.6
4
-1
V
µ
GS(th)
Gate Threshold Voltage
Temperature Coefficient
ID = -250 A, Referenced to 25 C
mV/ C
V
µ
°
°
∆
TJ
∆
RDS(on)
Static Drain-Source
On-Resistance
VGS = -4.5 V, ID = -5 A
0.036 0.045
0.050 0.085
0.047 0.070
Ω
Ω
Ω
A
V
V
GS = -4.5 V, ID = -5 A, TJ=125 C
GS = -2.5 V, ID = -4.3 A
°
ID(on)
gFS
On-State Drain Current
VGS = -4.5 V, VDS = -5 V
Forward Transconductance
VDS = -5 V, ID = -5 A
16
S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
1130
480
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
120
(Note 2)
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
V
DD = -10 V, ID = -1 A,
GS = -4.5 V, RGEN = 6
8
16
37
ns
ns
Ω
23
260
90
360
125
28
ns
ns
Qg
Qgs
Qgd
VDS = -5 V, ID = -5 A,
GS = -5 V,
20
nC
nC
nC
V
2.8
3.2
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
-2.1
-1.2
A
V
(Note 2)
VSD
Notes:
Drain-Source Diode Forward Voltage VGS = 0 V, IS = -2.1 A
-0.8
1:
RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design.
c) 125° C/W when mounted
on a 0.006 in2 pad
of 2 oz. copper.
a) 50° C/W when
mounted on a 1 in2
pad of 2 oz. copper.
b) 105° C/W when
mounted on a 0.04 in2
pad of 2 oz. copper.
Scale
1 : 1 on letter size paper
2: Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
FDS8433A Rev. B1
Typical Characteristics
5 0
2
1.8
1.6
1.4
1.2
1
VGS= -4.5V
-3.5V
4 0
-3.0V
VGS = -2 .0 V
3 0
2 0
1 0
0
-2.5V
-2.5V
-3.0V
-3.5V
-4.0V
-4.5V
-2.0V
-1.5V
0.8
0
10
20
30
40
50
0
1
2
3
4
5
- I , DRAIN CURRENT (A)
-V , DRAIN-SOURCE VOLTAGE (V)
DS
D
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
1.6
1.4
1.2
1
0.15
ID = -5A
ID = -2.5A
VGS = -4.5V
0.12
0.09
0.06
0.03
0
T = 125°C
J
0.8
0.6
25°C
-50
-25
0
25
50
75
100
125
150
1
2
3
4
5
T
, JUNCTION TEMPERATURE (°C)
J
-V
GS
, GATE TO S OURCE VOLT AG E (V)
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage.
10
8
10
T = -55°C
VGS= 0V
VDS = -5V
J
3
1
25° C
125°C
T =1 25° C
J
6
25°C
-55°C
0.1
0.01
4
2
0
0.4
0.001
0.8
1.2
1.6
2
0
0.2
0.4
0.6
0.8
1
1.2
-V , GATE TO SOURCE VOLTAGE (V)
GS
-V ,BODY DIODE FORWARD VOLTAGE (V)
S D
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
Figure 5. Transfer Characteristics.
FDS8433A Rev. B1
Typical Characteristics (continued)
5
3000
2000
ID =-5.0A
VDS= -5V
4
C
iss
-10V
1000
500
-15V
3
C
oss
2
1
0
200
100
50
C
rss
f = 1 MHz
VGS = 0 V
0
4
8
12
16
20
0.1
0.2
0.5
1
2
5
10
20
Q
, GATE CHARGE (nC)
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
g
Figure 7. Gate-Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
10
50
40
30
20
10
0
SINGLE PULSE
RθJA=125°C/W
TA= 25°C
1
VGS = -4.5V
SINGLE PULSE
0.1
Rθ
= 125°C/W
JA
TA = 25°C
0.01
0.1
0.2
0.5
1
2
5
10
20
50
0.001
0.01
0.1
1
10
100 300
-V , DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
DS
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D
=
0.5
0.2
0.5
0.2
0.1
R
(t)
=
=
r(t)
* R
θ
JA
JA
θ
0.1
0.05
R
125°C/W
JA
θ
0.05
P(pk)
0.02
0.01
0.02
0.01
t
1
Single Pulse
t
2
0.005
T
-
T
=
P
*
R
(t)
JA
J
A
θ
Duty Cycle,
D
=
t
/t
1
2
0.002
0.001
0.0001
0.001
0.01
0.1
, TIME (sec)
1
10
100
300
t
1
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1.
Transient themal response will change depending on the circuit board design.
FDS8433A Rev. B1
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging
Configuration: Figure 1.0
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is
ELECTROSTATIC
SENSITIVE DEVICES
DO NO
T
S
M
HI
P
OR
S
TO
RE
N
E
AR
S
T
RO NG
E
L
E
CTROS
T
ATIC
made from dissipative (carbon filled) polycarbonate
a
E
L
E
CTRO
AGN
E
TI
C,
M
AG NE
T
IC
O
R R ADIO ACTIVE FI ELD S
TNR DATE
PT NUMB E
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
R
PEEL STRENGTH MIN ______________gms
MAX _____________gms
Antistatic Cover Tape
ESD Label
These full reels are individually barcode labeled and
placed inside
a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside
comes in different sizes depending on the number of parts
shipped.
a barcode labeled shipping box which
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
F
NDS
9959
852
Customized
Label
F
F
F
F
Pin 1
SOIC (8lds) Packaging Information
Standard
L86Z
F011
D84Z
Packaging Option
(no flow code)
SOIC-8 Unit Orientation
Packaging type
TNR
2,500
Rail/Tube
TNR
4,000
TNR
500
Qty per Reel/Tube/Bag
Reel Size
95
-
13" Dia
13" Dia
7" Dia
Box Dimension (mm)
Max qty per Box
343x64x343 530x130x83 343x64x343 184x187x47
5,000
0.0774
0.6060
30,000
0.0774
-
8,000
0.0774
0.9696
1,000
0.0774
0.1182
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
F63TNLabel
ESD Label
F63TN Label
LOT: CBVK741B019
FSID: FDS9953A
QTY: 2500
SPEC:
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
(F63TNR)3
SOIC(8lds) Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
Leader Tape
640mm minimum or
80 empty pockets
1680mm minimum or
210 empty pockets
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
E2
F
W
K0
Wc
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
Pkg type
0.450
+/-
0.150
(8lds)
SOIC
(12mm)
6.50
+/-0.10
5.30
+/-0.10
12.0
+/-0.3
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
10.25
min
5.50
+/-0.05
8.0
+/-0.1
4.0
+/-0.1
2.1
+/-0.10
9.2
+/-0.3
0.06
+/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
0.5mm
maximum
B0
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
Component Rotation
Sketch C (Top View)
Component lateral movement
A0
Sketch B (Top View)
Component Rotation
SOIC(8lds) Reel Configuration: Figure 4.0
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7"Diameter Option
B Min
Dim C
See detail AA
Dim D
min
W3
13" Diameter Option
W2 max Measured at Hub
DETAIL AA
Dim W2
Dimensions are in inches and millimeters
Reel
Option
Tape Size
12mm
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W3 (LSL-USL)
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
7" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
13" Dia
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
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any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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