FPF1014_11 [FAIRCHILD]
IntelliMAX⢠1V-Rated Advanced Load Management Products; IntelliMAXâ ?? ¢ 1V -额定先进的负载管理产品
| 型号： | FPF1014_11 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | IntelliMAX⢠1V-Rated Advanced Load Management Products |
| 文件： | 总11页 (文件大小：710K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 2011
FPF1013 / FPF1014
IntelliMAX™ 1V-Rated Advanced Load Management Products
Features
Description
The FPF1013/14 IntelliMAX™ advanced slew rate load
switch offers very low operating voltage and a 17mΩ N-
channel MOSFET that supports an input voltage up to
2.0V. This slew-rate device control the switch turn-on
and prevent excessive inrush current from supply rails.
The input voltage range operates from 0.8V to 1.8V to
fulfill today's lowest mobile device supply requirements.
Switch control is via a logic input (ON) capable of
interfacing directly with low-voltage control signals.
.
.
.
.
.
.
.
0.8V to 1.8V Input Voltage Range
Typical RDS(ON) = 17mΩ at VON - VIN = 2.0V
Output Discharge Function
Internal Pull-Down at ON Pin
Accurate Slew Rate Controlled Turn-on Time
Low < 1μA Quiescent Current
ESD Protected, above 8kV HBM, 2kV CDM
The FPF1014 has an on-chip pull-down, allowing for
quick and controlled output discharge when the switch is
turned off. The FPF10131/4 is available in a space-
saving six-lead 1mm x 1.5mm Wafer-Level Chip-Scale
Package (WLCSP).
Applications
.
.
.
.
.
.
PDAs
Cell Phones
GPS Devices
MP3 Players
Digital Cameras
Notebook Computers
Figure 1. WLCSP Bump Configuration (Top & Bottom)
Figure 2. Typical Application
Ordering Information
Part Number
Switch
Turn-On Time Output Discharge ON Pin Activity
Package
WLCSP 1x1.5mm
(950µm ±30µm x
1450µm ±30µm x
225µm x 225µm,
see Figure 24)
FPF1013
17mΩ, NMOS
43μs
N/A
Active HIGH
FPF1014
17mΩ, NMOS
43μs
60Ω
Active HIGH
© 2009 Fairchild Semiconductor Corporation
FPF1014 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
Functional Block Diagram
Figure 3. Functional Block Diagram
Pin Configuration
Figure 4. Pin Configuration
Pin Definitions
Pin
A2, B2
C2
Name
VIN
Description
Supply Input: Input to the power switch and the supply voltage for the IC
ON
ON Control Input
A1, B1
C1
VOUT
GND
Switch Output: Output of the power switch
Ground
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min. Max. Units
VIN, VOUT, to GND
VON to GND
-0.3
-0.3
2.0
4.2
V
V
ISW
PD
Maximum Continuous Switch Current
Power Dissipation at TA = 25°C(1)
Operating Temperature Range
Storage Temperature
1.5
A
1.2
W
TA
-40
-65
+85
+150
85
°C
°C
°C/W
V
TSTG
ΘJA
Thermal Resistance, Junction to Ambient
Human Body Model
8000
2000
ESD
Electrostatic Discharge Protection
Charged Device Model
V
Note:
1. Package power dissipation on one-square-inch pad, two-ounce copper board.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VIN
Parameter
Min. Max. Units
Supply Voltage
0.8
-40
1.8
V
TA
Ambient Operating Temperature
+85
°C
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
3
Electrical Characteristics
VIN = 0.8 to 1.8V, TA = -40 to +85°C unless otherwise noted. Typical values are at VIN =1.8V and TA = 25°C.
Symbol
Parameter
Condition
Min. Typ. Max. Units
Basic Operation
VIN
VON(MIN)
VON(MAX)
ICC
Operating Voltage
0.8
1.8
2.8
1.8
4.0
4.0
1
V
V
VIN = 0.8V
VIN = 1.8V(2)
2.8
3.8
ON Input Voltage
V
Operating Current
Quiescent Current
VIN = 1V, VON = 3.3V, VOUT = Open
VIN = 1V, VON = GND, VOUT = Open
VIN = 1.8V, VON = GND, VOUT = GND
μA
μA
μA
IQ
2
ISWOFF Off Switch Current
2
V
IN = 1V, VON = 3V, IOUT = 1A, TA = 25C
17
25
27
38
RON
RPD
On-Resistance
mΩ
VIN = 1V, VON = 2.3V, IOUT = 1A, TA = 25°C
Output Pull-Down
Resistance
VIN = 1V, VON = 0V, IOUT = 1mA, TA = 25°C,
FPF1014
60
120
Ω
VIN = 0.8V, RL = 1KΩ
VIN = 1.8V, RL = 1KΩ
VON = VIN or GND
0.3
0.8
1
ON Input Logic Low
Voltage
VIL
ION
V
On Input Leakage
μA
Dynamic (VIN = 1.0V, VON = 3.0V, TA = 25°C)
RL = 500Ω, CL = 0.1μF
28
38
43
58
14
76
50
96
tR
tON
tF
VOUT Rise Time
Turn-On Time
VOUT Fall Time
Turn-Off Time
μs
μs
μs
μs
RL = 3.3Ω, CL = 10μF
RL = 500Ω, CL = 0.1μF
RL = 3.3Ω, CL = 10μF
FPF1014, RL = 500Ω, CL = 0.1μF
FPF1014, RL = 3.3Ω, CL = 10μF
FPF1014, RL = 500Ω, CL = 0.1μF
FPF1014, RL = 3.3Ω, CL = 10μF
tOFF
Note:
2. VON(MAX) is limited by the Absolute Maximum Rating.
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
4
Typical Performance Characteristics
Figure 5. Supply Current vs. VIN
Figure 6. Off Quiescent Current vs. Temperature
Figure 8. Off Switch Current vs. Temperature
Figure 10. RON vs. VON-VIN
Figure 7. Operating Current vs. Temperature
Figure 9. RON vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
5
Typical Performance Characteristics
Figure 11. VIL vs. VIN
Figure 12. VIL vs. Temperature
Figure 14. tON / tOFF vs. Temperature
Figure 16. FPF1014 Turn-Off Response
Figure 13. tRISE / tFALL vs. Temperature
Figure 15. Turn-On Response
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
6
Typical Performance Characteristics
Figure 17. Turn On Response
Figure 18. FPF1014 Turn-Off Response
Figure 19. FPF1014 Output Pull-Down Response
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
7
Operational Description
The FPF1013/4 are low-RDS(ON) N-channel load switches
with controlled turn-on. The core of each device is a
17mΩ (VIN = 1V, VON = 3V) N-channel MOSFET and is
customized for a low-input operating range of 0.8V to
1.8V. The ON pin controls the state of the switch.
The FPF1014 contains a 60Ω (typical) on-chip resistor,
which is connected internally from VOUT to GND for
quick output discharge when the switch is turned off.
On / Off Control
The ON pin is active HIGH and controls the state of the
switch. Applying a continuous HIGH signal holds the
switch in the ON state. To minimize the switch on
resistance, the ON pin voltage should exceed the input
voltage by 2V. This device is compatible with a GPIO
(General-Purpose Input / Output) port, where the logic
voltage level can be configured to 4V ≥ VON ≥ VIN + 2V
and power consumed is less than 1μA in steady state.
Figure 20. Timing Diagram
where:
tdON
tR
tON
tdOFF
tF
=
=
=
=
=
=
Delay On Time
VOUT Rise Time
Turn-On Time
Delay Off Time
VOUT Fall Time
Turn-Off Time
tOFF
Figure 21. Typical Application
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
8
Application Information
Input Capacitor
To limit the voltage drop on the input supply caused by
transient in-rush currents when the switch turns-on, a
capacitor must be placed between VIN and GND. For
minimized voltage drop, especially when the operating
voltage approaches 1V a 10μF ceramic capacitor should
be placed close to the VIN pins. Higher values of CIN
can be used to further reduce the voltage drop during
higher current modes of operation.
Output Capacitor
A 0.1μF capacitor, CL, should be placed between VOUT
and GND. This capacitor prevents parasitic board
inductance from forcing VOUT below GND when the
switch turns off. If the application has a capacitive load,
the FPF1014 can be used to discharge that load through
an on-chip output discharge path.
Figure 22. Proper Layout of Output, Input, and
Ground Copper Area
Demonstration Board Layout
Board Layout
FPF1013/4 demonstration board has the components
and circuitry to demonstrate the load switches functions.
Thermal performance is improved using techniques
recommended in the layout recommendations section of
datasheet.
For best performance, all traces should be as short as
possible. To be most effective, the input and output
capacitors should be placed close to the device to
minimize the effects that parasitic trace inductances
may have on normal and short-circuit operation. Using
wide traces or large copper planes for all pins (VIN,
VOUT, ON, and GND) helps minimize the parasitic
electrical effects along with minimizing the case-to-
ambient thermal impedance.
Improving Thermal Performance
Improper layout can result in higher junction
temperature. This applies when continuous operation
current is set to maximum allowed current and switch
turns into a large capacitive load that introduces high
inrush current in the transient. Since FPF1013/14 does
not have thermal shutdown feature, proper layout can
essentially reduce power dissipation of the switch in
transient and prevents the switch exceeding the
maximum absolute power dissipation of 1.2W.
Figure 23. Demonstration Board Layout
The VIN, VOUT, and GND pins dissipate most of the
heat generated during a high load current condition. The
layout suggested in Figure 22 provides each pin with
adequate copper so that heat may be transferred as
efficiently as possible out of the device. The ON pin
trace may be laid out diagonally from the device to
maximize the area available to the ground pad. Placing
the input and output capacitors as close to the device as
possible also contributes to heat dissipation, particularly
during high load currents.
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
9
Physical Dimensions
0.03 C
F
E
A
2X
Ø0.20
B
D
Cu Pad
A1
1.00
BALL A1
INDEX AREA
Ø0.30
Solder Mask
0.50
0.03 C
2X
TOP VIEW
RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
0.06 C
0.378±0.018
0.208±0.021
0.625
0.547
E
0.05 C
C
D
SEATING PLANE
SIDE VIEWS
NOTES:
A. NO JEDEC REGISTRATION APPLIES.
B. DIMENSIONS ARE IN MILLIMETERS.
0.005
C A B
Ø0.260±0.02
6X
C. DIMENSIONS AND TOLERANCE
PER ASMEY14.5M, 1994.
0.50
D. DATUM C IS DEFINED BY THE SPHERICAL
CROWNS OF THE BALLS.
C
1.00
B
(Y) ±0.018
F
0.50
A
E. PACKAGE NOMINAL HEIGHT IS 586 MICRONS
±39 MICRONS (547-625 MICRONS).
1
2
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
(X) ±0.018
BOTTOM VIEW
G. DRAWING FILNAME: MKT-UC006AIrev1.
Figure 24. Wafer-Level Chip-Scale Package (WLCSP) 1 x 1.5mm
E
D
X
Y
950µm ±30µm
1450µm ±30µm
225µm
225µm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
10
© 2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.8
www.fairchildsemi.com
11
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