FQU5P10TU [FAIRCHILD]

Power Field-Effect Transistor, 3.6A I(D), 100V, 1.05ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-251, IPAK-3;


型号：	FQU5P10TU
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Power Field-Effect Transistor, 3.6A I(D), 100V, 1.05ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-251, IPAK-3 开关脉冲晶体管
文件：	总11页 (文件大小：658K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

August 2000

QFET

FQD5P10 / FQU5P10

100V P-Channel MOSFET

General Description

Features

These P-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for low voltage applications such as audio amplifier,

high efficiency switching DC/DC converters, and DC motor

control.

•

-3.6A, -100V, R

= 1.05Ω @V = -10 V

DS(on) GS

Low gate charge ( typical 6.3 nC)

Low Crss ( typical 18 pF)

Fast switching

100% avalanche tested

Improved dv/dt capability

●

▶

▲

●

I-PAK

FQU Series

D-PAK

FQD Series

Absolute Maximum Ratings

T = 25°C unless otherwise noted

Symbol

Parameter

FQD5P10 / FQU5P10

Units

Drain-Source Voltage

-100

-3.6

DSS

- Continuous (T = 25°C)

Drain Current

- Continuous (T = 100°C)

-2.28

-14.4

± 25

(Note 1)

Drain Current

- Pulsed

Gate-Source Voltage

GSS

(Note 2)

(Note 1)

(Note 3)

Single Pulsed Avalanche Energy

Avalanche Current

-3.6

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

2.5

V/ns

dv/dt

-6.0

Power Dissipation (T = 25°C) *

2.5

Power Dissipation (T = 25°C)

- Derate above 25°C

Operating and Storage Temperature Range

0.2

W/°C

°C

T , T

-55 to +150

STG

Maximum lead temperature for soldering purposes,

300

°C

1/8" from case for 5 seconds

Thermal Characteristics

Symbol

Parameter

Typ

Max

5.0

Units

°C/W

Thermal Resistance, Junction-to-Case

Thermal Resistance, Junction-to-Ambient *

Thermal Resistance, Junction-to-Ambient

θJC

θJA

110

* When mounted on the minimum pad size recommended (PCB Mount)

Rev. A, August 2000

Electrical Characteristics

T = 25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

Off Characteristics

= 0 V, I = -250 µA

GS D

Drain-Source Breakdown Voltage

-100

DSS

∆BV

Breakdown Voltage Temperature

Coefficient

DSS

= -250 µA, Referenced to 25°C

-0.1

V/°C

∆T

= -100 V, V = 0 V

-1

µA

DSS

Zero Gate Voltage Drain Current

= -80 V, T = 125°C

-10

= -25 V, V = 0 V

Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

-100

100

GSSF

= 25 V, V = 0 V

GSSR

On Characteristics

= V , I = -250 µA

Gate Threshold Voltage

-2.0

-4.0

1.05

Ω

GS(th)

Static Drain-Source

On-Resistance

DS(on)

= -10 V, I = -1.8 A

0.82

2.3

= -40 V, I = -1.8 A

(Note 4)

Forward Transconductance

Dynamic Characteristics

Input Capacitance

190

250

iss

= -25 V, V = 0 V,

Output Capacitance

oss

rss

f = 1.0 MHz

Reverse Transfer Capacitance

Switching Characteristics

Turn-On Delay Time

Turn-On Rise Time

Turn-Off Delay Time

Turn-Off Fall Time

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

150

8.2

d(on)

= -50 V, I = -4.5 A,

6.3

1.7

3.0

= 25 Ω

d(off)

(Note 4, 5)

= -80 V, I = -4.5 A,

= -10 V

Drain-Source Diode Characteristics and Maximum Ratings

Maximum Continuous Drain-Source Diode Forward Current

-3.6

-14.4

-4.0

Maximum Pulsed Drain-Source Diode Forward Current

= 0 V, I = -3.6 A

Drain-Source Diode Forward Voltage

Reverse Recovery Time

= 0 V, I = -4.5 A,

0.27

µC

(Note 4)

dI / dt = 100 A/µs

Reverse Recovery Charge

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 6.4mH, I = -3.6A, V = -25V, R = 25 Ω, Starting T = 25°C

3. I ≤ -4.5A, di/dt ≤ 300A/µs, V ≤ BV Starting T = 25°C

DSS, J

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

Rev. A, August 2000

Typical Characteristics

10¹

V_GS

Top :

-15.0 V

-10.0 V

-8.0 V

-7.0 V

-6.5 V

-5.5 V

-5.0 V

10¹

10⁰

Bottom: -4.5 V

℃

150

10⁰

-1

℃

※

Notes :

※

Note :

℃

-55

1. V_DS= -40V

1. 250 s Pulse Test

2. T_C= 25

2. 250 s Pulse Test

℃

-2

-1

10⁰

10¹

-V_GS, Gate-Source Voltage [V]

-V_DS, Drain-Source Voltage [V]

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

2.5

2.0

1.5

1.0

0.5

0.0

10¹

V_GS= - 10V

V_GS= - 20V

10⁰

℃

150

※

Notes :

1. V_GS= 0V

※

℃

Note : T = 25

2. 250 s Pulse Test

-1

0.0

0.5

1.0

1.5

2.0

2.5

3.0

-I_D, Drain Current [A]

-V_SD, Source-Drain Voltage [V]

Figure 3. On-Resistance Variation vs.

Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

500

450

400

350

300

250

200

150

100

_iss= C_gs+ C_gd(C_ds= shorted)

C_oss= C_ds+ C_gd

C_rss= C_gd

V_DS= -20V

V_DS= -50V

C_oss

V_DS= -80V

iss

※

Notes :

1. V_GS= 0 V

2. f = 1 MHz

rss

※

Note : I_D= -4.5 A

10^-1

10⁰

10¹

Q_G, Total Gate Charge [nC]

-V_DS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics

Figure 6. Gate Charge Characteristics

Rev. A, August 2000

Typical Characteristics (Continued)

1.2

1.1

1.0

3.0

2.5

2.0

1.5

1.0

0.5

0.0

※Notes :

1. V_GS= 0 V

2. I_D= -250

0.9

※

Notes :

1. V_GS= -10 V

μA

2. I_D= -1.8A

0.8

-100

-50

100

150

200

-50

100

150

200

T_J, Junction Temperature [^oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

Figure 8. On-Resistance Variation

vs. Temperature

Operation in This Area

is Limited by R _DS(on)

10¹

100 µs

1 ms

10 ms

10⁰

※

Notes :

1. T_C= 25 ^o

2. T_J= 150 ^o

3. Single Pulse

-1

10⁰

10¹

10²

100

125

150

℃

T_C, Case Temperature [

]

-V_DS, Drain-Source Voltage [V]

Figure 9. Maximum Safe Operating Area

Figure 10. Maximum Drain Current

vs. Case Temperature

D = 0 .5

※

N o te s

1 . Z _θ_{J C}(t)

2 . D u ty F a c to r, D = t₁/t₂

3 . T _{J M}T _CP _DZ _θ_{J C}(t)

1 0 ⁰

0 .2

℃

/W M a x.

5 .0

0 .1

0 .0 5

0 .0 2

0 .0 1

P_DM

1 0^-1

t₁

s in g le p u ls e

t₂

1 0 ^-5

1 0^-4

1 0 ^-3

1 0 ^-2

1 0 ^-1

1 0 ⁰

1 0 ¹

t₁, S q u a re W a v e P u ls e D u ra tio n [s e c ]

Figure 11. Transient Thermal Response Curve

Rev. A, August 2000

Gate Charge Test Circuit & Waveform

V_GS

Same Type

50KΩ

as DUT

Q_g

12V

200nF

-10V

300nF

V_DS

V_GS

Q_gs

Q_gd

DUT

-3mA

Charge

Resistive Switching Test Circuit & Waveforms

R_L

t _on

t _off

V_DS

t_d(on)

t_r

t_d(off)

t_f

V_DD

V_GS

R_G

10%

DUT

-10V

90%

V_DS

Unclamped Inductive Switching Test Circuit & Waveforms

BV_DSS

--------------------

BV_DSS- V_DD

----

E_AS

LI_AS

V_DS

I _D

t _p

Time

V_DD

V_DS(t)

R_G

V_DD

I_D(t)

DUT

-10V

I_AS

t _p

BV_DSS

Rev. A, August 2000

Peak Diode Recovery dv/dt Test Circuit & Waveforms

V_DS

DUT

I _SD

Driver

R_G

Compliment of DUT

(N-Channel)

V_DD

V_GS

• dv/dt controlled by R_G

• I_SDcontrolled by pulse period

Gate Pulse Width

--------------------------

V_GS

D =

Gate Pulse Period

10V

( Driver )

Body Diode Reverse Current

I_RM

I _SD

( DUT )

di/dt

I_FM, Body Diode Forward Current

V_SD

V_DS

( DUT )

Body Diode

V_DD

Forward Voltage Drop

Body Diode Recovery dv/dt

Rev. A, August 2000

Package Dimensions

DPAK

6.60 ±0.20

5.34 ±0.30

2.30 ±0.10

0.50 ±0.10

(0.50)

(4.34)

(0.50)

MAX0.96

0.76 ±0.10

0.50 ±0.10

1.02 ±0.20

2.30 ±0.20

2.30TYP

[2.30±0.20]

6.60 ±0.20

(5.34)

(5.04)

(1.50)

(2XR0.25)

0.76 ±0.10

Rev. A, August 2000

Package Dimensions ^(Continued)

IPAK

2.30 ±0.20

0.50 ±0.10

6.60 ±0.20

5.34 ±0.20

(0.50)

(4.34)

(0.50)

MAX0.96

0.76 ±0.10

0.50 ±0.10

2.30TYP

[2.30±0.20]

Rev. A, August 2000

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not

intended to be an exhaustive list of all such trademarks.

VCX™

ACEx™

FASTr™

QFET™

Bottomless™

CoolFET™

CROSSVOLT™

DOME™

GlobalOptoisolator™

GTO™

HiSeC™

QS™

QT Optoelectronics™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

TinyLogic™

UHC™

ISOPLANAR™

MICROWIRE™

OPTOLOGIC™

OPTOPLANAR™

POP™

E²CMOS™

EnSigna™

FACT™

FACT Quiet Series™

FAST^®

PowerTrench^®

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

INTERNATIONAL.

As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or In

Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. F1

Product Folder - Fairchild P/N FQU5P10 - 100V P-Channel QFET

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FQU5P10

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