FSA3200UMX_技术文档

November 2012

FSA3200 —Two-Port, High-Speed USB2.0 Switch with

Mobile High-Definition Link (MHL™)

Features

Description

.

Low On Capacitance: 2.7 pF / 3.1 pF MHL / USB

(Typical)

The FSA3200 is a bi-directional, low-power, two-port,

high-speed, USB2.0 and video data switch. Configured

as a double-pole, double-throw (DPDT) switch for data

and a single-pole, double-throw (SPDT) switch for ID; it

is optimized for switching between high- or full-speed

USB and Mobile Digital Video sources (MDV), including

supporting the MHL™ Rev. 2.0 specification.

.

Low Power Consumption: 30μA Maximum

Supports MHL Rev. 2.0

MHL Data Rate: 4.68 Gbps

V_BUSPowers Device with No V_CC

Packaged in 16-Lead UMLP (1.8 x 2.6 mm)

The FSA3200 contains special circuitry on the switch

I/O pins, for applications where the V_CCsupply is

powered off (V_CC=0), that allows the device to withstand

an over-voltage condition. This switch is designed to

minimize current consumption even when the control

voltage applied to the control pins is lower than the

supply voltage (V_CC). This feature is especially valuable

to mobile applications, such as cell phones, allowing

direct interface with the general-purpose I/Os of the

baseband processor. Other applications include

switching and connector sharing in portable cell phones,

digital cameras, and notebook computers.

Over-Voltage Tolerance (OVT) on all USB Ports

Up to 5.25 V without External Components

Applications

.

Cell Phones and Digital Cameras

Ordering Information

Part Number Top Mark Operating Temperature Range

Package

16-Lead, Ultrathin Molded Leadless Package

(UMLP), 1.8 x 2.6 mm

FSA3200UMX

GB

-40 to +85°C

Figure 1. Analog Symbol

All trademarks are the property of their respective owners.

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

Switch Power Operation

In normal operation, the FSA3200 is powered from the

V_CCpin, which typically is derived from a regulated

power management device. In special circumstances,

such as production test or system firmware upgrade, the

device can be powered from the V_BUSpin. In this mode

of operation, a valid V_BUSvoltage is present (per USB2.0

specification) and V_CC=0 V, typically due to a no-battery

condition. With the SELn pins strapped LOW (via

external resistor), the FSA3200 closes the USB path,

enabling the initial programming of the system directly

from the USB connector. Once the system has normal

operating supply power with V_CCpresent, the V_BUS

supply is not utilized and normal switch operation

commences. Optionally, the Power Select Override

(PSO) pin can be set HIGH to force the device to be

powered from V_BUS

.

The V_BUS/ V_CCdetection capability is not intended to be

an accurate determination of the voltages present,

rather a state condition detection to determine which

supply should be used. These state determinations rely

on the voltage conditions as described in the Electrical

Characterization tables below.

V_BUS

V_CC

PSO

Switch

Power

Selection

Switch

Power

Source

Charge Pump

& Regulator

Switch

Power

Figure 2. Simplified Logic of Switch Power Selection Circuit

Table 1. Switch Power Selection Truth Table

V_CC

0

V_BUS

PSO⁽¹⁾

Switch Power Source

0

1

0

1

0

1

0

1

0

1

No switch power, switch paths high-Z

0

V_BUS

1

V_CC

1

V_CC

0

No switch power, switch paths high-Z

V_BUS

0

(2)

1

V_CC

1

V_BUS

Notes:

1. Control inputs should never be left floating or unconnected. If the PSO function is used, a weak pull-up resistor

(3 MΩ) should be used to minimize static current draw. If the PSO function is not used, tie directly to GND.

2. PSO control is overridden with no V_BUSand the power selection is switched to V_CC

.

Table 2. Data Switch Select Truth Table

SEL1⁽³⁾

SEL2⁽³⁾

Function

0

1

0

1

0

1

D+/D- connected to USB+/USB-, ID_COconnected to ID_USB

D+/D- connected to USB+/USB-, ID_COMconnected to ID_MDV

D+/D- connected to MDV+/MDV-, ID_COMconnected to ID_USB

D+/D- connected to MDV+/MDV-, ID_COMconnected to ID_MDV

Note:

3. Control inputs should never be left floating or unconnected. To guarantee default switch closure to the USB

position, the SEL pins should be tied to GND with a weak pull- down resistor (3 MΩ) to minimize static current draw.

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

2

Pin Configuration

Figure 3. Pin Assignments (Top-Through View)

Pin Definitions

Pin#

Name

GND

D+

Description

1

Ground

2

Data Switch Output (Positive)

Data Switch Output (Negative)

Power Select Override

3

D-

4

PSO

SEL1

USB-

USB+

GND

SEL2

MDV-

MDV+

ID_USB

ID_MDV

ID_COM

V_BUS

5

Data Switch Select

6

USB Differential Data (Negative)

USB Differential Data (Positive)

Ground

7

8

9

ID Switch Select

10

MDV Differential Data (Negative)

MDV Differential Data (Positive)

ID Switch MUX Output for USB

ID Switch MUX Output for MDV

ID Switch Common

11

12

13

14

15

Device Power when V_CCNot Available

Device Power from System⁽⁴⁾

16

V_CC

Note:

4. Device automatically switches from V_BUSwhen valid V_CCminimum voltage is present.

www.fairchildsemi.com

FSA3200 • Rev. 1.0.8

3

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol

Parameter

Min.

-0.5

-0.50

-50

Max.

5.5

Unit

V

V_CC,V_BUSSupply Voltage

V_CNTRL

DC Input Voltage (SELn, PSO)⁽⁵⁾

V_CC

V

(6)

V_SW

DC Switch I/O Voltage⁽⁵⁾

DC Input Diode Current

DC Output Current

5.25

V

I_IK

mA

°C

I_OUT

T_STG

MSL

100

+150

1

Storage Temperature

-65

Moisture Sensitivity Level (JEDEC J-STD-020A)

Human Body Model, JEDEC: JESD22-A114

IEC 61000-4-2, Level 4, for D+/D- and V_CCPins⁽⁷⁾

Charged Device Model, JESD22-C101

All Pins

Contact

Air

3.5

8.0

ESD

kV

15.0

2.0

Notes:

5. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed.

6. _SWrefers to analog data switch paths (USB, MDV, and ID).

V

7. Testing performed in a system environment using TVS diodes.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol

V_BUS

Parameter

Supply Voltage Running from V_BUSVoltage

Supply Voltage Running from V_CC

Min.

4.20

2.7

Max.

5.25

4.5

Unit

V

V_CC

V

t_RAMP(VBUS)Power Supply Slew Rate from V_BUS

100

1000

336

µs/V

C°/W

V

t_RAMP(VCC)

Power Supply Slew Rate from V_CC

Thermal Resistance

Θ_JA

V_CNTRL

V_SW(USB)

V_SW(MDV)

T_A

Control Input Voltage (SELn, PSO)⁽⁸⁾

Switch I/O Voltage (USB and ID Switch Paths)

Switch I/O Voltage (MDV Switch Path)

Operating Temperature

0

4.5

-0.5

1.65

-40

3.6

V

3.45

+85

V

°C

Note:

8. The control inputs must be held HIGH or LOW; they must not float.

www.fairchildsemi.com

FSA3200 • Rev. 1.0.8

4

DC Electrical Characteristics

All typical value are at T_A=25°C unless otherwise specified.

T_A=- 40ºC to +85ºC

Min. Typ. Max.

-1.2

Symbol

Parameter

Condition

V_CC(V)

Unit

V_IK

V_IH

Clamp Diode Voltage

I_IN=-18 mA

2.7

V

Control Input Voltage High

SELn, PSO

2.7 to 4.3 1.25

2.7 to 4.3

V_IL

I_IN

Control Input Voltage Low

Control Input Leakage

0.6

1

V

V_SW=0 V to 3.6 V,

V_CNTRL=0 V to 1.98 V

4.3

0

-1

µA

Off-State Leakage for Open

MDV Data Paths

V_SW=1.65 V ≤ MDV

≤ 3.45 V

I_OZ(MDV)

I_OZ(USB)

I_OZ(ID)

1

µA

Ω

Off-State Leakage for Open

USB Data Paths

-1

V_SW=0 V ≤ USB ≤ 3.6 V

V_SW=0 V ≤ ID ≤ 3.6 V

Off-State Leakage for Open ID

Data Path

-0.5

-1

0.5

1

On-State Leakage for Closed V_SW=1.65 V ≤ MDV

I_CL(MDV)

I_CL(USB)

I_CL(ID)

MDV Data Paths⁽⁹⁾

≤ 3.45 V

On-State Leakage for Closed

-1

1

V_SW=0 V ≤ USB ≤ 3.6 V

V_SW=0 V ≤ ID ≤ 3.6 V

USB Data Paths⁽⁹⁾

On-State Leakage for

Closed⁽⁹⁾ID Data Path

-0.5

-1

0.5

1

Power-Off Leakage Current

(All I/O Ports)

I_OFF

V_SW=0 V or 3.6 V, Figure 5

HS Switch On Resistance

(USB to D Path)

V_SW=0.4 V, I_ON=-8 mA

Figure 4

R_ON(USB)

R_ON(MDV)

R_ON(ID)

2.7

4.3

3.9

5

6.5

HS Switch On Resistance

(MDV to D Path)

V_SW=V_CC-1050mV,

_ON=-8mA, Figure 4

Ω

I

LS Switch On Resistance

(ID Path)

V_SW=3V, I_ON=-8mA

Figure 4

12

Ω

Difference in R_ONBetween

MDV Positive-Negative

V_SW=V_CC-1050 mV,

_ON=-8 mA, Figure 4,

0.03

0.18

0.4

1

∆R_ON(MDV)

∆R_ON(USB)

∆R_ON(ID)

Ω

I

Difference in R_ONBetween

USB Positive-Negative

V_SW=0.4 V, I_ON=-8 mA

Figure 4

Ω

Difference in R_ONBetween ID V_SW=3 V, I_ON=-8 mA

Switch Paths

Ω

Figure 4

V_SW=1.65 V to 3.45 V,

I_ON=-8 mA, Figure 4

R_ONF(MDV)Flatness for R_ONMDV Path

Ω

V_BUS=5.25 V, V_CNTRL=0 V or

1.98 V, I_OUT=0

I_VBUS

I_CC

Note:

V_BUSQuiescent Current

V_CCQuiescent Current

100

30

µA

V_BUS=0 V, V_CNTRL=0 V or

1.98 V, I_OUT=0

9. For this test, the data switch is closed with the respective switch pin floating.

www.fairchildsemi.com

FSA3200 • Rev. 1.0.8

5

AC Electrical Characteristics

All typical value are for V_CC=3.3 V and T_A=25°C unless otherwise specified.

T_A=- 40ºC to +85ºC

Min. Typ. Max.

Symbol

Parameter

Condition

V_CC(V)

Unit

R_L=50 Ω, C_L=5 pF,

Turn-On Time,

SELn to Output

V_SW(USB)=0.8 V,

V_SW(MDV)=3.3 V,

Figure 6, Figure 7

t_ON

2.7 to 3.6

445

600

300

ns

R_L=50 Ω, C_L=5 pF,

Turn-Off Time,

SELn to Output

t_OFF

V_SW(USB)=0.8 V, V_SW(MDV)=3.3V, 2.7 to 3.6

125

ns

Figure 6, Figure 7

C_L=5 pF, R_L=50 Ω,

Figure 6, Figure 8

t_PD

Propagation Delay⁽¹⁰⁾

Break-Before-Make⁽¹⁰⁾

2.7 to 3.6

0.25

R_L=50 Ω, C_L=5 pF,

V_ID=V_MDV=3.3 V, V_USB=0.8 V,

Figure 10

t_BBM

2.0

13

V_S=1 V_pk-pk, R_L=50 Ω,

f=240 MHz, Figure 12

O_IRR(MDV)

O_IRR(USB)

Xtalk_MDV

Xtalk_USB

2.7 to 3.6

-45

-38

-44

-39

dB

Off Isolation⁽¹⁰⁾

V_S=400m V_pk-pk, R_L=50Ω,

f=240MHz, Figure 12

V_S=1 V_pk-pk, R_L=50 Ω,

f=240 MHz, Figure 13

Non-Adjacent Channel⁽¹⁰⁾

Crosstalk

V_S=400 mV_pk-pk, R_L=50 Ω,

f=240 MHz, Figure 13

V_IN=1 V_pk-pk, MDV Path,

R_L=50 Ω, C_L=0 pF,

2.34

Figure 11, Figure 16

GHz

MHz

Differential -3 db

Bandwidth⁽¹⁰⁾

V_IN=400 mV_pk-pk, USB Path,

R_L=50 Ω, C_L=0 pF,

Figure 11, Figure 17

BW

2.7 to 3.6

1.59

100

ID Path, R_L=50 Ω, C_L=0 pF,

Figure 11

Note:

10. Guaranteed by characterization.

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

6

USB High-Speed AC Electrical Characteristics

Typical values are at T_A= -40ºC to +85ºC.

Symbol

Parameter

Condition

V_CC(V)

3.0 to 3.6

Typ. Unit

Skew of Opposite Transitions of the Same

Output⁽¹¹⁾

t_SK(P)

C_L=5 pF, R_L=50 Ω, Figure 9

3

ps

R_L=50 ꢀ, C_L=5 pf,

t_R=t_F=500 ps (10-90%) at

480 Mbps, PN7

t_J

Total Jitter⁽¹¹⁾

15

Note:

11. Guaranteed by characterization.

MDV AC Electrical Characteristics

Typical values are at T_A= -40ºC to +85ºC.

Symbol

Parameter

Condition

V_CC(V)

Typ. Unit

Skew of Opposite Transitions of the Same

Output⁽¹²⁾

t_SK(P)

3.0 to 3.6

3

ps

R_PU=50 Ω to V_CC, C_L=0 pF

f=2.25 Gbps, PN7,

t_J

Total Jitter⁽¹²⁾

3.0 to 3.6

15

R_PU=50 Ω to V_CC, C_L=0 pF

Note:

12. Guaranteed by characterization.

Capacitance

Typical values are at T_A= -40ºC to +85ºC.

Symbol

Parameter

Condition

Typ. Unit

C_IN

Control Pin Input Capacitance⁽¹³⁾

V_CC=0 V, f= 1 MHz

1.5

3.1

C_ON(USB)USB Path On Capacitance⁽¹³⁾

C_OFF(USB)USB Path Off Capacitance⁽¹³⁾

C_ON(MDV)MDV Path On Capacitance⁽¹³⁾

C_OFF(MDV)MDV Path Off Capacitance⁽¹³⁾

V_CC=3.3 V, f=240 MHz, Figure 15

V_CC=3.3 V, f=240 MHz, Figure 14

V_CC=3.3 V, f=240 MHz, Figure 15

V_CC=3.3 V, f=240 MHz, Figure 14

1.6

2.7

1.1

pF

Note:

13. Guaranteed by characterization.

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

7

Test Diagrams

Note:

14. HSD refers to the high-speed data USB or MDV paths.

V

ON

I_Dn(OFF)

NC

A

HSD

n

Dn

V

SW

V

SW

Select

GND

I_ON

GND

V

_Sel= 0 orVcc

Select

**Each switch port is tested separately

V

_Sel= 0 orV _C

R

= V_O/ I_ON

O

Figure 4. On Resistance

Figure 5. Off Leakage

t_RISE

t_FALL

= 2.5ns

V

CC

90%

V

GND

Input–V , V

SEL1

SEL

V

CNTRL-HI

10%

90%

GND

V

OH

90%

Output- V

OUT

V_OL

t_ON

t_OFF

Figure 6. AC Test Circuit Load

Figure 7. Turn-On / Turn-Off Waveforms

t_RISE

t_FALL

= 500ps

+400mV

-400mV

400mV

90%

0V

90%

50%

Input

0V

10%

t_PLH

t_PHL

V_OH

Output

50%

Output

V_OL

t_PHL

t_PLH

Figure 8. Propagation Delay (t_Rt_F– 500 ps)

Figure 9. Intra-Pair Skew Test t_SK(P)

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

8

Test Diagrams (Continued)

t_RISE= 2.5ns

Vcc

HSD

n

90%

Vcc/2

Dn

C

Input -

V

Sel

SW1

10%

0V

V_OUT

GND

L

R

V

L

SW2

V_OUT

GND

0.9*Vout

GND

0.9*Vout

R

S

t_BBM

V

Sel

R_L, R and C_Lare function of application

GND

S

environment (see AC Tables for specific values)

C_Lincludes test fixture and stray capacitance

Figure 10. Break-Before-Make Interval Timing

Network Analyzer

Network

Analyzer

Network Analyzer

FSA3200

R

S

R

S

V

S

V

IN

V

IN

OUT

V

GND

S

R

T

GND

OUT

GND

V

R

GND

S

Sel

V

OUT

GND

R

T

V

GND

IN

R

V

S

T

GND

R_Sand R_Tare functions of the application

environment (see AC Tables for specific values).

Off isolation = 20 Log (V_OUT/ V_IN

GND

V_S, R_Sand R_Tare function of application

environment (see AC/DC Tables for values)

)

Figure 11. Insertion Loss

Figure 12. Channel Off Isolation

Network Analyzer

NC

R

S

V

IN

V

GND

S

GND

V

Sel

GND

R

T

GND

V

OUT

GND

R

T

R_Sand R_Tare functions of the application environment

(see AC Tables for specific values).

GND

Crosstalk = 20 Log (V_OUT/ V_IN)

Figure 13. Non-Adjacent Channel-to-Channel Crosstalk

HSD

n

Capacitance

n

S

Meter

S

V

Capacitance

Meter

V

= 0 or V

cc

Sel

= 0 or V

cc

Sel

HSD

n

Figure 14. Channel Off Capacitance

Figure 15. Channel On Capacitance

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

9

Insertion Loss

One of the key factors for using the FSA3200 in mobile

digital video applications is the small amount of insertion

loss experienced by the received signal as it passes

through the switch. This results in minimal degradation

of the received eye. One of the ways to measure the

quality of the high data rate channels is using balanced

ports and 4-port differential S-parameter analysis,

particularly SDD21.

Bandwidth is measured using the S-parameter SDD21

methodology. Figure 16 shows the bandwidth (GHz) for

the MDV path and Figure 17 the bandwidth curve for the

USB path.

Figure 16. MDV Path SDD21 Insertion Loss Curve

Figure 17. USB Path SDD21 Insertion Loss Curve

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

10

Typical Applications

Figure 18 shows the FSA3200 utilizing the V_BUS

connection from the micro-USB connector. The 3M

resistor is used to ensure, for manufacturing test via the

micro-USB connector, that the FSA3200 configures for

connectivity through the FSA9280A accessory switch.

Figure 19 shows the configuration for the FSA3200 “self

powered” by the battery only.

Figure 18. Typical FSA3200 Application Using V_BUS

Figure 19. Typical FSA3200 “Self-Powered” Application Using V_BAT

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

11

Physical Dimensions

2.10

0.563(15X)

0.10

C

1.80

A

B

0.663

0.40

2X

1

2.60

2.90

PIN#1 IDENT

0.10

C

TOP VIEW

0.225

(16X)

2X

RECOMMENDED

LAND PATTERN

0.55 MAX.

0.152

0.10

0.08

C

TERMINAL SHAPE VARIANTS

SEATING

PLANE

C

0.05

0.00

0.40

0.60

SIDE VIEW

0.30

0.50

0.15

0.25

0.15

0.25

0.10

15X

0.45

0.10

0.35

PIN 1

NON-PIN 1

5

Supplier 1

9

0.40

0.30

0.50

0.15

0.25

0.15

15X

0.25

0.30

0.50

15X

1

PIN 1

NON-PIN 1

PIN#1 IDENT

Supplier 2

13

0.25

0.15

16

0.55

0.45

0.10

0.05

C

A B

BOTTOM VIEW

R0.20

PACKAGE

EDGE

NOTES:

A. PACKAGE DOES NOT FULLY CONFORM TO

JEDEC STANDARD.

LEAD

OPTION 2

SCALE : 2X

LEAD

OPTION 1

SCALE : 2X

B. DIMENSIONS ARE IN MILLIMETERS.

C. DIMENSIONS AND TOLERANCES PER

ASME Y14.5M, 1994.

D. LAND PATTERN RECOMMENDATION IS

BASED ON FSC DESIGN ONLY.

E. DRAWING FILENAME: MKT-UMLP16Arev4.

F. TERMINAL SHAPE MAY VARY ACCORDING

TO PACKAGE SUPPLIER, SEE TERMINAL

SHAPE VARIANTS.

Figure 20. 16-Lead, Ultrathin Molded Leadless Package (UMLP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,

specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

12

FSA3200 • Rev. 1.0.8

www.fairchildsemi.com

13


型号：	FSA3200UMX
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Two-Port, High-Speed USB2.0 Switch with Mobile High-Definition Link (MHLâ¢) 双端口，高速USB 2.0开关，移动高清连接技术（ MHLâ ?? ¢ ）开关
文件：	总13页 (文件大小：780K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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