FSTU3125MX [FAIRCHILD]
Bus Switch ; 总线开关\n
| 型号： | FSTU3125MX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Bus Switch
|
| 文件： | 总7页 (文件大小：139K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 2001
Revised August 2001
FSTU3125
4-Bit Bus Switch with −2V Undershoot Protection
General Description
Features
The Fairchild Switch FSTU3125 provides four high-speed
CMOS TTL-compatible bus switches. The low On Resis-
tance of the switch allows inputs to be connected to out-
puts without adding propagation delay or generating
additional ground bounce noise. The A and B Ports are
protected against undershoot to support an extended
range to 2.0V below ground. Fairchild’s integrated Under-
shoot Hardened Circuit (UHC ) senses undershoot at the
I/O and responds by preventing voltage differentials from
developing and turning the switch on.
■ Undershoot hardened to −2V (A and B Ports)
■ 4Ω switch connection between two ports
■ Minimal propagation delay through the switch
■ Low lCC
■ Zero bounce in flow-through mode
■ Control inputs compatible with TTL level
■ See application notes AN-5008 and AN-5021 for details
on undershoot
The device is organized as four 1-bit switches with sepa-
rate OE inputs. When OE is LOW, the switch is ON and
Port A is connected to Port B. When OE is HIGH, the
switch is OPEN and
between the two ports.
a high-impedance state exists
Ordering Code:
Order Number
FSTU3125M
Package Number
Package Description
M14A
MQA16
MTC14
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
FSTU3125QSC
FSTU3125MTC
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Descriptions
Pin Name
Description
Pin Assignment for SOIC and TSSOP
OE1, OE2, OE3, OE4 Bus Switch Enables
1A, 2A, 3A, 4A
1B, 2B, 3B, 4B
NC
Bus A
Bus B
Not Connected
Truth Table
Inputs
Inputs/Outputs
OE
L
A,B
A = B
Z
Pin Assignment for QSOP
H
© 2001 Fairchild Semiconductor Corporation
DS500449
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Logic Diagram
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC
)
−0.5V to +7.0V
−2.0V to +7.0V
−0.5V to +7.0V
−50 mA
DC Switch Voltage (VS)
Power Supply Operating (VCC
Input Voltage (VIN
Output Voltage (VOUT
)
4.0V to 5.5V
0V to 5.5V
0V to 5.5V
DC Input Voltage (VIN)(Note 2)
DC Input Diode Current (lIK) VIN < 0V
DC Output (IOUT) Sink Current
)
)
128 mA
Input Rise and Fall Time (tr, tf)
Switch Control Input
DC VCC/GND Current (ICC/IGND
)
+/− 100 mA
0 ns/V to 5 ns/V
0 ns/V to DC
Storage Temperature Range (TSTG
)
−65°C to +150 °C
Switch I/O
Free Air Operating Temperature (TA)
−40 °C to +85 °C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
T
A = −40 °C to +85 °C
VCC
(V)
Symbol
Parameter
Units
Conditions
Min
Typ
Max
(Note 4)
VIK
Clamp Diode Voltage
4.5
4.0–5.5
4.0–5.5
5.5
−1.2
V
V
V
IIN = −18 mA
VIH
VIL
II
HIGH Level Input Voltage
LOW Level Input Voltage
Input Leakage Current
2.0
0.8
±1.0
10
±1.0
7
0 ≤ VIN ≤ 5.5V
IN = 5.5V
0 ≤ A, B ≤ VCC
µA
0
V
IOZ
OFF-STATE Leakage Current
Switch On Resistance
(Note 5)
5.5
µA
Ω
RON
4.5
4
4
VIN = 0V, IIN = 64 mA
VIN = 0V, IIN = 30 mA
VIN = 2.4V, IIN = 15 mA
VIN = 2.4V, IIN = 15 mA
VIN = VCC or GND,
4.5
7
Ω
4.5
8
15
20
3
Ω
4.0
11
Ω
ICC
Quiescent Supply Current
Increase in ICC per Input
Voltage Undershoot
5.5
µA
IOUT = 0
∆ICC
5.5
5.5
2.5
mA
V
One input at 3.4V.
Other inputs at VCC or GND
0.0 mA ≥ IIN ≥ −50 mA
OE = 5.5V
VIKU
−2.0
Note 4: Typical values are at VCC = 5.0V and TA = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
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AC Electrical Characteristics
T
A = −40 °C to +85 °C,
C
L = 50pF, RU = RD = 500Ω
Figure
Number
Symbol
Parameter
Units
Conditions
V
CC = 4.5 – 5.5V VCC = 4.0V
Min Max
Min
Max
tPHL, tPLH
tPZH, tPZL
Propagation Delay Bus to Bus (Note 6)
Output Enable Time
0.25
0.25
ns
ns
VI = OPEN
Figures
2, 3
1.0
1.5
6.1
6.4
6.0
VI = 7V for tPZL
Figures
2, 3
VI = OPEN for tPZH
VI = 7V for tPLZ
tPHZ, tPLZ
Output Disable Time
6.6
ns
Figures
2, 3
VI = OPEN for tPHZ
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance (Note 7)
Symbol
CIN
CI/O
Parameter
Typ
Max
Units
Conditions
CC = 5.0V
VCC, OE = 5.0V
Control Pin Input Capacitance
3
pF
V
Input/Output Capacitance
5
pF
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
Undershoot Characteristic (Note 8)
Symbol
Parameter
Min
Typ
OH − 0.3
Max
Units
Conditions
VOUTU
Output Voltage During Undershoot
2.5
V
V
Figure 1
Note 8: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage
undershoot event.
FIGURE 1.
Device Test Conditions
Transient
Input Voltage (V ) Waveform
Parameter
VIN
Value
See Waveform
100K
Units
IN
V
Ω
V
V
R1 - R2
VTRI
11.0
VCC
5.5
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4
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500ns
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
5
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Package Number MQA16
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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