RMPA39200 [FAIRCHILD]

37-40 GHz 1.6 Watt Power Amplifier MMIC; 37-40 GHz的1.6瓦功率放大器MMIC
RMPA39200
型号: RMPA39200
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

37-40 GHz 1.6 Watt Power Amplifier MMIC
37-40 GHz的1.6瓦功率放大器MMIC

放大器 功率放大器
文件: 总8页 (文件大小:237K)
中文:  中文翻译
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June 2004  
RMPA39200  
37–40 GHz 1.6 Watt Power Amplifier MMIC  
General Description  
Features  
The Fairchild Semiconductor’s RMPA39200 is a high  
efficiency power amplifier designed for use in point to point  
and point to multi-point radios, and various communi-  
cations applications. The RMPA39200 is a 3-stage GaAs  
MMIC amplifier utilizing our advanced 0.15µm gate length  
Power PHEMT process and can be used in conjunction  
with other driver or power amplifiers to achieve the required  
total power output.  
• 19dB small signal gain (typ.)  
• 32dBm power out (typ.)  
• Circuit contains individual source vias  
• Chip size 4.28mm x 3.19mm  
Device  
Absolute Ratings  
Symbol  
Parameter  
Positive DC Voltage (+5V Typical)  
Negative DC Voltage  
Ratings  
Units  
V
Vd  
Vg  
+6  
-2  
+8  
V
Vdg  
Simultaneous (Vd–Vg)  
V
I
Positive DC Current  
2352  
mA  
dBm  
°C  
D
P
RF Input Power (from 50source)  
Operating Baseplate Temperature  
Storage Temperature Range  
Thermal Resistance (Channel to Backside)  
20  
IN  
T
T
-30 to +85  
-55 to +125  
8
C
°C  
STG  
R
°C/W  
JC  
©2004 Fairchild Semiconductor Corporation  
RMPA39200 Rev. C  
Electrical Characteristics (At 25°C), 50system, Vd = +5V, Quiescent current (Idq) = 1600mA  
Parameter  
Min  
Typ  
Max  
Units  
GHz  
V
Frequency Range  
37  
40  
1
Gate Supply Voltage (Vg)  
-0.2  
Gain Small Signal (Pin = 0dBm)  
(f = 37–38.5GHz)  
(f = 38.5–40GHz)  
17  
16  
19  
17  
dB  
dB  
Gain Variation vs. Frequency  
±1.5  
dB  
Power Output at 1dBm Compression  
(f = 37–38.5GHz)  
(f = 38.5–40GHz)  
31  
30  
dBm  
dBm  
Power Output Saturated (Pin = +16dBm)  
(f = 37–38.5GHz)  
(f = 38.5–40GHz)  
31  
30  
32  
31  
dBm  
dBm  
Drain Current at Pin = 0dBm  
1600  
1700  
17  
mA  
mA  
%
Drain Current at P1dB Compression  
Power Added Efficiency (PAE) at P1dB  
OIP3 (17dbm/Tone) (10MHz Tone Sep.)  
Input Return Loss (Pin = 0dBm)  
Output Return Loss (Pin = 0dBm)  
37  
dBm  
dB  
10  
10  
dB  
Note:  
1. Typical range of negative gate voltages is -0.5 to 0.0V to set typical Idq of 1600 mA.  
©2004 Fairchild Semiconductor Corporation  
RMPA39200 Rev. C  
Application Information  
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.  
Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal  
conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat, plated with  
gold over nickel and should be capable of withstanding 325°C for 15 minutes.  
Die attachment for power devices should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen  
environment for PHEMT devices. Note that the backside of the chip is gold plated and is used as RF and DC ground.  
These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination of  
bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including the use of  
wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent static discharges  
through the device.  
Recommended wire bonding uses 3mils wide and 0.5mil thick gold ribbon with lengths as short as practical allowing for  
appropriate stress relief. The RF input and output bonds should be typically 0.012" long corresponding to a typical 2mil gap  
between the chip and the substrate material.  
DRAIN SUPPLY  
(VDA & VDB)  
MMIC CHIP  
RF IN  
RF OUT  
GROUND  
(Back of the Chip)  
GATE SUPPLY  
(VGA & VGB)  
Figure 1. Functional Block Diagram  
3.194  
3.010  
1.827  
1.597  
1.367  
0.184  
0.0  
0.0 0.205  
0.889  
1.954  
2.426  
2.954  
3.500  
4.282  
Dimensions in mm  
Figure 2. Chip Layout and Bond Pad Locations  
(Chip Size is 4.282mm x 3.194mm x 50µm. Back of chip is RF and DC Ground)  
©2004 Fairchild Semiconductor Corporation  
RMPA39200 Rev. C  
DRAIN SUPPLY (Vd = +5V)  
(Connect to both VDA & VDB)  
10000pF  
L
100pF  
BOND WIRE Ls  
L
MMIC CHIP  
RF IN  
RF OUT  
L
GROUND  
(Back of Chip)  
100pF  
BOND WIRE Ls  
L
10000pF  
GATE SUPPLY (Vg)  
(VGA and/or VGB)  
Figure 3. Recommended Application Schematic Circuit Diagram  
©2004 Fairchild Semiconductor Corporation  
RMPA39200 Rev. C  
Vd (POSITIVE)  
Vg (NEGATIVE)  
2 MIL GAP  
10000pF  
10000pF  
DIE-ATTACH  
80Au/20Sn  
100pF  
100pF  
5 MIL THICK  
ALUMINA  
50Ω  
5 MIL THICK  
ALUMINA  
50Ω  
RF OUTPUT  
RF INPUT  
L < 0.015"  
(4 Places)  
100pF  
100pF  
10000pF  
10000pF  
Vd (POSITIVE)  
Vg (NEGATIVE)  
Note:  
Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief.  
Vd should be biased from 1 supply on both sides as shown. Vg can be biased from either or both sides from 1 supply.  
Figure 4. Recommended Assembly and Bonding Diagram  
©2004 Fairchild Semiconductor Corporation  
RMPA39200 Rev. C  
Recommended Procedure for Biasing and Operation  
CAUTION: LOSS OF GATE VOLTAGE (Vg) WHILE  
DRAIN VOLTAGE (Vd) IS PRESENT MAY DAMAGE THE  
AMPLIFIER CHIP.  
Step 4: Adjust gate bias voltage to set the quiescent  
current of Idq = 1600mA.  
Step 5: After the bias condition is established, the RF input  
signal may now be applied at the appropriate frequency  
band.  
The following sequence of steps must be followed to  
properly test the amplifier.  
Step 1: Turn off RF input power.  
Step 6: Follow turn-off sequence of:  
(i) Turn off RF input power,  
(ii) Turn down and off drain voltage (Vd),  
(iii) Turn down and off gate bias voltage (Vg).  
Step 2: Connect the DC supply grounds to the ground of  
the chip carrier. Slowly apply negative gate bias supply  
voltage of -1.5V to Vg.  
Note: An example auto bias sequencing circuit to apply  
negative gate voltage and positive drain voltage for the  
above procedure is shown below.  
Step 3: Slowly apply positive drain bias supply voltage of  
+5V to Vd.  
D3  
D1N6098  
+6V  
D2  
D1N6098  
C1  
0.1µF  
R1  
3.0k  
R3  
1.0k  
+
0
*
U2  
V+  
LM2941T  
1
2
AD820/AD  
3
2
U1A  
7400  
CNT  
V-  
5
4
3
+2.62V  
IN  
OUT  
MMIC_+VDD  
GND  
C3  
22µF  
C2  
0.47µF  
R4  
1.2k  
R2  
6.8k  
0
0
ADJ  
1
0
R6  
1k  
R5  
3k  
0
0
*Adj. For –Vg  
R7  
–5V  
MMIC_–VG  
C4  
0.1µF  
C5  
0.1µF  
*
R8  
1.0k  
–5V Off: +3.33V  
–5V Off: +1.80V  
8.2k  
0
0
0
©2004 Fairchild Semiconductor Corporation  
RMPA39200 Rev. C  
Typical Characteristics  
RMPA39200 Power and LS Gain @ P1dB vs. Frequency  
Bias Vd = 5V, Id = 1600mA, T = 25°C  
35  
RMPA39200 S-Parameters vs. Frequency  
Bias Vd = 5V, Id = 1600mA, T = 25°C  
25  
30  
20  
10  
0
P1dB  
20  
S21  
30  
15  
25  
20  
10  
S11  
5
-10  
-20  
-30  
LARGE SIGNAL GAIN  
15  
0
S22  
-5  
10  
34  
35  
36  
37  
38  
39  
40  
41  
42  
3
37  
38  
39  
40  
FREQUENCY (GHz)  
FREQUENCY (GHz)  
RMPA39200 Gain vs. Power Out  
Freq. = 37 to 40GHz, Bias Vd = 5V, Id = 1600mA, T = 25°C  
22  
RMPA39200 OIP3 vs. Pout/Tone  
Vd = 5V, Idq = 1600mA, T = 25°C, 10MHz Tone Sep  
41  
37GHz  
39GHz  
21  
40  
39  
38  
37  
36  
35  
34  
40GHz  
38GHz  
20  
38GHz  
37GHz  
19  
18  
17  
16  
15  
14  
40GHz  
39GHz  
4
6
8
10 12 14 16 18 20 22 24 26 28 30 32  
Pout/TONE (dBm)  
14 16 18 20 22 24 26 28 30 32 34  
Pout (dBm)  
©2004 Fairchild Semiconductor Corporation  
RMPA39200 Rev. C  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
ACEx™  
Power247™  
PowerSaver™  
PowerTrench  
QFET  
SuperFET™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
ISOPLANAR™  
LittleFET™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MICROWIRE™  
MSX™  
MSXPro™  
OCX™  
OCXPro™  
FAST  
FASTr™  
FPS™  
FRFET™  
GlobalOptoisolator™  
GTO™  
ActiveArray™  
Bottomless™  
CoolFET™  
CROSSVOLT™  
DOME™  
EcoSPARK™  
E2CMOS™  
EnSigna™  
FACT™  
QS™  
QT Optoelectronics™ TinyLogic  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
µSerDes™  
TINYOPTO™  
TruTranslation™  
UHC™  
HiSeC™  
I2C™  
i-Lo™  
ImpliedDisconnect™  
UltraFET  
FACT Quiet Series™  
SILENT SWITCHER VCX™  
SMART START™  
SPM™  
OPTOLOGIC  
OPTOPLANAR™  
PACMAN™  
POP™  
Across the board. Around the world.™  
The Power Franchise  
ProgrammableActive Droop™  
Stealth™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY  
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY  
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT  
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. I11  

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