ft2705P [FANGTEK]

2X10W Class-D Stereo Audio Power Amplifier with Automatic Level Control;


型号：	ft2705P
厂家：	Fangtek Ltd.
描述：	2X10W Class-D Stereo Audio Power Amplifier with Automatic Level Control
文件：	总25页 (文件大小：1147K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ft2705

2X10W Class-D Stereo Audio Power Amplifier

with Automatic Level Control

GENERAL DESCRIPTION

FEATURES



Wide supply voltage range from 4.5V to 8.8V

The ft2705 is a highly efficient 2X10W Class-D stereo

audio power amplifier with automatic level control

(ALC). It operates with a wide range of supply voltages

from 4.5V to 8.8V in either dual bridge-tied-load (BTL)

or parallel bridge-tied-load (PBTL) configuration. With a

supply voltage at 8.8V, the ft2705 can deliver 10W per

channel into a pair of 4Ω speakers in dual BTL

configuration (stereo mode), or 14W into a single 3Ω

speaker in PBTL configuration (mono mode), with 10%

THD+N.

Automatic level control to eliminate output clipping

Optional mono mode for low-impedance audio

speakers in PBTL configuration



Maximum output power in Non-ALC mode

(VDD=8.8V, f=1kHz, THD+N=10%)

14W (3Ω+33µH load in PBTL configuration)

10W/Ch (4Ω+33µH load)

5.6W/Ch (8Ω+33µH load)

ALC output power in ALC Mode

(VDD=8.8V, f=1kHz, THD+N<0.5%)

The ft2705 features ALC to constantly monitor and

safeguard the audio outputs against the supply voltage,

preventing output clipping distortion, excessive power

dissipation, or speaker over-load. Once an over-level

condition is detected in either channel, the ALC lowers

the voltage gain of both audio amplifiers together to

eliminate output clipping distortion while maintaining a

maximum dynamic range of the audio outputs allowed

for the supply voltage. In ALC mode, with a supply

voltage at 8.8V, the ft2705 can deliver 7.7W per

channel into a pair of 4Ω speakers in stereo mode, or

11W into a single 3Ω speaker in mono mode, with

THD+N less than 0.5%.

11W (3Ω+33µH load in PBTL configuration)

7.7W/Ch (4Ω+33µH load)

4.3W/Ch (8Ω+33µH load)

Low THD+N: 0.06%

(VDD=8.8V, f=1kHz, 4Ω+33µH, Po=5.0W)



High efficiency up to 88%

High PSRR: 70dB at 1kHz

Wide ALC dynamic range: 10dB

Maximum voltage gain: 32dB

Under-voltage lockout protection

Over-temperature shutdown protection

Auto-recovering over-current protection

 Available in SOP-16L package

As a filterless Class-D stereo audio amplifier, the ft2705

features high efficiency (up to 88%), high PSRR (70dB

at 1kHz), and low EMI emissions, which reduce design

and manufacturing complexities, lower system cost and

PCB space.

APPLICATIONS



Blue Tooth Speakers

Portable & Plug-In Consumer Electronics

TV/Monitors

In ft2705, comprehensive protection features against

various operating faults ensure its safe and reliable

operation.

TYPICAL APPLICATION CIRCUIT

VDD

CVDD

10uF

CVDD

220uF

CINL1

0.33uF

CINR1

0.33uF

RINR1 10K

RINR2

RINL1 10K

INNL

INPL

INNR

INPR

INNL

INNR

INPR

RINL2

10K

CINL2 0.33uF

CINR2 0.33uF

INPL

PVDDL

VOPL

PGNDL

VONL

PVDDL

CTRL

PVDDR

VOPR

CPVDDL

1uF

CPVDDR

1uF

LSL

LSR

PGNDR

VONR

PVDDR

BYP

SPEAKER

Rctrl1

SPEAKER

10nF

4.7Ω

10nF

4.7Ω

CTRL

CBYP

1uF

ft2705P

Rctrl2

Cctrl

0.1uF

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ft2705

PIN CONFIGURATION AND DESCRIPTION

INNL

INPL

15 INPR

INNR

PVDDR

VOPR

PVDDL

VOPL

PGNDR

PGNDL

VONL

11 VONR

10 PVDDR

PVDDL

CTRL

BYP

ft2705P (TOP VIEW)

NAME

INNL

PIN #

TYPE DESCRIPTION

Left-channel inverting audio input terminal.

Left-channel non-inverting audio input terminal.

INPL

Power supply for the left-channel power amplifier’s output stage. Connect directly to

the system power supply VDD and add a 1µF capacitor for decoupling.

PVDDL

VOPL

3, 7

Left-channel non-inverting audio output terminal.

Power ground for the left-channel power amplifier’s output stage. Connect to the

system ground GND.

PGNDL

VONL

CTRL

BYP

Left-channel inverting audio output terminal.

Mode Control (Active High) with a 300kΩ internal pulldown resister to ground.

Common-mode bias for audio inputs. Connect to a 1µF capacitor for decoupling.

Power supply for the right-channel power amplifier’s output stage. Connect directly to

the system power supply VDD and add a 1µF capacitor for decoupling.

PVDDR

VONR

10, 14

Right-channel inverting audio output terminal.

Power ground for the right-channel power amplifier’s output stage. Connect to the

system ground GND.

PGNDR

VOPR

INPR

INNR

Right-channel non-inverting audio output terminal.

Right-channel non-inverting audio input terminal. Connect to ground for mono mode.

Right-channel inverting audio input terminal. Connect to ground for mono mode.

ORDERING INFORMATION

PART NUMBER

TEMPERATURE RANGE

PACKAGE

ft2705P

-40°C to +85°C

SOP-16L

DEC, 2017

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ft2705

REVISION HISTORY

Initial Release 1.0 (May, 2015)

Changed from Initial 1.0 (May, 2015) to Revision 1.1 (December, 2016)

1. Changed the absolute maximum rating of the supply voltage from 9.2V to 9V.

2. Changed the recommended maximum operating voltage from 9V to 8.8V.

3. Changed input capacitors (CINL1, CINL2, CINR1, and CINR2) from 1.0µF to 0.33µF in Typical Application Circuits.

4. Changed the minimum load resistance in PBTL configuration from 2.6Ω to 2.0Ω.

5. Revised Table 5, Typical Voltage Gain Settings & Input Resistor Values for Various Input Levels.

Changed from Revision 1.1 (December, 2016) to Revision 1.2 (January, 2017)

1. Added snubber circuits across audio outputs VOPL/R and VONL/R in Figure 1, 31, 32, and 32.

Changed from Revision 1.2 (January, 2017) to Revision 1.3 (April, 2017)

1. Revised Table 5, Typical Voltage Gain Settings & Input Resistor Values for Various Input Levels.

2. Revised Figure 30 - Class-D Output RC Snubber Circuit.

3. Changed the minimum load resistance in PBTL configuration from 2.0Ω to 2.4Ω for the supply voltage at 8.8V.

4. Changed the absolute maximum rating of the supply voltage from 9V to 9.2V.

5. Updated Typical Application Circuit Diagram on the first page.

6. Updated Typical Application Circuits in Figure 31, 32, and 33.

Changed from Revision 1.3 (April, 2017) to Revision 1.4 (June, 2017)

1. Added Electrical Characteristics of Po, THD+N, and η for speaker loads at RL=2Ω+10µH.

Changed from Revision 1.4 (June, 2017) to Revision 1.5 (November, 2017)

1. Changed CPVDDL/R from 10µF to 1µF.

2. Added CVDD of 10µF//220µF onto the system power supply.

3. Updated Typical Application Circuit on Page 1.

4. Updated Figure 31, 32, and 33 on Page 24.

DEC, 2017

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ft2705

ABSOLUTE MAXIMUM RATINGS ^{(Note 1)}

PARAMETER

VALUE

Supply voltage, VDD @ PVDDL/R

INNL/R, INPL/R, CTRL, BYP

All other Pins

-0.3V to 9.2V

-0.3V to 5.5V

-0.3V to VDD+0.3V

-65°C to +150°C

2000V

Storage Temperature

ESD Ratings-Human Body Model (HBM)

Junction Temperature

150°C

Maximum Soldering Temperature (@10 second duration)

260°C

Note 1: Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is

not implied. Exposure to absolute-maximum-rated conditions for extended periods may damage the device or affect device reliability.

POWER DISSIPATION RATINGS ^{(Note 2, 3)}

PACKAGE

TA < +25°C

TA = +70°C

TA = +85°C

ΘJA

SOP-16L

3.1W

2.0W

1.7W

40°C/W

Note 2: The thermal pad of the package must be directly soldered onto a grounded metal island (as a thermal sink) on the system board.

Note 3: The power dissipation ratings are for a two-side, two-plane printed circuit board (PCB).

RECOMMENDED OPERATING CONDITIONS

PARAMETER

SYMBOL CONDITIONS

MIN

4.5

3.2

2.4

2.0

TYP

MAX

UNIT

Supply Voltage

VDD

PVDDL/R

8.8

Stereo Mode

4.0

3.0

2.4

V_DD=8.8V

V_DD=8.4V

Minimum Load Resistance

Mono Mode

Audio Input Resistor

Audio Input Capacitor

R_IN

C_IN

@ INNL/R, INPL/R

Shutdown

1.0

0.4

1.4

0.1

µF

Operating Mode Control

Input Voltage

VCTRL

ALC Mode

1.1

1.6

-40

1.25

Non-ALC Mode

Operating Junction Temperature

Ambient Temperature

125

C

Note 4: The peak supply voltage including its tolerance over various operating conditions must not exceed its absolute-maximum-rated

value (9.2v). Exposure to absolute-maximum-rated supply voltage may damage the device or affect device reliability permanently. For

applications where the system supply voltage might momentarily exceed the rating, it is highly recommended to add an external diode

in series with the system power supply to ensure the peak supply voltage not exceeding the absolute maximum rating. The added diode

must be rated for a current no less than 4A and a reverse breakdown voltage no less than 15V.

Note 5: For applications where the supply voltage is higher than 8.4V, it is recommended to add a RC snubber circuit across VOPL/R

and VONL/R pins to lower overshoot voltages (above VDD) and undershoot voltages (below GND), preventing permanent damage to

the device for applications with long speaker wires.

DEC, 2017

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ft2705

IMPORTANT APPLICATION NOTES

1. For enhanced audio performance, it is recommended to use differential inputs from the audio source for

ft2705. In single-ended input applications, the unused audio input of ft2705 should be AC-grounded at the

audio source. The impedances seen at the two differential inputs should be substantially the same.

2. The ft2705 requires adequate power supply decoupling to ensure its optimum operation and performance in

the output power, efficiency, distortion, and EMI emissions. Place each decoupling capacitors individually

as close as possible to the device’s PVDDL/R pins.

3. The ft2705 is a high performance, high power, Class-D stereo audio amplifier with an exposed thermal pad

underneath the package. The thermal pad should be directly soldered onto a ground plane as a thermal

sink for proper power dissipation. Failure to do so may result in the device prematurely going into thermal

shutdown.

4. It is strongly recommended to add a ground plane (GND) for ft2705 on the system board.

5. Use a simple ferrite bead filter for further EMI suppression, as shown in Figure 29. Choose a ferrite bead

with a rated current no less than 3A for applications with load resistances less than 4Ω. Also, place

respective ferrite beard filters as individually close to VOPL/R and VONL/R pins as possible.

6. To enhance long-term reliability, it is highly recommended to add a simple RC snubber circuit, as shown in

Figure 30, across the two audio outputs, VOPL/R and VONL/R, of each individual channel to prevent the

device from accelerated deterioration or abrupt destruction due to excessive inductive flybacks that are

induced on fast output switching or by an over-current or short-circuit condition.

7. Do not short audio outputs (VOPL/R and VONL/R) directly to ground (PGNDL/R) or the supply voltage

(PVDDL/R) as this might damage the device permanently, particularly when the supply voltage is higher

than 8.4V.

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ft2705

FUNCTIONAL BLOCK DIAGRAM

BYP

PVDDL

VOPL

INPL

Class-D

Modulator

Input

Buffer

Output

Stage

VONL

INNL

PGNDL

OCP

OTP

CTRL

Mode

Control

ALC Control

Oscillator

UVLO

PVDDR

VOPR

INPR

INNR

Class-D

Modulator

Input

Buffer

Output

Stage

VONR

PGNDR

Figure 1: Simplified Functional Block Diagram of ft2705

TEST SETUP FOR ELECTRICAL & PERFORMANCE CHARACTERISTICS

CIN

RIN

VOP

INN

30kHz

Measurement

Output

Measurement

Input

DUT

Load

Low pass

CIN

RIN

Filter

INP

VDD

VON

GND

Supply

Figure 2: Test Setup Diagram for ft2705

All parameters specified in Electrical and Typical Performance Characteristics sections are measured according to the

conditions:

1. The two differential inputs are shorted for common-mode input voltage measurement. All other parameters are taken

with input resistors RIN=10kΩ and input capacitors CIN=0.33µF, unless otherwise specified.

2. The supply decoupling capacitors CPVDDL=1µF and CPVDDR=1µF is placed close to their individual pins.

3. A 33µH inductor was placed in series with the load resistor to emulate a speaker load for all AC and dynamic

parameters.

4. The 33kHz lowpass filter is added even if the analyzer has an internal lowpass filter. An RC lowpass filter (100Ω, 47nF)

is used on each output for the data sheet graphs.

DEC, 2017

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ft2705

ELECTRICAL CHARACTERISTICS

VDD=8.8V, f=1kHz, Stereo Mode, Load=4Ω+33µH, CIN=0.33µF, RIN=10kΩ, CBYP=1µF, CPVDDL/R=1µF,

TA=25°C, unless otherwise specified.

SYMBOL

VDD

PARAMETER

CONDITIONS

PVDDL/R

MIN

TYP

MAX

UNIT

Supply Voltage

4.5

8.8

VUVLOUP

VUVLODN

VBYP

Power-up Threshold Voltage

Power-off Threshold Voltage

Common-mode Bias Voltage

VDD from Low to High

VDD from High to Low

VDD=8.8V

3.2

2.9

3.0

2.7

3.3

0.4

1.4

VDD=8.8V

µA

Supply Quiescent Current

Inputs AC-Grounded

No Load

VDD=7.2V

VDD=6.5V

IVDD

VDD=8.8V

Supply Quiescent Current

Inputs AC-Grounded

No Load (PBTL Configuration)

VDD=7.2V

VDD=6.5V

ISD

Shutdown Current

CTRL Low

Shutdown Mode

ALC Mode

Operating Mode Control

Threshold Voltage

VCTRL

1.1

1.6

Non-ALC Mode

@ INNR and INPR

@ CTRL

VMONO

RCTRL

TOTP

Mono Mode Threshold Voltage

Pulldown Resistor to Ground

Over-Temperature Threshold

Over-Temperature Hysteresis

0.4

300

160

kΩ

C

THYS

CLASS-D AMPLIFIER

VDD=8.8V

9.6

7.8

11.5

7.7

6.2

THD+N=10%, Non-ALC Mode

(PBTL Configuration)

VDD=7.2V

VDD=6.5V

PO, MAX

(RL=3Ω)

VDD=8.8V

THD+N=1%, Non-ALC Mode

(PBTL Configuration)

VDD=7.2V

VDD=6.5V

VDD=8.8V

W/Ch

THD+N=10%, Non-ALC Mode

THD+N=1%, Non-ALC Mode

THD+N=10%, Non-ALC Mode

THD+N=1%, Non-ALC Mode

VDD=7.2V

6.7

5.5

8.0

5.4

4.4

5.6

3.8

3.1

4.6

3.0

2.5

VDD=6.5V

PO, MAX

(RL=4Ω)

VDD=8.8V

VDD=7.2V

VDD=6.5V

VDD=8.8V

VDD=7.2V

VDD=6.5V

PO, MAX

(RL=8Ω)

VDD=8.8V

VDD=7.2V

VDD=6.5V

VDD=8.8V, VIN=0.30VRMS

VDD=7.2V, VIN=0.24VRMS

VDD=6.5V, VIN=0.22VRMS

PO, ALC

ALC Mode

(PBTL Configuration)

7.4

6.0

(RL=3Ω)

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ft2705

ELECTRICAL CHARACTERISTICS (Cont’d)

VDD=8.8V, f=1kHz, Stereo Mode, Load=4Ω+33µH, CIN=0.33µF, RIN=10kΩ, CBYP=1µF, CPVDDL/R=1µF,

TA=25°C, unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

VDD=8.8V, VIN=0.30VRMS

VDD=7.2V, VIN=0.24VRMS

VDD=6.5V, VIN=0.22VRMS

VDD=8.8V, VIN=0.30VRMS

VDD=7.2V, VIN=0.24VRMS

VDD=6.5V, VIN=0.22VRMS

7.7

5.2

4.2

4.3

2.8

2.4

W/Ch

PO, ALC

ALC Mode

(RL=4Ω)

PO, ALC

ALC Mode

(RL=8Ω)

VDD=8.8V, Non-ALC Mode

(PBTL Configuration)

Po=6.5W

0.08

0.5

THD+N

(RL=3Ω)

VDD=8.8V, ALC Mode

(PBTL Configuration)

Po=11W, VIN=0.30VRMS

VDD=8.8V, Non-ALC Mode

VDD=8.8V, ALC Mode

VDD=8.8V, Non-ALC Mode

VDD=8.8V, ALC Mode

Overall Voltage Gain

Input Resistance

Po=5.0W

0.06

0.4

0.04

0.3

THD+N

(RL=4Ω)

Po=7.7W, VIN=0.30VRMS

Po=2.5W

THD+N

(RL=8Ω)

Po=4.3W, VIN=0.30VRMS

RIN=10kΩ

kΩ

RIN

@ INNL/R, INPL/R

with CTRL Low

RO, SD

VOS

Output Resistance in Shutdown

Output Offset Voltage

2.5

±10

130

kΩ

No Load

AV=25dB (RIN=20kΩ), Inputs

AC-Grounded, A-weighted

Idle-Channel Noise

µVRMS

VDD=8.8V, Po=11W, RL=3Ω

VDD=8.8V, Po=7.7W, RL=4Ω

VDD=8.8V, Po=4.3W, RL=8Ω

f=1kHz

Power Efficiency

PSRR

CMRR

Power Supply Rejection Ratio

Common Mode Rejection Ratio

f=1kHz

AV=25dB (RIN=20kΩ), Maximum

Output (5.6VRMS), A-weighted

SNR

Signal-to-Noise Ratio

Crosstalk

TSTUP

TSD

Channel Separation

Po=5.0W, f=1kHz

160

Startup Time

Shutdown Mode Settling Time

PWM Output Carrier Frequency

fSW

375

3.3

5.0

kHz

A/Ch

Dual BTL Configuration

PBTL Configuration

ILIMIT

Over-Current Limit

AUTOMATIC LEVEL CONTROL (ALC)

AMAX

Maximum ALC Attenuation

ALC Attack Time

TATTACK

TRELEASE

ALC Release Time

500

FADE-IN & FADE-OUT

TFADEIN

Fade-In Time

Fade-Out Time

TFADEOUT

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ft2705

ELECTRICAL CHARACTERISTICS (Cont’d)

VDD=7.4V, f=1kHz, Mono Mode, Load=2Ω+10µH, CIN=0.33µF, RIN=10kΩ, CBYP=1µF, CPVDDL/R=1µF, TA=25°C,

unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Non-ALC Mode, THD+N=10%

Non-ALC Mode, THD+N=1%

ALC Mode, VIN=0.30VRMS

Non-ALC Mode, Po=10W

ALC Mode, VIN=0.30VRMS

PO, MAX

PO, ALC

THD+N

Maximum Output Power

ALC Output Power

10.5

0.1

0.5

Total Harmonic Distortion + Noise

Power Efficiency

VDD=8.4V, f=1kHz, Mono Mode, Load=2Ω+10µH, CIN=0.33µF, RIN=10kΩ, CBYP=1µF, CPVDDL/R=1µF, TA=25°C,

unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Non-ALC Mode, THD+N=10%

Non-ALC Mode, THD+N=1%

ALC Mode, VIN=0.30VRMS

Non-ALC Mode, Po=12W

ALC Mode, VIN=0.30VRMS

PO, MAX

PO, ALC

THD+N

Maximum Output Power

ALC Output Power

13.5

0.1

0.4

Total Harmonic Distortion + Noise

Power Efficiency

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ft2705

TYPICAL PERFORMANCE CHARACTERISTICS

VDD=8.8V, f=1kHz, Stereo Mode, Load=4Ω+33µH, CIN=0.33µF, RIN=10kΩ, CBYP=1µF, CPVDDL/R=1µF,

TA=25°C, unless otherwise specified.

List of Typical Performance Characteristics

CONDITIONS

FIGURE #

DESCRIPTION

RL=3Ω+33µH, ALC (VIN=0.30VRMS) & Non-ALC Modes (PBTL Configuration)

RL=4Ω+33µH, ALC (VIN=0.30VRMS) & Non-ALC Modes

RL=8Ω+33µH, ALC (VIN=0.30VRMS) & Non-ALC Modes

RL=3Ω+33µH, ALC & Non-ALC Modes (PBTL Configuration)

RL=4Ω+33µH, ALC & Non-ALC Modes

Output Power vs. Supply Voltage

Output Power vs. Input Voltage

Efficiency vs. Output Power

RL=8Ω+33µH, ALC & Non-ALC Modes

RL=3Ω+33µH, Non-ALC Mode (PBTL Configuration)

RL=4Ω+33µH, Non-ALC Mode

RL=8Ω+33µH, Non-ALC Mode

THD+N vs. Output Power

THD+N vs. Input Voltage

THD+N vs. Input Frequency

PSRR vs. Frequency

RL=4Ω+33µH, Non-ALC Mode

RL=4Ω+33µH, ALC & Non-ALC Modes

RL=4Ω+33µH, ALC Mode, Po=5.0W

RL=4Ω+33µH, Inputs AC-Grounded

Crosstalk vs. Frequency

Quiescent Current vs. Supply

ALC Attack & Release Time

Output Startup Waveforms

Output Shutdown Waveforms

RL=4Ω+33µH, Vo=2.0VRMS, R-CH to L-CH

Inputs AC-Grounded, No Load, ALC Mode

VIN=0.20VRMS ~ 0.63VRMS, RL=4Ω+33µH, ALC Mode

RL=4Ω+33µH, Vin=0.10VRMS, ALC Mode

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ft2705

TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)

Output Power vs. Supply Voltage

16000

14000

12000

10000

8000

6000

4000

2000

12000

11000

10000

9000

8000

7000

6000

5000

4000

3000

2000

1000

RL=3Ω+33uH, ALC On, Vin=0.3Vrms

RL=3Ω+33uH, Non-ALC, THD+N=1%

RL=3Ω+33uH, Non-ALC, THD+N=10%

RL=4Ω+33uH, ALC On, Vin=0.3Vrms

RL=4Ω+33uH, Non-ALC, THD+N=1%

RL=4Ω+33uH, Non-ALC, THD+N=10%

Supply Voltage (V)

Figure 3: Output Power vs. Supply Voltage

Figure 4: Output Power vs. Supply Voltage

Output Power vs. Input Voltage

Output Power vs. Supply Voltage

100000

7000

RL=8Ω+33uH, ALC On, Vin=0.3Vrms

6000

RL=8Ω+33uH, Non-ALC, THD+N=1%

RL=8Ω+33uH, Non-ALC, THD+N=10%

10000

1000

100

5000

4000

3000

2000

1000

ALC Mode，RL=3Ω+33uH

Non-ALC Mode，RL=3Ω+33uH

100

1000

10000

Supply Voltage (V)

Input Voltage (mVrms)

Figure 5: Output Power vs. Supply Voltage

Figure 6: Output Power vs. Input Voltage

Output Power vs. Input Voltage

100000

10000

1000

100

10000

1000

ALC, RL=4Ω+33uH

ALC, RL=8Ω+33uH

100

Non-ALC, RL=4Ω+33uH

Non-ALC, RL=8Ω+33uH

100

1000

10000

Input Voltage (mVrms)

100

1000

10000

Input Voltage (mVrms)

Figure 7: Output Power vs. Input Voltage

Figure 8: Output Power vs. Input Voltage

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ft2705

TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)

Efficient vs. Output Power

100

Non-ALC, RL=4Ω+33uH

Non-ALC, RL=3Ω+33uH, PBTL Mode

2000 4000 6000 8000 10000 12000 14000 16000 18000

Output Power (W)

2000

4000

6000

8000

10000

12000

Output Power / Channel (mW)

Figure 9: Efficiency vs. Output Power

Figure 10: Efficiency vs. Output Power

Efficient vs. Output Power

THD+N vs. Output Power

100

L-CH only, Non-ALC

R-ch only, Non-ALC

Non-ALC, RL=8Ω+33uH

100

1000

10000

100000

1000

2000

3000

4000

5000

6000

Output Power (mW)

Output Power / Channel (mW)

Figure 11: Efficiency vs. Output Power

Figure 12: THD+N vs. Output Power

THD+N vs. Input Voltage

THD+N vs. Frequency

100

L-CH, Po=5W

R-CH, Po=5W

0.1

ALC On, VALC=0V

Non-ALC

0.01

100

1000

10000

100

1000

10000

100000

Input Voltage (mVrms)

Frequency (Hz)

Figure 13: THD+N vs. Input Voltage

Figure 14: THD+N vs. Frequency

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ft2705

TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)

Crosstalk vs. Frequency

PSRR vs. Frequency

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-10

-20

-30

-40

-50

-60

-70

-80

-90

L to R, Po(L-CH)=5W

R to L, Po(R-CH)=5W

PSRR, Input AC-Ground

100

1000

10000

100000

100

1000

10000

100000

Frequency (Hz)

Figure 15: PSRR vs. Frequency

Figure 16: Crosstalk vs. Frequency

Quiescent Current vs. Supply Voltage

VOP

X: 0.2s/div

Release Time (0.5s)

V_IN=0.2V ~ 0.63V_RMS,1kHz

VON

Attack Time (20ms)

Quiescent Current

X: 5ms/div

Y: 5V/div

VOP-VON (33kHz Lowpass Filer)

Supply Voltage (V)

Figure 17: Quiescent Current vs. Supply Voltage

Figure 18: ALC Attack & Release Time

VOP

VON

VOP

VON

VOP-VON (33kHz Lowpass Filer)

X: 5ms/div

Y: 5V/div

X: 50ms/div

Y: 5V/div

VOP-VON (33kHz Lowpass Filer)

Figure 19: (VOP-VON) Startup Waveforms

Figure 20: (VOP-VON) Shutdown Waveforms

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ft2705

APPLICATION INFORMATION

The ft2705 is a highly efficient 2X10W Class-D stereo audio power amplifier with automatic level control (ALC).

It operates with a wide range of supply voltages from 4.5V to 8.8V in either dual bridge-tied-load (BTL) or

parallel bridge-tied-load (PBTL) configuration. With a supply voltage at 8.8V, the ft2705 can deliver 10W per

channel into a pair of 4Ω speakers in dual BTL configuration (stereo mode), or 14W into a single 3Ω speaker in

PBTL configuration (mono mode), with 10% THD+N.

In ft2705, two operating modes, i.e., ALC and Non-ALC, are available that can be selected via the CTRL pin.

The Non-ALC mode configures the device in a conventional Class-D operation, where the output power is

maximized without ALC operation. In ALC mode, the ft2705 constantly monitors and safeguards the audio

outputs against the supply voltage, preventing output clipping distortion, excessive power dissipation, or

speaker over-load. Once an over-level condition is detected in either channel, the ALC lowers the voltage gain

of both audio amplifiers together to eliminate output clipping distortion while maintaining a maximum dynamic

range of the audio outputs allowed for the supply voltage. In ALC mode, with a supply voltage at 8.8V, the

ft2705 can deliver 7.7W per channel into a pair of 4Ω speakers in stereo mode, or 11W into a single 3Ω speaker

in mono mode, with THD+N less than 0.5%.

As a filterless Class-D audio amplifier, the ft2705 features high efficiency (up to 88%), high PSRR (70dB at

1kHz), and low EMI emissions, which reduce design and manufacturing complexities, lower system cost and

PCB space. These features make ft2705 an ideal audio solution for portable and plug-in consumer electronic

devices.

As specifically designed for portable applications, the ft2705 incorporates a shutdown mode to minimize the

power consumption by holding the CTRL pin to ground. It also includes comprehensive protection features

against various operating faults such as over-current, short-circuit, over-temperature, or under-voltage for a

safe and reliable operation.

AUTOMATIC LEVEL CONTROL (ALC)

The automatic level control is to maintain the audio output signals for a maximum voltage swing without

distortion when an excessive input that may cause output clipping is applied. With the ALC function, the ft2705

lowers the gain of the amplifier to an appropriate value such that the clipping at the outputs is substantially

eliminated. It also eliminates the clipping of the output signal due to the reduction of the power-supply voltage.

Output Signal when Supply Voltage is Sufficiently Large

Output Signal in ALC Off Mode

Output Signal in ALC On Mode

Attack Time

Release Time

Figure 21: Automatic Level Control Diagram

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ft2705

The attack time and release time of the ALC are shown in Table 1. The attack time is defined as the time

interval required for the gain to fall to its steady-state gain less 3dB approximately, assumed that a sufficiently

large input signal is applied. The release time is the time interval required for the amplifier to exit out of the

present mode of operation.

Attack Time (ms)

Release Time (ms)

500

Table 1: Attack Time & Release Time

OPERATING MODE CONTROL

As described in Table 2, depending upon the voltage VCTRL at the CTRL pin, the ft2705 can be configured in

one of the three operating modes. If VCTRL is set less than 0.4V, the ft2705 is in shutdown mode. If VCTRL is set

in the range between 1.1V and 1.4V, the ft2705 operates in ALC mode, where the ft2705 constantly monitors

and safeguards the audio outputs of both channels against the applied supply voltage. Once an over-level

condition is detected in either channel, the ALC lowers the voltage gain of both audio amplifiers proportionally to

eliminate output clipping. If VCTRL is set higher than 1.6V, the ft2705 operates in Non-ALC mode, where the

ft2705 operates as a conventional Class-D amplifier without ALC function.

The ALC mode of operation can be chosen for the applications where the audio quality is one of major design

considerations and the output clipping must be substantially eliminated. On the contrary, the Non-ALC

operation can be chosen for the applications where a maximum audio loudness is much desired.

Voltage @ CTRL

VCTRL < 0.4V

Operating Mode

Shutdown

ALC

1.1V < VCTRL < 1.4V

VCTRL > 1.6V

Non-ALC

Table 2: Operating Mode Control

An example of setting the ALC mode of operation by a host processor or microcontroller is shown in Figure 22.

As depicted in the figure, two external resistors (R1, R2 with 1% accuracy) connected to the CTRL pin and a

GPIO port from the host is used to set the voltage at the CTRL pin. It is recommended to add a ceramic

capacitor (>0.1uF) to the CTRL pin to smooth out the mode transition as well as to minimize noise interference.

In the table of Figure 22, “H” indicates a high-level output voltage (VIO) at the host’s I/O port. “L” indicates a

low-level output voltage at the port. To generate a proper voltage at the CTRL pin for a specific mode of

operation, the GPIO port is required to have sufficient pulldown capabilities. Also, the ground of the host must

be at the same potential as that of ft2705. Furthermore, the voltage at the CTRL pin is a function of the supply

voltage (VIO) applied onto the host.

GPIO

Operating Mode

ALC

Rctrl1

Rctrl2

GPIO

CTRL

Shutdown

Cctrl

0.1uF

MCU

ft2705

Figure 22: CTRL Setup Circuit Diagram for ALC Mode of Operation

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ft2705

Table 3 defines typical resistor values that can be used to set up proper CTRL voltages for various supply

voltages at VIO.

VIO (V)

R1 (kΩ)

R2 (kΩ)

1.8

2.8

3.0

3.3

4.2

5.0

Table 3: Typical Resistor Values for CTRL Setup Circuit

For applications where Non-ALC operation is desired, the CTRL circuit diagram shown in Figure 22 can be

further simplified as shown in Figure 23. In this case, one external resistor (Rctrl) and one GPIO port are used to

set the voltage at the CTRL pin. The value of the resistor is chosen such that the resulting RC time constant

(>1ms) will provide sufficient noise rejection at the CTRL pin.

GPIO

Operating Mode

Non-ALC

Rctrl

GPIO

CTRL

MCU

Cctrl

0.1uF

Shutdown

ft2705

Figure 23: CTRL Setup Circuit Diagram for Non-ALC Mode of Operation

VOLTAGE GAIN SETTING

In ft2705, the voltage gain of the audio amplifier can be externally adjusted by inserting external input resistors,

RIN, in series with the input capacitors, as depicted in Figure 24 and 25. In both figures, it is required that CIN =

CINL1 = CINL2 = CINR1 = CINR2, RIN = RINL1 = RINL2 = RINR1 = RINR2.

CINL1

CINL2

RINL1

RINL2

CINL1

CINL2

RINL1

RINL2

INNL

INPL

INNL

INPL

INNL

INPL

INNL

RINR1

RINR2

RINR1

RINR2

CINR1

CINR2

CINR1

CINR2

INNR

INPR

INNR

INPR

INNR

INPR

Figure 24: Gain Setting (Differential Inputs)

Figure 25: Gain Setting (Single-Ended Inputs)

The value of RIN (in kΩ) for a given voltage gain can be calculated by Equation 1, where AV is the voltage gain of

the audio amplifier.

625

A _V=

(1)

R_IN+15

Table 4 shows suitable resistor values of RIN that can be used for various voltage gains.

RIN (kΩ)

AV (dB)

Table 4: External Input Resistor Values Required for Various Voltage Gains

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ft2705

The choice of the voltage gain will strongly influence the loudness and quality of audio sounds. In general, the

higher the voltage gain is, the louder the sound is perceived. However an excessive voltage gain may cause

audio outputs to be severely clipped for high-level (loud) audio sounds. On the other hand, an unusually low

gain may cause relatively low-level (quite) sounds soft or inaudible. Thus it is crucial to choose a proper voltage

gain for well balanced audio quality.

The voltage gain is chosen based upon various system-level considerations including the supply voltage, the

dynamic range of audio sources and speaker loads, and the desired sound effects. As a general guideline, the

voltage gain can be simply expressed in Equation 2. In the equation, VIN, MAX (in VRMS) is the maximum input

level from the audio source, VDD (in volts) is the supply voltage, and α is the design parameter, which ranges

from 0.65 to 2.2. The higher α is, the higher the average output power (louder) is, with some degree of

compression for high-level audio sounds.

α × VDD

(2)

AV =

IN, MAX

As an example, Table 5 shows the voltage gains for various input levels and VDD settings with α at about 1.0.

In the table, RIN is the external input resistor in series with the input capacitor.

VDD

(V)

VIN, MAX

(VRMS)

RIN

(kΩ)

(V/V)

(dB)

Po, ALC (W)

with 4Ω+33µH Load

0.3

0.5

0.7

1.0

0.3

0.5

0.7

0.3

0.5

0.7

8.8

7.2

7.7

5.2

6.5

4.2

Table 5: Typical

for Various Input Levels

Voltage Gain Settings & Input Resistor Values

MONO MODE (PBTL CONFIGURATION)

The ft2705 features an optional mono mode that allows the left and right channels to operate in parallel BTL

configuration, delivering 14W into a single 3Ω speaker. To operate ft2705 in mono mode, connect the INNR and

INPR pins (pin 15 and 16) directly to ground (no decoupling capacitors). In mono mode, as shown in Figure 26,

an audio input signal applied to the left channel (pin 1 and 2) is routed to the H-bridge of both channels. Note

that it is intended for the mono mode to be configured strictly by the hardware connection. Leaving either INNR

or INPR pin unconnected while the audio outputs VOPL/R and VONL/R are wired together in PBTL

configuration can trigger an over-current or thermal overload protection or both. The mono mode is configured

by the following arrangement:



Connect INPR and INNR pins directly to ground (no decoupling capacitors).

Apply an audio signal to the left-channel inputs (INPL and INNL pins).

Connect VOPL to VONL together as one terminal of the speaker and connect VOPR to VONR together

as the other terminal of the speaker. Use heavy PCB traces as close as possible to the device.

Place the speaker between the left and right-channel outputs.



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ft2705

CIN

RIN

INNL

INPL

VOPR

VONR

SPEAKER

INNR

INPR

VOPL

VONL

Figure 26: Application Circuit of ft2705 in Mono Mode for PBTL Configuration

VOLUME FADE-IN & FADE-OUT

The volume fade-in/out function operates when the CTRL toggles. This function is used to reduce intermittent

sound considerably and eliminate uncomfortable feeling.

Fade In

Time

Fade Out

Time

Figure 27: Fade-In Waveform

Figure 28: Fade-Out Waveform

BYP PIN

A reference voltage is internally generated and provided to the BYP pin as the common-mode voltage bias

of internal analog circuitry. It is required to decouple BYP with a low equivalent-series-resistance (ESR)

ceramic capacitor of 1µF to ground for low distortion and high PSRR operation.

SHUTDOWN AND STARTUP

The ft2705 employs the CTRL pin to minimize power consumption while it is not in use. When the CTRL pin is

pulled to ground, the ft2705 is forced into shutdown mode, where all the analog circuitry is de-biased and the

supply current is thus reduced to less than 20µA, and the differential outputs are shorted to ground through an

internal resistor (2.5kΩ) individually. Once in shutdown mode, the CTRL pin must remains low for at least 20ms

(TSD), the shutdown settling time, before it can be brought high again. When the CTRL pin is asserted high, the

device exits out of shutdown mode and enters into either ALC or Non-ALC mode after the startup time (TSTUP) of

160ms.

Note that an internal pulldown resistor of 300kΩ is integrated onto the CTRL pin. Furthermore, shutdown mode

is the state when the power supply is first applied to the device. Whenever possible, it is recommended to

assert the CTRL pin high to exit the device out of shutdown mode only after the device is properly powered up.

Also, place the amplifiers in shutdown mode prior to removing the power supply voltage for best power-off pop

performance.

CLICK-AND-POP SUPPRESSION

The ft2705 features comprehensive click-and-pop suppression. During startup, the click-and-pop suppression

circuitry reduces any audible transients internal to the device. When entering into shutdown, the differential

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ft2705

audio outputs VOPL/R and VONL/R ramp down to ground quickly and simultaneously.

PSRR ENHANCEMENT

With a dedicated pin, BYP, for the common-mode voltage bias and an external holding capacitor onto the pin,

the ft2705 achieves a PSRR, 70dB at 1kHz.

PROTECTION MODES

The ft2705 incorporates various protection functions against possible operating faults for a safe and reliable

operation. It includes Under-voltage Lockout (UVLO), Over-Current Protection (OCP), and Over-Temperature

Shutdown (OTSD).

Under-Voltage Lockout (UVLO)

The ft2705 incorporates a circuitry to detect a low supply voltage for a safe and reliable operation. When

the supply voltage is first applied, the ft2705 will remain inactive until the supply voltage exceeds 3.2V

(VUVLU). When the supply voltage is removed and drops below 2.9V (VUVLD), the ft2705 enters into shutdown

mode immediately.

Over-Temperature Shutdown (OTSD)

When the die temperature exceeds a preset threshold, the device enters into the over-temperature

shutdown mode, where the differential audio outputs VOPL/R and VONL/R are pulled to ground through

on-chip resistors individually. The device will resume normal operation once the die temperature returns to

a lower temperature, which is about 20C lower than the threshold.

Over-Current Protection (OCP)

During operation, the outputs of the Class-D amplifiers are constantly monitored for any over-current

and/or short-circuit conditions. When a short-circuit condition between two differential outputs or differential

outputs to the supply voltage or ground, the output stage of the respective Class-D amplifier is immediately

forced into high impedance state. Once the fault condition persists over a prescribed period, the ft2705

then enters into the shutdown mode and remains in this mode for about 40ms (TOCP), the over-current

recovery time. When the shutdown mode times out, the ft2705 will initiate another start-up sequence and

then check if the short-circuit condition has been removed. If the fault condition is still present, the ft2705

will repeat itself for the process of a startup followed by detection, qualification, and shutdown. It is

so-called the hiccup mode of operation. Once the fault condition is removed, the ft2705 automatically

restores to its normal mode of operation.

Although the output stages of the Class-D audio amplifiers can withstand a short between VOPL/R

and VONL/R, do not short audio outputs (VOPL/R and VONL/R) directly to ground (PGNDL/R) or the

supply voltage (PVDDL/R) as this might damage the device permanently, particularly when the

supply voltage is higher than 8.4V.

CLASS-D AUDIO AMPLIFIER

The Class-D audio amplifiers in the ft2705 operate in much the same way as traditional Class-D amplifiers and

similarly offer much higher power efficiency than Class-AB amplifiers. The high efficiency of Class-D operation

is achieved by the switching operation of the output stage of the amplifier. The power loss associated with the

output stage is limited to the conduction and switching loss of the power switches, which are much less than the

power loss associated with a linear output stage in Class-AB amplifiers.

Fully Differential Amplifier

The ft2705 includes a pair of fully differential amplifiers with differential inputs and outputs. The fully differential

amplifiers ensure that the differential output voltages are equal to the differential input voltages time the

amplifier gain. Although the ft2705 supports for single-ended inputs, differential inputs are much preferred for

applications where the environment can be noisy in order to ensure maximum SNR.

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ft2705

Low-EMI Filterless Output Stage

Traditional Class-D audio amplifiers require for the use of external LC filters, or shielding, to meet EN55022B

electromagnetic-interference (EMI) regulation standards. The ft2705 applies an edge-rate control circuitry to

reduce EMI emission, while maintaining high power efficiency.

Filterless Design

Traditional Class D amplifiers require an output filter to recover the audio signal from the amplifier’s output. The

filter adds cost, increases the solution size of the amplifier, and can adversely affect efficiency and THD+N

performance. The traditional PWM scheme uses large differential output swings (twice of the supply voltage)

and causes large ripple currents. Any parasitic resistance in the filter components results in loss of power and

lowers the efficiency.

The ft2705 does not require an output filter. The device relies on the inherent inductance of the speaker coil and

the natural filtering of both the speaker and the human ear to recover the audio component of the square-wave

output. By eliminating the output filter, a smaller, less costly, and more efficient solution can be accomplished.

Because the frequency of the ft2705 output is well beyond the bandwidth of most speakers, voice coil

movement due to the square-wave frequency is very small. Although this movement is small, a speaker not

designed to handle the additional power can be damaged. For optimal performance, use a speaker with a

series inductance greater than 10µH. Typical 4Ω speakers exhibit series inductances in the range from 10µH to

47µH.

Ferrite Bead EMI Filter

The ft2705 does not require an LC output filter for short connections from the amplifier to the speaker. However,

additional EMI suppression can be made by use of a simple ferrite bead filter comprising a ferrite bead and a

capacitor, as shown in Figure 29. Choose a ferrite bead with low DC resistance (DCR) and high impedance

(100Ω ~ 220Ω) at high frequencies (>100MHz). The current flowing through the ferrite bead must be also taken

into consideration. The effectiveness of ferrites can be greatly aggravated at much lower than the rated current

values. Choose a ferrite bead with a rated current value no less than 3A. The capacitor value varies based on

the ferrite bead chosen and the actual speaker lead length. Choose a capacitor less than 1nF based on EMI

performance. Place each ferrite bead filter tightly together and individually close to VOPL/R and VONL/R pins,

respectively.

FB1

VOP

SPEAKER

Ferrite Chip Bead

FB2

VON

Ferrite Chip Bead

Figure 29: Ferrite Bead Filter to Reduce EMI

Class-D Output RC Snubber Circuit

For applications where the power supplies are rated more than 8.4V or the speaker load resistances less than

4Ω, it may become necessary to add an RC snubber circuit across the two output pins, VOPL/R and VONL/R, of

each individual channel to prevent the device from accelerated deterioration or abrupt destruction due to

excessive inductive flybacks that are induced on fast output switching or by an over-current or short-circuit

condition. The snubber circuit can also lower EMI emission of Class-D outputs.

Figure 30 shows a simple RC snubber circuit with suggested values of R3=4.7Ω in series with C3=10nF. Note

that the design of the RC snubber circuit is specific to each design and must take into account the parasitic

reactance of the system board to reach proper values of R3 and C3. Evaluate and ensure that the voltage spikes

(overshoots and undershoots) at VOPL/R and VONL/R on the actual system board are within their absolute

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ft2705

maximum ratings. Pay close attention to the layout of the RC snubber circuit to be tight and individually close to

VOPL/R and VONL/R pins, respectively.

FB1

VOP

Ferrite

Chip Bead

FB2

VON

Ferrite

Chip Bead

Figure 30: Class-D Output RC Snubber Circuit

Supply Decoupling Capacitor (CPVDDL, CPVDDR)

As a high performance Class-D audio power amplifier, the ft2705 requires sufficient decoupling of the power

supply to ensure its high efficiency, low distortion, and low EMI. Sufficient power supply coupling also prevents

oscillations for long lead lengths between the amplifier and the speakers. It is highly recommended to use a

solid ground plane GND on the system board to reduce parasitic resistances and inductances of the ground.

For best audio quality and reliability, place a 1µF low-ESR ceramic capacitor (CPVDDL/R) individually close to

PVDDL/R pins respectively. In tandem with each 1µF capacitor, add a small, good quality, low-ESR ceramic

capacitor of 0.047µF, within 2mm of the PVDDL/R pins, for high-frequency filtering and EMI reduction.

Input Resistors (RINL1, RINL2, RINR1, RINR2)

In ft2705, individual 15kΩ input resistors are internally integrated onto INPL/R and INNL/R pins, respectively.

Internal input resistors bring such benefits as fewer variations on PSRR and minimum turn-on pop noise since

on-chip resistors tend to match well. Additional input resistors can be externally added onto INPL/R and INNL/R

pins respectively for specific voltage gains. The value of external input resistors must be included for the

calculation of overall voltage gain, as described in Equation 3, as well as the selection of proper input capacitors,

as described in Equation 4. As shown in Equation 3, the external input resistors attenuate the original voltage

gain by the ratio of RINTERNAL / (RIN+RINTERNAL).

AV = AV0 x [RINTERNAL / (RIN+RINTERNAL)]

(3)

where AV0 = 42 (32dB) and RINTERNAL = 15kΩ

Input Capacitors (CINL1, CINL2, CINR1, CINR2)

The input DC decoupling capacitors are recommended to bias the incoming audio inputs to a proper DC level.

The input capacitor CIN, in conjunction with the amplifier input resistance (including both internal 15kΩ and

external resistor RIN, if any) forms a highpass filter that removes the DC bias of the audio inputs. The corner

frequency, fC, of the highpass filter is given by Equation 4.

fC = 1 / [2 x π x (RIN +15kΩ) x CIN]

(4)

where CIN = CINL1 = CINL2 = CINR1 = CINR2 and RIN = RINL1 = RINL2 = RINR1 = RINR2

RIN is the external input resistance for a specific voltage gain. Note that the variation of the actual input

resistance will affect the voltage gain proportionally. Choose RIN with a tolerance of 2% or better.

Choose CIN such that fC is well below the lowest frequency of interest. Setting it too high affects the amplifiers’

low-frequency response. Consider an example where the specification calls for AV=28dB and a flat frequency

response down to 20Hz. In this example, RIN=10kΩ and CIN is calculated to be about 0.32µF; thus 0.33µF, as a

common choice of capacitance, can be chosen for CIN.

Note that any mismatch in resistance or capacitance between two audio inputs will cause a mismatch in the

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ft2705

corner frequencies. Severe mismatch may also cause turn-on pop noise, PSRR, CMRR performance. Choose

CIN with a tolerance of ±2% or better.

Furthermore, the type of the input capacitor is crucial to audio quality. For best audio quality, use capacitors

whose dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with

high-voltage coefficients, such as ceramics, may result in increased distortion at low frequencies. Other factors,

including the constraints of the overall system such as the physical size of the speakers, are to be considered

when designing the input filter.

PRINTED CIRCUIT BOARD (PCB) LAYOUT

Decoupling capacitors – Place the decoupling capacitors CPVDDDL and CPVDDR as individually close to PVDDL

and PVDDR pins as possible. Large bulk power supply decoupling capacitors should be placed close to the

ft2705. Also, place the decoupling capacitor CBYP as close to BYP pin as possible.

Grounding – Use a ground plane with sufficiently wide area on the system board. The PGNDL/R pins must be

directly connected to the ground plane GND. Also, the thermal pad underneath the package must be directly

soldered to the ground plane.

Ferrite Bead EMI Filter – The ferrite EMI filters should be placed tightly together and individually close to their

respective audio output pins, VOPL/R and VONL/R, for the best EMI performance. Keep the current loop,

traversing from each individual audio output through the ferrite bead and the filter capacitor and back to

PGNDL/R, as tight and short as possible.

Class-D Output RC Snubber – Place RC snubber circuits tightly together and as close as possible to the audio

output pins, VOPL/R and VONL/R.

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ft2705

TYPICAL APPLICATION CIRCUITS

VDD

CVDD

10uF

CVDD

220uF

0.33uF

10K

R1 10K

INNL

INPL

INNR

INPR

INNL

INNR

INPR

0.33uF

R4 10K

10K

0.33uF

INPL

PVDDL

VOPL

PGNDL

VONL

PVDDL

CTRL

PVDDR

VOPR

CPVDDL

1uF

CPVDDR

1uF

LSL

LSR

PGNDR

VONR

PVDDR

BYP

SPEAKER

Rctrl1

SPEAKER

10nF

4.7Ω

10nF

4.7Ω

CTRL

CBYP

1uF

ft2705P

Rctrl2

Cctrl

0.1uF

Figure 31: Differential Inputs in Dual BTL Configuration with ALC

VDD

CVDD

10uF

CVDD

220uF

0.33uF

10K

R1 10K

INL

INR

INNL

INNR

INPR

0.33uF

R4 10K

10K

0.33uF

INPL

PVDDL

VOPL

PGNDL

VONL

PVDDL

CTRL

PVDDR

VOPR

CPVDDL

1uF

CPVDDR

1uF

LSL

LSR

PGNDR

VONR

PVDDR

BYP

SPEAKER

10nF

4.7Ω

10nF

4.7Ω

CBYP

1uF

ft2705P

CTRL

Figure 32: Single-Ended Inputs in Dual BTL Configuration without ALC

VDD

CVDD

220uF

0.33uF

10uF

10K

Input

INNL

INNR

INPR

0.33uF

INPL

PVDDL

VOPL

PGNDL

VONL

PVDDL

CTRL

PVDDR

VOPR

CPVDDL

1uF

CPVDDR

1uF

PGNDR

VONR

PVDDR

BYP

4.7Ω

SPEAKER

4.7Ω

CTRL

10nF

CBYP

1uF

ft2705P

10nF

Figure 33: Single-Ended Input in PBTL Configuration without ALC

DEC, 2017

http://www.fangtek.com.cn

ft2705

PHYSICAL DIMENSIONS

SOP-16L PACKAGE OUTLINE DIMENSIONS

Unit: mm

DEC, 2017

http://www.fangtek.com.cn

ft2705

IMPORTANT NOTICE

1. Disclaimer: The information in document is intended to help you evaluate this product. Fangtek, LTD.

makes no warranty, either expressed or implied, as to the product information herein listed, and reserves

the right to change or discontinue work on this product without notice.

2. Life support policy: Fangtek’s products are not authorized for use as critical components in life support

devices or systems without the express written approval of the president and general counsel of Fangtek

Inc. As used herein

Life support devices or systems are devices or systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be reasonably expected to result in a significant

injury to the user.

A critical component is any component of a life support device or system whose failure to perform can be

reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

3. Fangtek assumes no liability for incidental, consequential or special damages or injury that may result

from misapplications or improper use or operation of its products

4. Fangtek makes no warranty or representation that its products are subject to intellectual property

license from Fangtek or any third party, and Fangtek makes no warranty or representation of

non-infringement with respect to its products. Fangtek specifically excludes any liability to the customer or

any third party arising from or related to the products’ infringement of any third party’s intellectual property

rights, including patents, copyright, trademark or trade secret rights of any third party.

5. The information in this document is merely to indicate the characteristics and performance of Fangtek

products. Fangtek assumes no responsibility for any intellectual property claims or other problems that

may result from applications based on the document presented herein. Fangtek makes no warranty with

respect to its products, express or implied, including, but not limited to the warranties of merchantability,

fitness for a particular use and title.

6. Trademarks: The company and product names in this document may be the trademarks or registered

trademarks of their respective manufacturers. Fangtek is trademark of Fangtek, LTD.

CONTACT INFORMATION

Fangtek Electronics (Shanghai) Co., Ltd

Room 501A, No.10, Lane 198, Zhangheng Road

Zhangjiang Hi-tech Park, Pudong District

Shanghai, China, 201204

Tel: +86-21-61631978

Fax: +86-21-61631981

Website:

www.fangtek.com.cn

DEC, 2017

http://www.fangtek.com.cn

ft2705P [FANGTEK]

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