MB3773 [FUJITSU]
Power Supply Monitor with Watch-Dog Timer; 电源监控器与看门狗定时器型号: | MB3773 |
厂家: | FUJITSU |
描述: | Power Supply Monitor with Watch-Dog Timer |
文件: | 总25页 (文件大小:365K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27401-4E
ASSP
Power Supply Monitor
with Watch-Dog Timer
MB3773
■ DESCRIPTION
The Fujitsu MB3773 is designed to monitor the voltage level of a power supply (+5V or an
arbitrary voltage) in a microprocessor circuit, memory board in a large-size computer, for
example. The MB3773 also contains a watch-dog timer function to detect uncontrol. Table
status of processor and reset system/processor.
If the circuit’s power supply deviates more than a specified amount, then the MB3773
generates a reset signal to the microprocessor. Thus, the computer data is protected from
accidental erasure.
PLASTIC PACKAGE
When the MB3773 does not receive the clock pulse from the processor in the specified
period, the MB3773 generates a reset signal to the mciroprocessor.
DIP-8P-M01
Using the MB3773 requires few external components. To monitor only a +5 volt supply,
the MB3773 requires the connection of one external capacitor.
The MB3773 is available in an 8-pin Dual In-Line package space saving Flat Package, or
a Single In-Line Package.
•Precision voltage detection (VS = 4.2V ±2.5%)
•Threshold level with hysterisis
PLASTIC PACKAGE
FPT-8P-M01
•Low voltage output for reset signal (VCC = 0.8V typ.)
•Precision reference voltage output (VREF = 1.245 V±1.5%)
•External clock monitor and reset signal generator
•Negative-edge input watch-dog timer
•Minimal number of external components (one capacitor min.)
•Available in a variety of packages
• 8-pin Dual In-Line Package
PLASTIC PACKAGE
SIP-8P-M03
• 8-pin Flat Package
• 8-pin Single In-Line Package
This device contains circuitry to protect the inputs
against damage due to high static voltages or
electric fields. However, it is advised that normal
precautions be taken to avoid application of any
voltage higher than maximum rated voltages to this
high impedance circuit.
1
MB3773
■ PIN ASSIGNMENT
8
7
6
RESET
VS
VREF
CT
RESET
CK
8
7
6
5
RESET
VS
1
2
VCC
5
4
Front
View
Top View
GND
CK
3
4
VREF
VCC
GND
3
2
1
RESET
CT
(DIP-8P-M01)
(FPT-8P-M01)
(SIP-8P-M03)
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Unit
V
Supply voltage
VCC
-0.3 to +18
S
CC
≤
V
-0.3 to V +0.3 ( +18)
V
Input voltage
VS
VOH
PD
-0.3 to +18
V
RESET, RESET Supply voltage
Power dissipation(Ta ≤ 85°C)
Storage temperature
-0.3 to VCC +0.3 (≤+18)
200
V
mW
°C
TSTG
-55 to +125
NOTE: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
2
MB3773
■ BLOCK DIAGRAM
VCC
5
Reference AMP.
1.24V
1.24V
Reference Voltage Generator
+
_
VREF
6
100
kΩ
1.2µA
COMP.O
10µA
+
_
+
_
10µA
COMP.S
+
R
S
Q
_
VS
7
40kΩ
Inhibit
CK
Watch
Dog
3
Timer
P. G
GND
4
2
1
8
CT
RESET
RESET
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
VCC
IOL
Value
Unit
V
Supply voltage
+3.5 to +16
0 to 20
Reset, reset sink current
VREF output current
mA
µA
ms
µs
IOUT
tWD
-200 to +5
0.1 to 1000
<100
Watch clock setting time
Rising/falling time
tFC, tRC
CT
Terminal capacitance
Operating ambient temperature
0.001 to 10
-40 to +85
µF
°C
Ta
3
MB3773
■ ELECTORICAL CHARACTERISTICS
(
1) DC Characteristics
(VCC=5V, Ta=25°C)
Value
Parameter
Condition
Symbol
Unit
Min
Typ
Max
Supply current
Watch dog timer operating
VCC
ICC
-
600
900
µA
4.10
4.05
4.20
4.15
50
4.20
4.20
4.30
4.30
100
4.30
4.35
4.40
4.45
150
VSL
VSH
Ta = -40°C to +85°C
VCC
Detection voltage
Hysterisis width
V
Ta = -40°C to +85°C
VHYS
VREF
mV
V
VCC
-
Ta = -40°C to +85°C
VCC = 3.5 to 16V
1.227 1.245 1.263
1.215 1.245 1.275
Reference voltage
Reference voltage change rate
∆VREF1
∆VREF2
-
3
-
10
+5
mV
mV
V
Reference voltage output
loading change rate
IOUT = -200µA to+5µA
-5
CK threshold voltage
Ta = -40°C to +85°C
VCK = 5.0V
VTH
IIH
0.8
-
1.25
0
2.0
1.0
-
CK input current
µA
µA
V
VCK = 0.0V
IIL
-1.0
-0.1
Watch dog timer operating
VCT = 1.0V
CK input current
ICTD
7
10
14
VS open, IRESET = -5µA
VS = 0V, IRESET = -5µA
VS = 0V, IRESET = 3mA
VS = 0V, IRESET = 10mA
VS open, IRESET = 3mA
VS open, IRESET = 10mA
VS = 0V, VRESET = 1.0V
VS open, VRESET = 1.0V
VOH1
VOH2
VOL1
VOL2
VOL3
VOL4
IOL1
4.5
4.5
-
4.9
4.9
0.2
0.3
0.2
0.3
60
-
-
High level output voltage
0.4
0.5
0.4
0.5
-
-
Output saturation voltage
Output sink current
V
-
-
20
20
mA
IOL2
60
-
4
MB3773
)
(1) DC Characteristics (Continued
(VCC=5V, Ta=25°C)
Value
Parameter
Condition
Symbol
Unit
Min
Typ
Max
Power on reset operating
VCT = 1.0V
CT charge current
ICTU
0.5
1.2
2.5
µA
V
VRESET = 0.4V
IRESET = 0.2mA
Min. supply voltage for RESET
Min. supply voltage for RESET
VCCL1
VCCL2
-
-
0.8
0.8
1.2
1.2
VRESET =VCC -0.1V
RL (2 pin - GND) = 1MΩ
V
(
2)AC Characteristics
(VCC=5V, Ta=25°C)
Value
Parameter
Condition
Symbol
TPI
Unit
Min
Typ
Max
5V
VCC 4V
VCC input pulse width
8.0
-
-
µs
CK input pulse width
CK input frequency
CK
TCKW
3.0
-
-
µs
or
TCK
20
5
-
-
µs
Watch dog timer
watching time
CT = 0.1µF
CT = 0.1µF
TWD
10
15
ms
Watch dog timer
reset time
TWR
TPR
TPD1
TPD2
tR
1
50
-
2
100
2
3
ms
ms
Rising reset hold time
T
C = 0.1µF, V
CC
150
10
RESET, RL = 2.2kΩ
CL = 100pF
Output propagation
Delay time from VCC
µs
µs
RESET, RL = 2.2kΩ
CL = 100pF
-
3
10
RL = 2.2kΩ
CL = 100pF
Output rising time *
Output falling time *
-
1.0
0.1
1.5
0.5
RL = 2.2kΩ
CL = 100pF
tF
-
* Output rising/falling time are measured at 10% to 90% of voltage.
5
MB3773
Fig. 1 - MB3773 Basic Operation
VCC
CT = 0.1µF
(100ms)
(10ms)
VCC
Logic Circuit
TPR (ms)
TWD (ms)
TWR (ms)
1000 · CT (µF)
100 · CT
(µF)
RESET
RESET
CK
CT
RESET
RESET
CK
20 · CT
(µF)
(2ms)
GND
VCC
VSH
VSL
0.8V
CK
TCK
CT
TPR
TWD
TPR
RESET
TWR
6
MB3773
■ TYPICAL CHARACTERISTIC CURVES
Fig. 2 - Supply current vs. supply voltage
Fig. 3 - Output voltag vs. supply voltage
(RESET pin)
6.0
5.0
4.0
3.0
2.0
0.75
Pull up 2.2kΩ
Ta = 85°C
Ta = 25°C
0.65
Ta = -40°C, 25°C, 85°C
Ta = -40°C
0.55
CT = 0.1µF
Ta = -40°C
0.45
Ta = 25°C
0.35
Ta = 85°C
0.25
1.0
0.15
0
1.0 2.0 3.0
4.0 5.0 6.0 7.0
0
2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0
Supply voltage VCC (V)
Supply voltage VCC (V)
Fig. 5 - Detection voltage
(VSH, VSL) vs. temperature
Fig. 4 - Output voltag vs. supply voltage
(RESET pin)
(RESET, RESET pin)
6.0
5.0
4.0
3.0
2.0
1.0
4.50
4.44
4.30
Pull up 2.2kΩ
VSH
VSL
4.20
4.10
4.00
Ta = 85°C
Ta = 25°C
Ta = -40°C
-40 -20
0
20
40
60
80 100
0
1.0 2.0 3.0
4.0 5.0 6.0 7.0
Temperature Ta (°C)
Supply voltage VCC (V)
Fig. 7 - Output saturation
voltage vs. output sink current
(RESET pin)
Fig. 6 - Output saturation
voltage vs. output sink current
500
400
(RESET pin)
CT = 0.1µF
CT = 0.1µF
Ta = -40°C
Ta = -40°C
400
Ta = 25°C
300
200
300
200
Ta = 25°C
Ta = 85°C
Ta = 85°C
100
100
0
2.0
0
2.0
4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0
Output sink current IOL2 (mA)
4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0
Output sink current IOL8 (mA)
7
MB3773
■ TYPICAL CHARACTERISTIC CURVES (Continued)
Fig. 8 - High level output voltage
vs. high level output current
(RESET pin)
Fig. 9 - High level output voltage
vs. high level output current
(RESET pin)
5.0
5.0
4.5
4.0
CT = 0.1µF
CT = 0.1µF
Ta = 25
Ta = 85
Ta = 25°C
4.5
4.0
Ta = -40°C
Ta = -40°C
Ta= 85°C
0
-5
-10
-15
0
-5
-10
-15
High level output current IOH2 (µA)
High level output current IOH8 (µA)
Fig. 10 - Reference voltage
vs. supply voltage
Fig. 11 - Reference voltage
vs. reference current
1.246
1.244
1.242
1.240
1.238
1.236
1.234
Ta = 25°C
1.255
1.250
1.245
1.240
CT = 0.1µF
Ta = 85°C
Ta = -40°C
Ta= 25°C
Ta= 85°C
CT = 0.1µF
Ta = -40°C
0
-40
-80 -120 -160 -200 -240
0
3.0 5.0 7.0 9.0 11.0 13.0 15.0 17.0 19.0 21.0
Supply voltage VCC (V)
Reference current IREF (µA)
Fig. 12 - Reference voltage
vs. temperature
Fig. 13 - Rising reset hold time
vs. temperature
1.27
1.26
1.25
1.24
160
140
120
100
VCC = 5V
CT = 0.1µF
1.23
1.22
1.21
80
60
40
0
0
-40 -20
0
20
40
60
80 100
-40 -20
0
20
40
60
80 100
Temperature Ta(°C)
Temperature Ta(°C)
8
MB3773
■ TYPICAL CHARACTERISTIC CURVES (Continued)
Fig. 14 - Reset time vs.
temperature
Fig. 15 - Watch dog timer watching
time vs. temperature
(At watch dog timer)
16
VCC = 5V
CT = 0.1µF
3
2
VCC = 5V
CT = 0.1µF
14
12
10
8
1
0
6
4
0
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
Temperature Ta (°C)
Temperature Ta (°C)
Fig. 18 - Terminal capacitance vs.
watch dog timer watching time
Fig. 16 - Terminal capacitance
vs. rising reset hold time
Fig. 17 - Terminal capacitance
vs. reset time
(at watch dog timer)
102
106
106
105
104
103
105
104
101
103
Ta = -40°C
Ta=
25°C,
85°C
102
102
Ta = -40°C
100
101
101
Ta =
-40°C
Ta = 25°C,
Ta = 25°C
10-1
100
100
85°C
85°C
10-1
10-2
10-3
10-1
10-2
10-3
10-2
10-3
10-3
101 102
100
10-1
10-2
10-2
102
10-3
10-1
100 101
101102
10-3 10-2 10-1100
Terminal capacitance CT (µF)
Terminal capacitance CT (µF)
Terminal capacitance CT (µF)
9
MB3773
■ APPLICATION CIRCUIT
EXAMPLE 1 : Monitoring 5V Supply Voltage and Watch-dog Timer
VCC (5V)
MB3773
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
CT
GND
• Supply voltage is monitored using Vs.
Detection voltage are VSH and VSL.
EXAMPLE 2 : 5V Supply Voltage Monitoring (external fine-tuning type)
VCC (5V)
MB3773
R1
R2
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
CT
GND
• Vs detection voltage can be adjusted externally.
• Selecting R1 and R2 values that are sufficiently lower than the resistance of the IC’s internal
voltage divider allows the detection voltage to be setaccording to the resistance ratio between
R1 and R2. (See the table below.)
R1 (kΩ)
10
R2 (kΩ)
3.9
Detection voltage:VSL (V)
Detection voltage:VSH (V)
4.4
4.1
4.5
4.2
9.1
3.9
10
MB3773
EXAMPLE 3 : With Forced Reset (with reset hold)
a
VCC
MB3773
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
CT
SW
GND
• Grouding pin 7 at the time of SW ON sets RESET (pin 8) to Low and RESET (pin 2)
to High.
b
VCC
MB3773
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
Tr
10k
10k
Cr
GND
RESIN
• Feeding the signal to pin RESIN and turning on Tr sets the RESET pin to Low
and the RESET pin to High.
11
MB3773
EXAMPLE 4 : Montitoring Two Supply Voltages (with hysterisis, reset output and NMI)
VCC2(12V)
VCC1 (5V)
Logic circuit
MB3773
RESET
RESET
CK
1
2
3
4
8
7
6
5
CT
100k
R3
NMI or port
GND
180k
10k
R6
R4
+
+
_
_
Comp. 1
1.2k
R1
Comp. 2
5.1k
R2
4.7k
R5
Example
: Comp. 1, Comp. 2
: MB4204, MB47393
NOTE: The 5V supply voltage is monitored by the MB3773.
The 12V supply viltage is monitored by the external circuit. Its output is connected to the NMI
pin and, when voltage drops, Comp. 2 interrrupts the logic circuit.
• Use VCC1 (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit
shown above.
• The detection voltage of the VCC2 (=12V) supply voltage is approximately 0.2V.
VCC2 detection voltage and hysterisis width can be found using the following formulas:
R3 + (R4 // R5)
→
Detection voltage
× V
REF
V2H =
R4 // R5
R3 + R5
(Approx. 9.4V in the above illustration)
(Approx. 9.2V in the above illustration)
V2L =
× VREF
R5
→
HYS
2H
2L
Hysterisis width
V
= V - V
12
MB3773
EXAMPLE 5 : Montitoring Two (M) Supply Voltages (with hysterisis and reset output)
VCC2 (12V)
VCC1 (5V)
20k
R6
MB3773
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
Diode
CT
30k
R3
GND
180k
R4
+
_
+
_
Comp. 1
1.2k
R1
Comp. 2
5.1k
R2
4.7k
R5
Example
: Comp. 1, Comp. 2
: MB4204, MB47393
SL), the MB3773
NOTE: When either 5V or 12V supply voltage decreases below its detection voltage (V
RESET pin is set to High and the MB3773 RESET pin is set to Low.
• Use VCC1 (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown
above.
• The detection voltage of the VCC2 (=12V) supply voltage is approximately 9.2V/9.4V and has a
hysterisis width of approximately 0.2V.
For the formulas for finding hysterisis width and detection voltage, see section 4.
13
MB3773
EXAMPLE 6 : Montitoring Low voltage and Overvoltage Monitoring (with hysterisis)
VCC (5V)
20k
R6
MB3773
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
Diode
CT
30k
R3
GND
180k
R4
_
+
_
+
Comp. 1
1.2k
R1
Comp. 2
5.6k
R2
4.7k
R5
Example
: Comp. 1, Comp. 2
: MB4204, MB47393
RESET
VCC
0
V2L V2H
V1L V1H
• Comp. 1 and Comp. 2 are used to monitor for overvoltage while the MB3773 is used to monitor for low
voltage.
Detection voltages V1/V1H at the time of low voltage areappoximately 4.2V/4.3V. Detection voltages
V2L/V2H at the time of overvoltage are approximately 6.0V/6.1V.
For the formulas for finding hysterisis width and detection voltage, see section 4.
• Use VCC (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above.
14
MB3773
EXAMPLE 7 : Monitoring Supply Voltage Using Delayed Trigger
VCC
5V
VCC
4V
MB3773
Logic circuit
RESET
RESET
CK
1
2
3
4
8
7
6
5
CT
C1
GND
• Adding voltage such as shown in the figure to VCC increases the minimum input pulse
width by 50 microseconds (C1 = 1000pF).
15
MB3773
EXAMPLE 8 : Stopping Watch-dog Timer (Monitering only supply voltage)
These are example application circuts in which the MB3773 monitors supply voltage alone without resetting
the microcomputer even if the latter, used in standby mode, stops sending the clock pulse to the MB3773.
•The watch-dog timer is inhibited by clamping the Cr pin voltage to VREF .
The supply voltage is constantly monitored even while the watch-dog timer is inhibited.
For this reason, a reset signal is output at the occurrence of either instataneous disruption or a sudden drop
to low voltage.
Note that in application examples a and b, the hold signal is inactive when the watch-dog timer is inhibited
at the time of resetting.
If the hold signal is active when tie microcomputer is reset, the solution is to add a gate, as in examples c and d.
a Using NPN transistor
VCC(5V)
MB3773
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
HALT
GND
R2=1k
R1=1M
CT
b Using PNP transistor
VCC (5V)
MB3773
Logic circuit
RESET
RESET
CK
1
2
3
4
8
7
6
5
HALT
GND
R2=1k
R1=51k
CT
(Continued)
16
MB3773
(Continued)
c Using NPN transistor
VCC (5V)
MB3773
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
R1=1M
HALT
GND
R2=1k
CT
d Using PNP transistor
VCC (5V)
MB3773
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
R1=51k
HALT
GND
R2=1k
CT
17
MB3773
EXAMPLE 9 : Reducing Reset Hold Time
VCC(=5V)
VCC (=5V)
MB3773
MB3773
Logic circuit
Logic circuit
1
2
3
4
8
7
6
5
RESET
RESET
CK
1
2
3
4
8
7
6
5
RESET
RESET
CK
CT
CT
GND
GND
(a) TPR reduction method
(b) Standard usage
• RESET is the only output that can be used.
• Standard TPR, TWD and TWR value can be found using the following formulas.
Formulas :
TPR (ms)
100 × CT (µF)
100 × CT (µF)
16 × CT (µF)
TWD (ms)
TWR (ms)
• The above formulas allow fo standard values in determining TPR, TWD and TWR.
Reset hold time is compared below between the reduction circuitand the standard circuit.
CT = 0.1µF
TPR reduction circuit
Standard circuit
100ms
10ms
10ms
1.6ms
TPR
TWD
TWR
10ms
2.0ms
18
MB3773
EXAMPLE 10 : Circuit for Monitoring Multiple Microcomputers
VCC (=5V)
FF1
D1
FF2
D2
FF3
D3
S
S
S
Q1
Q2
Q3
CK1 Q1
R
CK2 Q2
R
CK3 Q3
R
R2
R1
RESET
RESET
RESET
RESET
CK
RESET
CK
RESET
CK
GND
GND
GND
1
2
8
7
6
5
3
4
CT
MB3773
Figure 1
•
connects from FF1 and FF2 outputs Q1 and Q2 to the NOR input.
Depending on timing, these connections may not be necessary.
Example:R1 = R2 = 2.2kΩ
CT = 0.1µF
CK1
Q1
CK2
Q2
CK3
Q3
NOR
Output
Figure 2
19
MB3773
Description of Application Circuits
Using one MB3773, this application circuit monitors multiple microcomputers in one system. Signals from each microcomputer
are sent to FF1, FF2 and FF3 clock inputs. Figure 2 shows these timings. Each flip-flop operates using signals sent from mi-
crocomputers as its clock pulse. When even one signal stops, the relevant receiving flip-flop stops operating. As a result, cy-
clical pulses are not generated at output Q3. Since the clock pulse stops arriving at the CK pin of the MB3773, the MB3773
generates a reset signal.
Note that output Q3 frequncy f will be in the following range, where the clock frequencies of CK1, CK2 and CK3 are f1, f2 and f3
respectively.
1
f0
1
f
1
1
1
f
3
--- --
≤
≤ ---- --- ----
+ +
f
1
f
2
where f0 is the lowest frequency among f1, f2 and f3.
20
MB3773
EXAMPLE 11 : Circuit for Limiting Upper Clock Input Frequency
VCC (5V)
R2
1
2
3
4
8
7
6
5
RESET
RESET
CT
R1=10kΩ
CK
Tr1
GND
C2
• This is an example application to limit upper frequency fH of clock pulses sent from the
microcomputer.
If the CK cycle sent from the microcomputer exceeds fH, the circuit generates a reset
signal.
(The lower freqency has already been set using Cr.)
• When a clock pulse such as shown below is sent to pin CK, a short T2 prevents C2 voltage
from reaching the CK input threshold level ( 1.25V), and will cause a reset signal to be
output.
The T1 value can be found using the following formula :
T1 0.3 C2R2
T2
CK waveform
where VCC = 5V, T3 ≥ 3.0µsec, T2 ≥ 20µsec
T3
C2 voltage
T1
Example : Setting C and R allow the upper T1 value to be set (See the table below.)
C
R
T1
0.01µF
0.1µF
10kΩ
10kΩ
30µs
300µs
21
MB3773
■ PACKAGE DIMENSIONS
8 pin, Plastic DIP
(DIP-8P-M01)
+0.40
–0.30
.370+–..001126
9.40
6.20±0.25
(.244±.010)
1 PIN INDEX
0.51(.020)MIN
4.36(.172)MAX
3.00(.118)MIN
+0.30
0.25±0.05
(.010±.002)
0.46±0.08
(.018±.003)
+0.30
15°MAX
0.99
1.52
–0
–0
7.62(.300)
TYP
.039+–0.012
.060–+0.012
+0.35
–0.30
.035+–..001124
0.89
2.54(.100)
TYP
Dimensions in mm (inches).
C
1994 FUJITSU LIMITED D08006S-2C-3
22
MB3773
■ PACKAGE DIMENSIONS (Continued)
8 pin, Plastic SOP
(FPT-8P-M01)
2.25(.089)MAX
6.35+–00..2205 .250 –+..000180
0.05(.002)MIN
(STAND OFF)
6.80+–00..2400
5.30±0.30
7.80±0.40
INDEX
.268+–..000186
(.209±.012) (.307±.016)
1.27(.050)
TYP
0.45±0.10
(.018±.004)
0.15+–00..0025
.006–+..000012
0.50±0.20
(.020±.008)
M
Ø0.13(.005)
3.81(.150)REF
Details of "A" part
0.20(.008)
0.50(.020)
0.18(.007)MAX
"A"
0.68(.027)MAX
0.10(.004)
Dimensions in mm (inches).
C
1994 FUJITSU LIMITED F08002S-4C-4
23
MB3773
■ PACKAGE DIMENSIONS (Continued)
8 pin, Plastic SIP
(SIP-8P-M03)
3.26±0.25
(.128±.010)
+0.15
–0.35
19.65
.774 –+..001046
INDEX-1
6.20±0.25
(.244±.010)
8.20±0.30
(.323±.012)
INDEX-2
+0.30
–0
.039+–0.012
0.99
4.00±0.30
(.157±.012)
+0.30
–0
1.52
2.54(.100)
TYP
0.50±0.08
(.020±.003)
0.25±0.05
(.010±.002)
.060+–0.012
Dimensions in mm (inches).
C
1994 FUJITSU LIMITED S08010S-3C-2
24
MB3773
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 4-1-1, Kamikodanaka
Nakahara-ku, Kawasaki-shi
Kanagawa 211-8588, Japan
Tel: (044) 754-3763
All Rights Reserved.
The contents of this document are subject to change without
notice. Customers are advised to consult with FUJITSU sales
representatives before ordering.
Fax: (044) 754-3329
http://www.fujitsu.co.jp/
The information and circuit diagrams in this document presented
as examples of semiconductor device applications, and are not
intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the
use of this information or circuit diagrams.
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922-9000
Fax: (408) 922-9179
FUJITSU semiconductor devices are intended for use in
standard applications (computers, office automation and other
office equipment, industrial, communications, and measurement
equipment, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect human lives or cause physical injury or property damage,
or where extremely high levels of reliability are demanded (such
as aerospace systems, atomic energy controls, sea floor
repeaters, vehicle operating controls, medical devices for life
support, etc.) are requested to consult with FUJITSU sales
representatives before such use. The company will not be
responsible for damages arising from such use without prior
approval.
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: (800) 866-8608
Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10
D-63303 Dreieich-Buchschlag
Germany
Tel: (06103) 690-0
Fax: (06103) 690-122
Any semiconductor devices have inherently a certain rate of
failure. You must protect against injury, damage or loss from
such failures by incorporating safety design measures into your
facility and equipment such as redundancy, fire protection, and
prevention of over-current levels and other abnormal operating
conditions.
http://www.fujitsu-ede.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD
#05-08, 151 Lorong Chuan
New Tech Park
Singapore 556741
Tel: (65) 281-0770
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Control Law of Japan, the
prior authorization by Japanese government should be required
for export of those products from Japan.
Fax: (65) 281-0220
http://www.fmap.com.sg/
F9803
FUJITSU LIMITED Printed in Japan
25
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