MB88141_技术文档

FUJITSU SEMICONDUCTOR

DATA SHEET

DS04-13211-3E

General Purpose Linear IC’s General Purpose Converters

CMOS

D/A Converter for Digital Tuning

(With Built-in OP Amp and I/O Expander)

MB88141

■ DESCRIPTION

The FUJITSU MB88141 is a D/A converter with 12 built-in channels.

The 12 analog output channels have built-in OP Amps, providing large current drive capability.

Data input is compatible with I²C specifications, and is controlled by two control lines.

The built-in I/O expander function allows the MB88141 to be controlled by devices incompatible with I²C bus

specifications (provides conversion between I²C serial and 8- or 4-bit parallel I/O).

Can be adapted for tuning by electronically variable or pre-fixed resistance, etc.

■ FEATURES

• Ultra-low power consumption (0.9 mW/channel Typ.)

• Ultra-compact package

• Built-in 12-channel R-2R type 8-bit D/A converter

• Built-in analog output amplifier (maximum sink current 1.0 mA, maximum source current 1.0 mA)

• Analog output range 0 V to V^CC

(Continued)

■ PACKAGES

24-pin plastic DIP

24-pin plastic SOP

24-pin plastic SSOP

(DIP-24P-M02)

(FPT-24P-M01)

(FPT-24P-M03)

“Purchase of Fujitsu I²C components conveys a license under the Philips I²C Patent Rights to use these

components in an I²C system, provided that the system conforms to the I²C Standard Specification as defined

by Philips.”

MB88141

(Continued)

• 5 V single power supply

• Power supply/GND for MCU interface and OP Amp is separate from power supply/GND for D/A converter

• Power supply for D/A converter is divided into two systems for VDD1/VSS1 (AO1 to AO4) and VDD2/VSS2 (AO5 to

AO¹²), allowing separate level settings for each system

• Compatible with serial data input, I²C specifications

• Built-in I/O expander function (converts between I²C serial and 8- or 4-bit parallel)

• CMOS process

• Packages: DIP 24-pin, SOP 24-pin, SSOP 24-pin

2

MB88141

■ PIN ASSIGNMENT

(TOP VIEW)

AO1

AO2

1

24

23

22

21

20

19

18

17

16

15

14

13

GND

VSS1

VDD1

SDA

SCL

2

AO3

3

AO4

4

D7/AO5

D6/AO6

D5/AO7

D4/AO8

D3/AO9

D2/AO10

D1/AO 11

D0/AO12

5

6

MOD

CS2

7

8

CS1

9

CS0

10

11

12

VDD2

VSS2

VCC

(DIP-24P-M02)

(FPT-24P-M01)

(FPT-24P-M03)

3

MB88141

■ PIN DESCRIPTIONS

Pin no.

21

Symbol

SDA

I/O

BUS

I

Description

I²C bus data input/output pin (hysteresis input). *²

Outputs the acknowledge signal.

20

SCL

I²C bus shift clock input pin (hysteresis input). *²

D/A converter and I/O expander mode switching pin. *^1,*³

Input “L” to operate as a D/A converter, “H” to operate as I/O expander and

D/A converter.

19

MOD

I

16

17

18

CS0

CS1

CS2

Lower 3 bits of the slave address setting pins. *¹

This allows up to eight MB88141 chips to be used on the same bus line.

1

2

3

4

AO1

AO2

AO3

AO4

O

8-bit D/A output with OP Amp. *³

5

6

7

8

9

10

11

12

D7/AO5

D6/AO6

D5/AO7

D4/AO8

D3/AO9

D2/AO10

D1/AO11

D0/AO12

8-bit D/A output with OP Amp. *³

I/O

In I/O expander operation, these pins function as parallel data input/output

pins.

13

24

22

23

15

14

VCC

GND

Power supply pin for digital circuits and OP Amp.

GND pin for digital circuits and OP Amp.

VDD1

VSS1

VDD2

VSS2

Reference power supply pin for D/A converter (H). AO1 to AO4.

Reference power supply pin for D/A converter (L). AO1 to AO4.

Reference power supply pin for D/A converter (H). AO5 to AO12.

Reference power supply pin for D/A converter (L). AO5 to AO12.

*1: The MOD and CS0-CS2 pins should be used with fixed level input.

*2: Use particular caution in handling the SDA and SCL pins. These pins have no transistor protection against V^CC

voltage and therefore have weaker anti-static characteristics than other pins.

*3: When using the I/O expander function together with the D/A converter function, take care that D/A converter

output precision is within a range that will not affect overall system operation.

4

MB88141

■ BLOCK DIAGRAM

SDA

SCL

CS2

CS1

CS0

MOD

I²C Bus Interface

D/A & I/O Control Logic

D0

D7

D0

D7

D0

D7

D0

D7

8-bit latch

1 ch

4 ch

5 ch

12 ch

VDD1

VSS1

VDD2

VSS2

R-2R

ladder circuit

R-2R

ladder circuit

R-2R

ladder circuit

R-2R

ladder circuit

−

+

−

+

−

+

−

+

8

VCC

GND

AO1

AO4

AO5/D7

AO12/D0

5

MB88141

■ DATA CONFIGURATION

The MB88141 data configuration differs in each of the two operating modes (D/A converter (12-channel) and

I/O expander plus D/A converter), selected by the MOD pin signal.

1. For D/A Converter (12-channel) Operation (MOD = “L”)

(1) I²C Bus Format

First S6

S0 R/W

0

C7

C0

D7

D0

Last

P

S

Slave address (7 bits)

A

Channel selection (8 bits)

A

D/A data (8 bits)

A

: Sent from master device

: Sent from MB88141 (slave device)

S: “Start” condition

P: “Stop” condition A: “Acknowledge” output

(2) Slave Address Comparison (7 bits)

Slave address input (7 bits)

Internally fixed

Externally set

S6 S5 S4 S3 S2 S1 S0

CS6 CS5 CS4 CS3 CS2 CS1 CS0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

=

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Address comparison: Operates only for devices whose own slave address (internally fixed CS6 to CS3 and

externally set CS2 to CS0) matches the slave address input value.

(3) R/W Selection (1 bit)

Fixed at “0” (the D/A converter performs write operations only).

6

MB88141

(4) Channel Selection (8 bit)

C7 C6 C5 C4 C3 C2 C1 C0

Channel select

All channels selected *¹

AO1 selected

×

0

1

×

1

0

1

0

1

0

1

AO12 selected

Don’t care

All channels selected *²

×: Don’t care

*1: The 1 byte of data following the channel selection is set on all channels (all channels set to the same data value).

S

Slave address (7 bits)

0

A

XXXX0000

A

D/A data (8 bits)

A

P

*2: The 12 bytes of data following the channel selection are set on all channels (all channels set to separate data

values).

• • •

S

Slave address

0

A

XXXX1111

A

AO1 data

A

AO12 data

A

P

: Sent from master device

: Sent from MB88141 (slave device)

A: “Acknowledge” output

S: “Start” condition P: “Stop” condition

Note: Setting will repeat, continuing in order from ch1, until the start and stop conditions are acknowledged.

(5) D/A Data (8 bits)

D7 D6 D5 D4 D3 D2 D1 D0

Channel select

V^SS

0

1

0

1

0

(VREF / 256) × 1 + VSS

(VREF / 256) × 2 + VSS

1

0

1

(VREF / 256) × 254 + VSS

(VREF / 256) × 255 + VSS

Note: V^REF= VDD − VSS

7

MB88141

2. For D/A Converter + I/O Expander Operation (MOD = “H”)

(1) I²C Bus Format

S6

Slave address (7 bits)

S0

Slave address (7 bits)

D0

S0

D7

First

R/W

1

Last

P

A

S

Digital data (8 bits)

A

C7

D7

First S6

R/W

0

D0

Last

P

C0

S

A

Channel selection (8 bits)

A

Digital data (8 bits)

A

: Sent from master device

: Sent from MB88141 (slave device)

S: “Start” condition

P: “Stop” condition A: “Acknowledge” output

(2) Slave Address Comparison (7 bits)

Slave address comparison is the same as for D/A converter (12-channel) operation (see “1. (2) “Slave Address

Comparison”), with the exception that the CS2 setting determines the number of D/A converter channels and

the number of I/O expander bits.

CS2

0

D/A converter

I/O expander

8 bits (D7 to D0)

4 bits (D3 to D0)

4 channels (AO1 to AO4)

8 channels (AO1 to AO8)

1

When CS2 = “1” is selected, the upper 4 bits (D⁷to D4) of write operations (I²C bus to parallel interface) are

ignored, and the upper 4 bits or read operations (parallel interface to I²C bus) are output at “0” (low).

(3) R/W Selection (1 bit)

R/W

0

I/O expander operation

D/A converter operation

I²C bus input → parallel data output

Parallel data input → I²C bus output

I²C bus input → analog output

1

8

MB88141

(4) Channel Selection (8 bits)

C7 C6 C5 C4 C3 C2 C1 C0

Channel select

I/O expander operation

AO1 selected

×

0

1

×

0

1

0

1

AO4 selected

Don’t care (AO5 selected)

×

1

0

1

Don’t care (AO8 selected)

Don’t care

×

1

0

1

Don’t care

I/O expander continuous operation

( ): When using D/A converter 8 channel, I/O expander 4 bit operation.

×: Don’t care

(5) D/A Data (8 bits)

Same as “1. (5) D/A Data (8 bits).”

(6) I/O Expander Continuous Operation

I²C bus input → parallel data output

• • •

S

Slave address

0

A

XXXX1111

A

Digital data

A

P

A

Note: In continuous operation, operation continues until start and stop conditions are acknowledged.

Parallel data input → I ²C bus output

• • •

S

Slave address

1

A

Digital data

A

Digital data

A

Digital data

A

P

: Sent from master device

: Sent from MB88141 (slave device)

A: “Acknowledge” output

S: “Start” condition P: “Stop” condition

9

MB88141

■ TIMING CHART (I²C BUS SPECIFICATIONS)

"Start"

condition

Data

change

"Acknowledge"

response

"Acknowledge"

response

"Acknowledge""Stop"

response condition

SDA

input

S6 S5 S4 S3 S2

S1 S0 R/W ACK C7 C6 C5

C0 ACK D7 D6

D0 ACK

SCL

input

1

2

3

4

5

6

7

8

9

10

11

12

17

18

19

20

26 27

Delay

AO1 to

AO12

Analog output

Delay

D0 to D7

output

HiZ state

HiZ input

Digital input

Load data

D0 to D7

input

DX

"Acknowledge"

response

SDA

output

HiZ state

D7 D6 D5

D0

D7 D6

D0

D7

Note:

• The SDA input acknowledge response (ACK) is an output signal from the MB88141.

• The D0-D7 input and output timing represent the timing of switching to write and read operations respectively.

Also, D0-D7 input remains in HiZ state between the end of a read operation and the acknowledgment of the

next I/O write signal.

■ ANALOG OUTPUT VOLTAGE RANGE

R-2R ladder circuit

VDD1 & VDD2

Operating amp circuit

VCC ( = VDD1, VDD2)

Analog output range

VSS1 & VSS2

GND ( = VSS1, VSS2)

10

MB88141

■ ABSOLUTE MAXIMUM RATINGS

Rating

Parameter

Symbol

Conditions

Unit

Min.

−0.3

Max.

V^CC

VDD

V^SS

VIN

+7.0*

V

Supply voltage

With reference to GND,

at Ta = +25 °C

+7.0*

V

Input voltage

VCC + 0.3

250

V

Output voltage

V^OUT

P^D

V

Power consumption

Operating temperature

Storage temperature

mW

°C

Ta

−20

−55

+85

Tstg

+120

*: VCC ≥ VDD1 ≥ VSS1, VCC ≥ VDD2 ≥ VSS2

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

■ RECOMMENDED OPERATING CONDITIONS

Value

Parameter

Symbol

Conditions

Unit

Min.

Typ.

5.0

0

Max.

V^CC

GND

V^DD1

VSS1

V^DD2

VSS2

I^AL

4.5

5.5

V

Supply voltage 1

2.0

0

V^CC

3.5

V^CC

3.5

1.0

#FF

+85

V

VCC ≥ VDD1 > VSS1

VDD1 − VSS1 ≥ 2.0 V

Supply voltage 2

Supply voltage 3

Analog output current

V

2.0

0

V

VCC ≥ VDD2 > VSS2

VDD2 − VSS2 ≥ 2.0 V

V

Source current

Sink current

0

mA

µF

I^AH

0

Oscillator limit output capacitance

Digital data setting range

Operating temperature

C^OL

#00

Ta

−20

°C

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is

operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation

outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on

the data sheet. Users considering application outside the listed conditions are advised to contact their

FUJITSU representatives beforehand.

11

MB88141

■ ELECTRICAL CHARACTERISTICS

1. DC Characteristics

(1) Digital Circuits

(VCC = 5 V ± 10%, GND = 0 V, Ta = −20 °C to +85 °C)

Value

Parameter

Supply voltage

Symbol

Pin name

Conditions

Unit

Min.

Typ.

Max.

V^CC

I^CC

4.5

5.0

5.5

V

VCC

SCL = 400 kHz,

no load

Supply current

1.0

3.7

mA

Input leak current

I^ILK

V^IL

SDA, SCL, V^IN= 0 to VCC

CS0, CS1,

CS2, MOD,

−10

0

+10

0.3 VCC

VCC

µA

V

“L” level input voltage

“H” level input voltage

Input hysteresis width

“H” level output voltage

VIH

0.7 VCC

0.05 VCC

VCC − 0.4

V

D0 to D7

V^HYS

V^OH

V^OL1

VOL2

V^OL3

SDA, SCL

V

I^OH= −400 µA

D0 to D7

V

IOL = 2.5 mA

0.4

0.6

V

“L” level output voltage

I^OL= 3.0 mA

SDA

V

IOL = 6.0 mA

V

(2) Analog Circuits 1

(VCC = 5 V ± 10%, GND = 0 V, Ta = −20 °C to +85 °C)

Value

Parameter

Symbol Pinname

Conditions

Unit

Min.

Typ.

Max.

2.5

No load

I^DD= IDD1 + IDD2

Current consumption

I^DD

V^DD

V^SS

1.2

mA

V

VDD1,

VDD2

2.0

V^CC

3.5

VDD1 − VSS1 ≥ 2.0 V

VDD2 − VSS2 ≥ 2.0 V

Analog voltage

VSS1,

VSS2

GND

V

Resolution

Res

Rem

LE

8

bit

No load

V^DD1, VDD2 ≤ VCC − 0.1 V

VSS1, VSS2 ≥ 0.1 V

Monotonic increase

Non-linearity error

Differential linearity error

AO1 to

AO12

−1.5

−1.0

+1.5

+1.0

LSB

DLE

12

MB88141

Non-linearity error:

Error in the input/output curve with respect to a straight line connecting output voltage at “00” and output voltage

at “FF” levels.

Differential linearity error:

Deviation from ideal voltage with respect to a 1-bit increase in digital value.

Analog output

Ideal linearity

VAOH

Non-linearity error

VAOL

Digital setting

#00

#FF

Note: VAOH and VDD, as well as VAOL and VSS are not necessarily the same values.

(3) Analog Circuits 2

(VCC = VDD1 = VDD2 = 5.0 V, GND = VSS1 = VSS2 = 0.0 V, Ta = −20 °C to +85 °C)

Value

Typ.

Symbol Pin name

Parameter

Conditions

Unit

Min.

V^SS

Max.

VSS + 0.1

VSS + 0.2

VSS + 0.3

VDD

Output minimum voltage 1

Output minimum voltage 2

Output minimum voltage 3

Output minimum voltage 4

Output minimum voltage 5

V^AOL1

V^AOL2

V^AOL3

V^AOL4

I^AL= 0 µA

V

IAL = 500 µA

IAH = 500 µA

IAL = 1.0 mA

IAH = 1.0 mA

IAL = 0 µA

VSS − 0.2

VSS

Digital data

“00”

VSS − 0.3

VSS

V^AOL5

AO1 to

AO12

Output maximum voltage 1 V^AOH1

Output maximum voltage 2 V^AOH2

Output maximum voltage 3 V^AOH3

Output maximum voltage 4 V^AOH4

Output maximum voltage 5 V^AOH5

V^DD− 0.1

VDD − 0.2

VDD − 0.3

IAL = 500 µA

IAH = 500 µA

IAL = 1.0 mA

IAH = 1.0 mA

VDD

Digital data

“FF”

VDD

VDD + 0.2

VDD

VDD + 0.3

13

MB88141

2. AC Characteristics

Parameter

Value

High speed mode

Con-

dition

Symbol

Standard mode

Unit

Min.

Max.

Min.

Max.

SCL clock frequency

f^SCL

0

100

0

400

kHz

Bus free time between “stop” condition

and “start” condition

tBUF

4.7

1.3

µs

Hold time (resend) “start” condition.

The first clock pulse is generated after

this interval.

t^{HD ; STA}

4.0

0.6

µs

SCL clock low hold time

SCL clock high hold time

Resend “start” condition setup time

Data hold time

t^LOW

tHIGH

4.7

4.0

4.7

0

1.3

0.6

0

µs

ns

µs

t^{SU ; STA}

tHD ; DAT

t^{SU ; DAT}

tR

0.9

Data setup time

250

100

SDA and SCL signal fall time

SDA and SCL signal rise time

“Stop” condition setup time

1000

300

20 + 0.1 Cb

0.6

300

tF

t^{SU ; STO}

4.0

Pulse width of spike suppressed by input

filter

tSP

0

50

ns

Output fall time when Sink current 3 mA

bus capacitance is

250

20 + 0.1 Cb

250

t^OF

between 10 pF and

400 pF

Sink current 6 mA

20 + 0.1 Cb

250

ns

I²C bus line capacitance load

Cb

400

100

300

400

100

300

pF

µs

ns

µs

D/A

Analog output settling time

tDL ; AO

t^{DL ; DO}

tDZ ; DI

tSU ; DI

tHD ; DI

*1

*2

*3

Digital output delay time

Input open time

200

250

0.9

200

100

0.9

I/O

expander

Digital input setup time

Digital input hold time

*1: Load condition 1

*2: Load condition 2

Measurement point

DUT

RAL = 10 kΩ

CAL = 50 pF

*3: The I/O expander input open time value applies to read operation following an I/O write operation, or to an

I/O write operation following a read operation.

14

MB88141

• Input/output Timing

tBUF

tHD; STA

• •

SDA

SCL

Acknowl

edge

Acknowl

edge

• •

tHD; DAT

• •

tSU; DAT

• •

tSP

tSU; STA

tHD; STA

9

18

P

S

Sr

P

• •

tSU; STO

tR

tF

tHD; DI

tLOW

tHIGH

tDZ; DI

tSU; DI

D0 to D7

Digital input

tDZ; DI

tDL; DO

Digital input

Digital output

tDL; AO

90%

10%

AO1 to

AO12

Analog output

Note: The discrimination levels are 70% and 30% of VCC.

15

MB88141

■ ORDERING INFORMATION

Part number

Package

Remarks

24-pin plastic DIP

(DIP-24P-M02)

MB88141P

24-pin plastic SOP

(FPT-24P-M01)

MB88141PF

MB88141PFV

24-pin plastic SSOP

(FPT-24P-M03)

16

MB88141

■ PACKAGE DIMENSIONS

24-pin plastic DIP

(DIP-24P-M02)

+0.20

+.008

30.20

^–0.301.189 ^–.012

INDEX-1

13.55±0.25

(.533±.010)

INDEX-2

0.51(.020)MIN

4.96(.195)

MAX

3.00(.118)

MIN

0.25±0.05

(.010±.002)

+0.50

–0

+0.50

0.98

1.50

–0

0.45±0.08

(.018±.003)

.039 ⁺^–0^.020

.059 ⁺^–0^.020

15°MAX

15.24(.600)

TYP

1.27(.050)

MAX

2.54(.100)

TYP

C

1994 FUJITSU LIMITED D24015S-2C-3

Dimensions in mm (inches)

(Continued)

17

MB88141

(Continued)

24-pin plastic SOP

(FPT-24P-M01)

2.25(.089)MAX

(Mounting height)

15.24 ⁺^–0⁰^.^.²²⁰⁵.600 ^–⁺^.^.⁰⁰⁰¹⁸⁰

0.05(.002)MIN

(STAND OFF)

6.80 –⁺0⁰.^.2⁴0⁰

5.30±0.30

(.209±.012) (.307±.016)

7.80±0.40

INDEX

.268 –⁺.^.0⁰0¹8⁶

1.27(.050)

TYP

0.45±0.10

(.018±.004)

0.15 –⁺0⁰.^.0⁰2⁵

0.50±0.20

(.020±.008)

M

Ø0.13(.005)

.006 ⁺^–.^.⁰⁰⁰⁰¹²

Details of "A" part

0.20(.008)

"A"

0.50(.020)

0.10(.004)

13.97(.550)REF

0.18(.007)MAX

0.68(.027)MAX

C

2000 FUJITSU LIMITED F24007S-3C-5

Dimensions in mm (inches)

(Continued)

18

MB88141

(Continued)

24-pin plastic SSOP

Note) * marked dimensions do not include resin residues.

(FPT-24P-M03)

1.25 –⁺0⁰.^.1²0⁰

*

7.75±0.10(.305±.004)

(Mounting height)

.049 ⁺^–.^.⁰⁰⁰⁰⁴⁸

0.10(.004)

*

5.60±0.10

7.60±0.20

6.60(.260)

NOM

(.220±.004) (.299±.008)

INDEX

"A"

0.22 –⁺0⁰.^.0¹5⁰

0.15 –⁺0⁰.^.0⁰2⁵

Details of "A" part

0.10±0.10(.004±.004)

0.65±0.12(.0256±.0047)

.009 ⁺^–.^.⁰⁰⁰⁰²⁴

.006 ⁺^–.^.⁰⁰⁰⁰¹²

(STAND OFF)

7.15(.281)REF

0

10°

0.50±0.20

(.020±.008)

C

2000 FUJITSU LIMITED F24018S-2C-3

Dimensions in mm (inches)

19

MB88141

FUJITSU LIMITED

For further information please contact:

Japan

FUJITSU LIMITED

Corporate Global Business Support Division

Electronic Devices

The contents of this document are subject to change without notice.

Customers are advised to consult with FUJITSU sales

representatives before ordering.

Shinjuku Dai-Ichi Seimei Bldg. 7-1,

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Tokyo 163-0721, Japan

Tel: +81-3-5322-3347

Fax: +81-3-5322-3386

The information and circuit diagrams in this document are

presented as examples of semiconductor device applications, and

are not intended to be incorporated in devices for actual use. Also,

FUJITSU is unable to assume responsibility for infringement of

any patent rights or other rights of third parties arising from the use

of this information or circuit diagrams.

http://edevice.fujitsu.com/

North and South America

FUJITSU MICROELECTRONICS, INC.

3545 North First Street,

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Tel: +1-408-922-9000

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The contents of this document may not be reproduced or copied

without the permission of FUJITSU LIMITED.

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Tel: +1-800-866-8608

FUJITSU semiconductor devices are intended for use in standard

applications (computers, office automation and other office

equipments, industrial, communications, and measurement

equipments, personal or household devices, etc.).

Fax: +1-408-922-9179

http://www.fujitsumicro.com/

CAUTION:

Europe

Customers considering the use of our products in special

applications where failure or abnormal operation may directly

affect human lives or cause physical injury or property damage, or

where extremely high levels of reliability are demanded (such as

aerospace systems, atomic energy controls, sea floor repeaters,

vehicle operating controls, medical devices for life support, etc.)

are requested to consult with FUJITSU sales representatives before

such use. The company will not be responsible for damages arising

from such use without prior approval.

FUJITSU MICROELECTRONICS EUROPE GmbH

Am Siebenstein 6-10,

D-63303 Dreieich-Buchschlag,

Germany

Tel: +49-6103-690-0

Fax: +49-6103-690-122

http://www.fujitsu-fme.com/

Asia Pacific

FUJITSU MICROELECTRONICS ASIA PTE. LTD.

#05-08, 151 Lorong Chuan,

New Tech Park,

Any semiconductor devices have inherently a certain rate of failure.

You must protect against injury, damage or loss from such failures

by incorporating safety design measures into your facility and

equipment such as redundancy, fire protection, and prevention of

over-current levels and other abnormal operating conditions.

Singapore 556741

Tel: +65-281-0770

Fax: +65-281-0220

http://www.fmap.com.sg/

If any products described in this document represent goods or

technologies subject to certain restrictions on export under the

Foreign Exchange and Foreign Trade Control Law of Japan, the

prior authorization by Japanese government should be required for

export of those products from Japan.

Korea

FUJITSU MICROELECTRONICS KOREA LTD.

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Kangnam-Gu,Seoul 135-280

Korea

Tel: +82-2-3484-7100

Fax: +82-2-3484-7111

F0101

FUJITSU LIMITED Printed in Japan


型号：	MB88141
厂家：	FUJITSU
描述：	D/A Converter for Digital Tuning (With Built-in OP Amp and I/O Expander) D / A转换器，用于数字调谐（带内置运算放大器和I / O扩展器）转换器运算放大器
文件：	总20页 (文件大小：238K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MB88141 [FUJITSU]

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