MB89805PFV [FUJITSU]
8-bit Proprietary Microcontroller; 8位微控制器专有
| 型号： | MB89805PFV |
| 厂家： | 
FUJITSU |
| 描述： | 8-bit Proprietary Microcontroller |
| 文件： | 总39页 (文件大小：307K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12549-1E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89800 Series
MB89803/805/P808/PV800
■ DESCRIPTION
MB89800 series is a line of single-chip microcontrollers using the F2MC-8L* CPU core which can operate at low
voltage but at high speed. In addition to an LCD controller/driver allowing 240-pixel display the microcontrollers
contain a variety of peripheral functions such as timers, a UART, a serial interface, and an external interrupt. The
configuration of the MB89800 series is therefore best suited to control of LCD display panels.
*: F2MC stands for FUJITSU Flexible Microcontroller.
■ FEATURES
• Minimum execution time: 0.4 µs/10 MHz (Vcc = +5.0 V)
• F2MC-8L family CPU core
Multiplication and division instructions
Instruction set optimized for controllers
16-bit arithmetic operations
Test and branch instructions
Bit manipulation instructions, etc.
{
(Continued)
■ PACKAGES
100 pin, Plastic LQFP
100 pin, Plastic QFP
100 pin, Ceramic MQFP
(FPT-100P-M05)
(FPT-100P-M06)
(MQP-100C-P01)
MB89800 Series
(Continued)
• LCD controller/driver
Max 70 segments/4 commons
Divided resistor for LCD power supply
• Three types of timers
8-bit PWM timer (also usable as a reload timer)
8-bit pulse width count timer (also usable as a reload timer)
20-bit time-base counter
• Two serial interfaces
8-bitsynchronousserialinterface(Switchabletransferdirectionallowscommunicationwithvariousequipment.)
UART (5-, 7-, 8-bit transfer capable)
• External interrupt: 2 channels
Capable of wake-up from low-power consumption modes (with an edge detection function)
• Low-power consumption modes
Stop mode (Oscillation stops to minimize the current consumption.)
Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
2
MB89800 Series
■ PRODUCT LINEUP
Part number
MB89803
MB89805
MB89P808
MB89PV800
Parameter
Piggyback/evaluation
One-time PROM product product for evaluation
and development
Mass production product
(mask ROM products)
Classification
48 K × 8 bits
8 K × 8 bits
(internal mask
ROM)
16 K × 8 bits
(internal mask
ROM)
(internal PROM,
48 K × 8 bits
ROM size
RAM size
programming with
(external ROM)
general-purpose EPROM
programmer)
256 × 8 bits
512 × 8 bits
2 K × 8 bits
Number of instructions
Instruction bit length
Instruction length
Data bit length
Minimum execution time
Interrupt processing time
: 136 instructions
: 8 bits
: 1 byte to 3 bytes
: 1, 8, 16 bit length
: 0.4 µs/10 MHz (VCC = 5.0 V)
: 3.6 µs/10 MHz (VCC = 5.0 V)
CPU functions
I/O ports (N-ch open-drain) : 16 (All also serve as segment pins.)*1
I/O ports (N-ch open-drain) : 6
Ports
I/O ports (CMOS)
Input ports
Total
: 6 (5 ports also serve as peripheral I/O.)
: 4 (1 port also serves as an external interrupt input.)
: 32 (Max)
8-bit reload timer operation (toggled output capable)
8-bit resolution PWM operation
PWM timer
Operating clock (pulse width count timer output, 0.4 µs, 6.4 µs, 25.6 µs/10 MHz)
8-bit reload timer operation
8-bit pulse width count operation
(continuous measurement capable, “H” width, “L” width, or single-cycle measurement capable)
Operating clock(0.4 µs, 1.6 µs, 12.8 µs/10 MHz)
Pulse width
count timer
8-bit length
Serial I/O 8 bits
UART
One clock selectable from four transfer clocks(0.8 µs, 3.2 µs, 12.8 µs/10 MHz)
LSB first/MSB first selectability
5-, 7-, 8- bit transfer capable, built-in baud-rate generator (Max 156250/10 MHz)
Common output: 4
Segment output: 70 (Max)
Operating mode: 1/2 bias • 1/2 duty, 1/3 bias • 1/3 duty, 1/3 bias • 1/4 duty
LCD display RAM size: 70×4 bits
LCD controller/
driver
Dividing resistor for LCD driving: Built-in(An external resistor selectable)
External interrupt
Standby mode
Process
2 channels (edge selectable) (1 channel also serves as a pulse width count timer input)
Sleep mode, stop mode
CMOS
Operating
voltage*2
2.2 V to 6.0 V
2.7 to 6.0 V
MBM27C512-20TV
EPROM for use
(LCC package)
*1 : The function is selected by the mask option.
*2 : Varies with conditions such as the operating frequency. (See “■ELECTRICAL CHARACTERISTICS”.)
3
MB89800 Series
■ PACKAGE AND CORRESPONDING PRODUCTS
Package
FPT-100P-M05
FPT-100P-M06
MQP-100C-P01
MB89803
MB89805
MB89P808
MB89PV800
×
×
×
×
×
: Available × : Not available
Note : For more information about each package, see “ ■PACKAGE DIMENSIONS”.
■ DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, it is necessary to confirm its differences from the product that
will actually be used.
Take particular care on the following points:
• MB89803 register bank addresses upper than 0180H can not be used.
• The stack area, etc., is set at the upper limit of the RAM.
2. Current Consumption
• In the case of the MB89PV800, add the current consumed by the EPROM which is connected to the top socket.
• When operating at low speed, the current consumption in the one-time PROM or EPROM model is greater
than on the mask ROM models. However, the current consumption in sleep/stop modes is the same. (For more
information, see “■ELECTRICAL CHARACTERISTICS”.)
3. Mask Options
Functions that can be selected as options and how to designate these options vary by the product.
Before using options check “■MASK OPTIONS”.
Note that the options are fixed especially in MB89PV800 and MB89P808.
4
MB89800 Series
■ PIN ASSIGNMENT
(TOP VIEW)
1
2
3
4
5
6
7
8
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG64/P12
SEG65/P13
SEG66/P14
SEG67/P15
SEG68/P16
SEG69/P17
P20
P21
P22
P23
P24
P25
P30/INT0
P31
P32
P33
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
59
58
57
56
P40
P41/PWM
P42/PWC/INT1
VSS
55
X1
54
X0
53
52
51
RST
MOD1
MOD0
(FPT-100P-M05)
5
MB89800 Series
(TOP VIEW )
1
2
3
4
5
6
7
8
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG62/P10
SEG63/P11
SEG64/P12
SEG65/P13
SEG66/P14
SEG67/P15
SEG68/P16
SEG69/P17
P20
P21
P22
P23
P24
9
121
113
112
111
110
109
108
107
106
105
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
122
123
124
125
126
127
128
129
P25
P30/INT0
P31
P32
P33
P40
P41/PWM
P42/PWC/INT1
VSS
X1
X0
RST
MOD1
MOD0
Each pin inside the dashed
line is for the MB89PV800 only.
P43/SI
P44/SO
P45/SCK
(MQP-100C-P01)
(FPT-100P-M06)
• Pin assignment on package top (MB89PV800 only)
Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name
101
102
103
104
105
106
107
108
N.C.
VPP
A12
A7
109
110
111
112
113
114
115
116
A2
A1
117
118
119
120
121
122
123
124
N.C.
O4
125
126
127
128
129
130
131
132
OE
N.C.
A11
A9
A0
O5
N.C.
O1
O2
O3
VSS
O6
A6
O7
A8
A5
O8
A13
A14
VCC
A4
CE
A10
A3
N.C.: Internally connected. Do not use.
6
MB89800 Series
■ PIN DESCRIPTION
Pin no.
Circuit
type
Pin name
Function
MQFP/
QFP*2
LQFP*1
54
55
51
52
57
58
54
55
X0
A
B
Clock crystal oscillator pins
X1
MOD0
MOD1
Operating mode selection pin. Connect directly to VSS.
This pin is an N-ch open-drain type with a pull-up resistor, and a
hysteresis input type. “L” is output from this pin by an internal reset
source (optional function). The internal circuit is initialized by the
input of “L”.
53
56
RST
C
D
General-purpose N-ch open-drain I/O ports. Also serve as an LCD
controller/driver segment output.
The port and segment output are switched by mask option in 8-bit
unit.
P00/SEG54to
P07/SEG61
85 to 78 88 to 81
77 to 70 80 to 73
General-purpose N-ch open-drain I/O ports. Also serve as an LCD
controller/driver segment output.
The port and segment output are switched by mask option in 4 to
1-bit unit.
P10/SEG62to
P17/SEG69
D
F
I
General-purpose N-ch open-drain I/O ports. A pull-up resistor
option is provided.
69 to 64 72 to 67 P20 to P25
General-purpose input port. The input is CMOS input.
Also serves as an external interrupt input (INT0), in this case, the
input is hysteresis input.
63
66
P30/INT0
A pull-up resistor option is provided.
General-purpose input ports. These pins are a CMOS input type.
A pull-up resistor option is provided.
62 to 60 65 to 63 P31 to P33
H
E
E
59
58
62
61
P40
General-purpose I/O port. A pull-up resistor option is provided.
General-purpose I/O port. A pull-up resistor option is provided.
Also serves as PWM timer toggle output (PWM).
P41/PWM
General-purpose I/O port. A pull-up resistor option is provided.
Also serves as pulse width count timer input (PWC) and an exter-
nal interrupt input (INT1).
P42/PWC/
INT1
57
60
E
The PWC and INT1 input is hysteresis input.
General-purpose I/O port. A pull-up resistor option is provided.
Also serves as serial I/O and a UART data input (SI).
The SI input is hysteresis input.
50
49
53
52
P43/SI
E
E
General-purpose I/O port. A pull-up resistor option is provided.
Also serves as a serial I/O and a UART data output (SO).
P44/SO
*1 : FPT-100P-M05
*2 : FPT-100P-M06/MQP-100C-P01
(Continued)
7
MB89800 Series
(Continued)
Pin no.
Circuit
type
Pin name
MQFP/
Function
LQFP*1
QFP*2
General-purpose I/O port. A pull-up resistor option is provided.
Also serves as a serial I/O and a UART clock I/O (SCK).
The SCK input is hysteresis input.
48
51
P45/SCK
E
39 to 1,
100 to 86 100 to 89 SEG53
42 to 1, SEG0 to
G
G
LCD controller/driver segment output pins
LCD controller/driver common output pins
COM0 to
43 to 40 46 to 43
COM3
46 to 44 49 to 47 V3 to V1
LCD driving power supply pins
Power supply pin
VCC
VSS
47
56
50
59
Power supply (GND) pin
*1 : FPT-100P-M05
*2 : FPT-100P-M06/MQP-100C-P01
8
MB89800 Series
• External EPROM pins (MB89PV800 only)
Pin no.
Pin name
I/O
Function
102
VPP
O
“H” level output pin
103
104
105
106
107
108
109
110
111
A12
A7
A6
A5
A4
A3
A2
A1
A0
O
Address output pins
113
114
115
O1
O2
O3
I
Data input pins
116
VSS
O
Power supply (GND ) pin
118
119
120
121
122
O4
O5
O6
O7
O8
I
Data input pins
ROM chip enable pin
Outputs “H” during standby.
123
124
125
CE
O
O
O
A10
OE
Address output pin
ROM output enable pin
Outputs “L” at all times.
127
128
129
A11
A9
A8
O
Address output pins
130
131
132
A13
A14
VCC
O
O
O
EPROM power supply pin
101
112
117
126
Internally connected pins
Be sure to leave them open.
N.C.
9
MB89800 Series
■ I/O CIRCUIT TYPE
Type
Circuit
Remarks
• Crystal oscillator circuit
• At an oscillation feedback resistor of
approximately 1 MΩ/5.0 V
X1
X0
A
Standby control signal
• CMOS input
B
C
• At an output pull-up resistor (P-ch) of
approximately 50 kΩ/5.0 V
• Hysteresis input
R
Pch
Nch
• N-ch open-drain output
• CMOS input
• Segment output optional
Pch
Nch
Pch
Nch
D
Nch
Port
• CMOS output
• CMOS input
R
• Hysteresis input (peripheral input)
• Pull-up resistor optional
Pch
Pch
E
Nch
Peripheral
Port
(Continued)
10
MB89800 Series
(Continued)
Type
Circuit
Remarks
• Nch open-drain output
• CMOS input
• Pull-up resistor optional
R
Pch
F
Nch
• LCDC output
Pch
Nch
G
Pch
Nch
• CMOS input
• Pull-up resistor optional
R
H
• CMOS input (port) ,
Hysterisis input (interrupt)
• Pull-up resistor optional
R
Port
I
External
Interrupt
11
MB89800 Series
■ HANDLING DEVICES
1. Preventing Latchup
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins
other than medium- to high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum
Ratings” in “■ELECTRICAL CHARACTERISTICS” is applied between VCC and VSS.
When latchup occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the absolute maximum ratings.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down
resistor.
3. Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
4. Power Supply Voltage Fluctuations
Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage
could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore
important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P
value) will be less than 10% of the standard VCC value at the commercial frequency (50 Hz to 60 Hz) and the
transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power
is switched.
5. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and
wake-up from stop mode.
12
MB89800 Series
■ PROGRAMMING TO THE EPROM ON THE MB89P808
The MB89P808 is an OTPROM (one-time PROM) version for the MB89800 series.
1. Features
• 48-Kbyte PROM on chip
• Options can be set using the EPROM programmer.
• Equivalency to the MBM27C1001A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below.
Normal operation
mode
EPROM mode (Corresponding
addresses on EPROM programmer)
0000H
0000H
I/O
0080H
0100H
0200H
0480H
RAM
Register
Vacancy
(Read value
indefinite)
Not available
4000H
4000H
Programming
area
ROM
(EPROM)
FFFFH
FFFFH
Vacancy
(Read value
indefinite)
1FFFFH
13
MB89800 Series
3. Programming to the EPROM
In EPROM mode, the MB89P808 functions equivalent to the MBM27C1001A. This allows the PROM to be
programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by
using the dedicated socket adapter.
• Programming procedure
(1) Set the EPROM programmer to the MBM27C1001A.
(2) Load option data into addresses 4000H to FFFFH of the EPROM programmer.
(3) Program with the EPROM programmer.
4. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly screening procedure for a product for a product
with a blanked OTPROM microcomputer program.
Program, verify
Aging
+ 150 °C, 48 h
Read
Assembly
5. Programming Yield
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature.
For this reason, a programming yield of 100% cannot be assured at all times.
6. EPROM Programmer Socket Adapter
Package
Compatible socket adapter
ROM-100SQF-32DP-8LA3
ROM-100QF-32DP-8LA2
FPT-100P-M05
FPT-100P-M06
Inquiry: Sunhayato Co., Ltd.: TEL +81-3-3984-7791
Note : With some EPROM programmers, stability of programming performance is enhanced by placing an 0.1 µF
capacitor between the VPP and VSS pins or the VCC and VSS pins.
14
MB89800 Series
■ PROGRAMMING TO THE EPROM WITH PIGGY-BACK/EVALUATION CHIPS
1. EPROM for Use
MBM27C512-20TV
2. Programming Socket Adapter
To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer: Sun Hayato
Co., Ltd.) listed below.
Package
Adapter socket part number
LCC-32 (Rectangle)
ROM-32LC-28DP-YG
Inquiry: Sunhayato Co., Ltd.: TEL +81-3-3984-7791
3. Memory Space
Memory space in each mode, such as 48 Kbyte PROM is diagrammed below.
Corresponding addresses in
ROM programmer Address
Normal operating
mode
Address
0000
H
0000
H
I/O
0080
H
Not available
RAM
0880
H
H
Not available
4000
H
4000
PROM
48 KB
EPROM
48 KB
FFFF
H
FFFF
H
4. Programming to the EPROM
(1) Set the EPROM programmer to the MBM27C512.
(2) Load program data into the EPROM programmer at 4000H to FFFFH .
(3) Program to 4000H to FFFFH with the EPROM programmer.
15
MB89800 Series
■ BLOCK DIAGRAM
X0
X1
Main Clock
Oscillator
Time-base timer
8-bit PWM timer
Clock controller
P41/PWM
External
interrupt
Reset circuit
(WDT)
RST
8-bit pulse
width timer
/counter
Noise
cancel-
lation
P42/PWC/INT1
Port 2
N-ch open-drain
I/O port
6
P20 to P25
P45/SCK
P44/SO
P43/SI
8-bit serial
UART
External
interrupt
P30/INT0
3
CMOS I/O port
P31 to P33
Input port
P40
N-ch open-drain I/O port
16
RAM
8
8
P00/SEG54
F2MC-8L
to P07/SEG61
P10/SEG62
CPU
ROM
to P17/SEG69
34
4
LCD
SEG0 to SEG53
COM0 to COM3
V1 to V3
controller/driver
Other pins
MOD0, MOD1
3
VCC, VSS
16
MB89800 Series
■ CPU CORE
1. Memory Space
The microcontrollers of the MB89800 series offer a memory space of 64 Kbytes for storing all of I/O, data, and
program areas. The I/O area is located at the lowest address. The data area is provided immediately above the
I/O area. The data area can be divided into register, stack, and direct areas according to the application. The
program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of
interrupt reset vectors and vector call instructions toward the highest address within the program area. The
memory space of the MB89800 series is structured as illustrated below.
• Memory space
MB89803
MB89805
MB89P808
MB89PV800
0000H
0080H
0100H
0000H
0080H
0100H
0000H
0080H
0100H
0000H
0080H
0100H
I O
I O
I O
I O
RAM
RAM
RAM
RAM
Register
Register
Register
Register
0200H
0200H
0200H
0280H
0180H
0880H
0880H
Unused
Unused
Unused
Unused
4000H
4000H
C000H
Program-
ming
Program-
ming
ROM
ROM
E000H
FFFFH
ROM
ROM
FFFFH
FFFFH
FFFFH
17
MB89800 Series
2. Registers
The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers
in the memory. The following dedicated registers are provided :
Program counter (PC)
Accumulator (A)
: A 16-bit register for indicating instruction storage positions
: A 16-bit temporary register for storing arithmetic operations, etc.
When the instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T) : A 16-bit register which performs arithmetic operations with the accumulator.
When the instruction is an 8-bit data processing instruction, the lower byte is used.
Index register (IX)
Extra pointer (EP)
Stack pointer (SP)
Program status (PS)
: A 16-bit register for index modification
: A 16-bit pointer for indicating a memory address
: A 16-bit register for indicating a stack area
: A 16-bit register for storing a register pointer and a condition code
16 bits
Initial value
FFFDH
Program counter
Accumulator
Undefined
Undefined
Undefined
Undefined
Undefined
Temporary accumulator
Index register
Extra pointer
Stack pointer
I-flag = 0, IL1, IL0 = 11
Program status
Other bits are undefined.
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR). (See the diagram below.)
• Structure of the Program Status Register
15 14 13 12 11 10
9
8
7
6
I
5
4
3
2
Z
1
0
Va-
Va-
Va-
PS
RP
H
IL1, IL0
N
V
C
cancy cancy cancy
RP
CCR
18
MB89800 Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
• Rule for conversion of actual addresses of the general-purpose register area
RP
Lower OP codes
b0
0
0
0
0
0
0
0
1
R4 R3 R2 R1 R0 b2 b1
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Generated addresses
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for control of CPU operations at the time of an interrupt.
H-flag : Set to 1 when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation.
Cleared otherwise. This flag is for decimal adjustment instructions.
I-flag : Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0.
Set to 0 when reset.
IL1, 0 : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is
higher than the value indicated by this bit.
IL1
IL0
Interrupt level
High-low
High
0
0
1
0
1
1
1
0
1
2
3
Low = no interrupt
N-flag : Set to 1 if the highest bit is set to 1 as the result of an arithmetic operation. Cleared to 0 when the bit is
set to 0.
Z-flag : Set to 1 when an arithmetic operation results in 0. Cleared to 0 otherwise.
V-flag : Set to 1 if the complement on 2 overflows as a result of an arithmetic operation. Cleared to 0 if the
overflow does not occur.
C-flag : Set to 1 when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to 0
otherwise. Set to the shift-out value in the case of a shift instruction.
19
MB89800 Series
The following general-purpose registers are provided:
General-purpose registers: An 8-bit register for storing data
The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains
eight registers and up to a total of 16 banks can be used on the MB89803 (RAM 256 × 8 bits). The bank currently
in use is indicated by the register bank pointer (RP).
Note : The number of register banks that can be used varies with the RAM size.
MB89803
MB89805
0100h to 017Fh 16 banks
0100h to 01FFh 32 banks
MB89P808 0100h to 01FFh 32 banks
MB89PV800 0100h to 01FFh 32 banks
• Register bank configuration
This address = 0100H + 8 × (RP)
R 0
R 1
R 2
R 3
R 4
R 5
R 6
R 7
16 banks (MB89803)
32 banks (MB89805/P808/PV800)
Memory area
20
MB89800 Series
■ I/O MAP
Register
name
Address
Read/write
Register description
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
(R/W)
PDR0
PDR1
PDR2
Port 0 data register
Vacancy
(R/W)
(R/W)
Port 1 data register
Vacancy
Port 2 data register
Vacancy
Vacancy
Vacancy
(R/W)
(R/W)
(R/W)
STBC
WDTC
TBCR
Standby control register
Watchdog timer control register
Time-base timer control register
Vacancy
(R)
PDR3
Port 3 data register
Vacancy
(R/W)
(W)
PDR4
DDR4
Port 4 data register
Port 4 data direction register
Vacancy
Vacancy
(R/W)
(W)
CNTR
COMR
PCR1
PCR2
RLBR
NCCR
PWM timer control register
PWM timer compare register
PWC pulse width control register 1
PWC pulse width control register 2
PWC reload buffer register
PWC noise cancellation control register 1
Vacancy
(R/W)
(R/W)
(R/W)
(R/W)
Vacancy
Vacancy
Vacancy
(R/W)
(R/W)
SMR
SDR
Serial mode register
Serial data register
Vacancy
Vacancy
(Continued)
21
MB89800 Series
(Continued)
Register
name
Address
Read/write
Register description
20H
21H
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
SMC1
SRC
SSD
UART serial mode control register 1
UART serial rate control register
UART serial status/data register
22H
23H
SIDR/SODR UART serial data register
SMC2 UART serial mode control register 2
24H
25H
Vacancy
26H
Vacancy
27H
Vacancy
Vacancy
28H
29H
Vacancy
2AH
Vacancy
2BH
Vacancy
2CH
Vacancy
2DH
Vacancy
2EH
Vacancy
2FH
Vacancy
30H
(R/W)
EIC1
External interrupt 1 control register 1
Vacancy
31H to 4FH
50H to 72H
79H
(R/W)
(R/W)
(R/W)
VRAM
LCR1
SEGR
Display data RAM
LCD controller/driver control register
Segment output selection register
Vacancy
7AH
7BH
7CH
(W)
(W)
(W)
ILR1
ILR2
ILR3
Interrupt level setting register 1
Interrupt level setting register 2
Interrupt level setting register 3
Vacancy
7DH
7EH
7FH
R/W = Available Read and Write
R = Read only
W = Write only
Note : Do not use vacancies.
22
MB89800 Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
(VSS = 0.0 V)
Rating
Parameter
Symbol
Unit
Remarks
Min
Max
Power supply voltage
VCC
VSS – 0.3 VSS + 7.0
VSS – 0.3 VSS + 7.0
V
V
LCD power supply voltage V3
V3 to V1 Pin
With pull-up resistor of P20 to P25 in se-
lecting.
Must not exceed VSS + 7.0 V.
VI1
VSS – 0.3 VCC + 0.3
VSS – 0.3 VSS + 7.0
V
V
V
V
V
V
V
V
Without pull-up resistor of P20 to P25 in se-
lecting.
VI2
Input voltage
Adapt to P00 to P07 and P10 to P17 in
MB89P808 and MB89PV800.
Must not exceed VSS + 7.0 V.
VI3
VI4
VO1
VSS – 0.3
V3+ 0.3
Other pins.
Must not exceed VSS + 7.0 V.
VSS – 0.3 VCC + 0.3
VSS – 0.3 VCC + 0.3
VSS – 0.3 VSS + 7.0
With pull-up resistor of P20 to P25 in se-
lecting.
Must not exceed VSS + 7.0 V.
Without pull-up resistor of P20 to P25 in se-
lecting.
VO2
Output voltage
Adapt to P00 to P07 and P10 to P17 in
MB89P808 and MB89PV800.
Must not exceed VSS + 7.0 V.
VO3
VO4
VSS – 0.3
V3 + 0.3
Other pins.
Must not exceed VSS + 7.0 V.
VSS – 0.3 VCC + 0.3
+ 10
“L” level output current
IOL
mA Except power supply pins
Average value (operating current×operat-
mA ing duty) , adapt to all pins except for power
supply.
“L” level average output
current
IOLAV
+ 4
Total “L” level output
current
ΣIOL
+ 40
– 5
mA
“H” level output current
IOH
mA Except power supply pins
Average value (operating current×operat-
mA ing duty) , adapt to all pins except for power
supply.
“H” level average output
current
IOHAV
– 2
Total “H”level output
current
ΣIOH
– 10
mA
Power consumption
Operating temperature
Storage temperature
Pd
+ 300
mW
°C
TA
– 40
– 55
+ 85
Tstg
+ 150
°C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
23
MB89800 Series
2. Recommended Operating Conditions
(VSS = 0.0 V)
Value
Parameter
Symbol
Unit
Remarks
Min
2.2*
1.5
Max
6.0*
6.0
V
V
Normal operation assurance range
Retains the RAM state in stop mode
Power supply voltage
VCC
V3 pin
LCD power supply voltage
Operating temperature
V3
VSS
6.0
V
The optimum value is dependent on
the element in use.
TA
– 40
+ 85
°C
* : The minimum operating power supply voltage varies with the operating frequency.
Operation Voltage − Operating frequency
6
Operation
assurance range
5
4
3
*
2
1
0
0
1
2
3
4
5
6
7
8
9
10
Operating frequency (MHz)
* : The shaded area is assured only for the MB89803/805.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
24
MB89800 Series
3. DC Characteristics
(VCC = V3 = +5.0 V, VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Sym
Parameter
bol
Pin name
Condition
Unit
Remarks
Min
Typ
Max
P00 to P07,
P10 to P17,
VIH P20 to P25,
P30 to P33,
VCC +
0.3
*1
0.7 VCC
V
CMOS input
“H” level input
voltage
P40 to P45
RST, MOD0 to
MOD1, INT0,
SCK, SI, PWC/
INT1
CMOS
hysterisis input
VIHS
0.8 VCC
VCC – 0.3
VSS – 0.3
VCC + 0.3
V
V
V
P00 to P07,
P10 to P17,
VIL P20 to P25,
P30 to P33,
*1
0.3 VCC
CMOS input
“L” level input
voltage
P40 to P45
RST, MOD0 to
MOD1, INT0,
SCK, SI, PWC/
CMOS
hysterisis input
VILS
0.2 VCC
INT1
Without pull-up
resistor
VD1 P20 to P25
VSS – 0.3
VSS – 0.3
VSS + 6.0
VSS + 6.0
V
V
Open-drain
output pin
application
voltage
Adapt to
MB89803/805
P00 to P07,
VD2
Adapt to
MB89PV800/
P808
P10 to P17
VSS – 0.3
V3*1
V
V
“H”level output
voltage
VOH P40 to P45
P00 to P07,
IOH = – 2 mA
2.4
P10 to P17,
P20 to P25,
P40 to P45
VOL1
IOL = 1.8 mA
IOL = 4.0 mA
0.4
0.4
V
V
“L”level output
voltage
VOL2 RST
(Continued)
25
MB89800 Series
(VCC = V3 = +5.0 V, VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Sym-
bol
Parameter
Pin name
Condition
Unit
Remarks
Min
Typ
Max
MOD0, MOD1, 0.45 V < VI < VCC
µA
P30 to P33,
P40 to P45
Without pull-up
resistor
± 5
ILI1
Adapt to
MB89PV800/
P808
Input leakage
current
(Hi-z output
leakage
P00 to P07,
P10 to P17
µA
0.45 V < VI < VCC
± 5
0.45 V < VI < 6 V
Without pull-up
resistor
current)
µA
µA
P20 to P25
± 1
± 1
ILI2
P00 to P07,
P10 to P17
Adapt to
MB89803/805
0.45 < VI < 6 V
P20 to P25,
P30 to P33,
P40 to P45,
RST
VI = 0 V
With pull-up
resistor
Pull-up
Resistance
RPULL
25
50
100
2.5
kΩ
Common
output
impedance
RVCOM COM0 to COM3 V1 to V3 = + 5.0 V
RVSEG SEG0 to SEG49 V1 to V3 = + 5.0 V
kΩ
Segment
output
impedance
15
kΩ
kΩ
LCD divided
resistance
RLCD
V3 to VSS
30
60
120
V1 to V3,
COM0 to
COM3,
LCD leakage
current
ILCDL
± 1
µA
SEG0 to SEG69
Adapt to
4.5
9
6
mA MB89803/805/
PV800
RUN mode
Fc = 5 MHz
tinst = 0.8 µs
Adapt to
mA
15
12
20
MB89P808
Power supply
current*2
ICC1
VCC
Adapt to
mA MB89803/805/
PV800
9
RUN mode
Fc = 10 MHz
tinst = 0.4 µs
Adapt to
mA
13
MB89P808
(Continued)
26
MB89800 Series
(Continued)
(VCC = V3 = +5.0 V, VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Sym-
bol
Parameter
Pin name
Condition
Unit
Remarks
Min
Typ
Max
Adapt to
0.6
0.9
mA MB89803/805/
PV800
RUN mode
Fc = 5 MHz
tinst = 12.8 µs
Adapt to
mA
3.5
1.2
4
7
1.8
8
MB89P808
ICC2
VCC
Adapt to
mA MB89803/805/
PV800
RUN mode
Fc = 10 MHz
tinst = 6.4 µs
Adapt to
mA
MB89P808
Sleep mode
Fc = 5 MHz
tinst = 0.8 µs
1.5
2
mA
mA
mA
mA
ICCS1
VCC
Power supply
current*2
Sleep mode
Fc = 10 MHz
tinst = 0.4 µs
3
4
Sleep mode
Fc = 5 MHz
tinst = 12.8 µs
0.4
0.8
ICCS2
VCC
Sleep mode
Fc = 10 MHz
tinst = 6.4 µs
0.8
0.1
0.1
10
1.6
1
Adapt to
µA
MB89803/805
Stop mpde
TA = +25 °C
ICCH
VCC
Adapt to
µA MB89P808/
PV800
10
Input capaci-
tance
Except VCC and
CIN
pF
VSS
*1 : The input voltage to P00 to P07 and P10 to P17 for the MB89P800/PV808 must not exceed the LCD power
supply voltage (V3 pin voltage).
*2 : The measurement condition of power supply current is as follows: the external clock, open output pins and the
external LCD dividing resistor. In the case of the MB89PV800, the current consumed by the connected EPROM
and ICE is not included.
27
MB89800 Series
4. AC Characteristics
(1) Reset Timing
(VCC = +5.0 V±10%, VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Condi-
tion
Parameter
Symbol
Unit
Remarks
Min
Max
RST “L” pulse width
tZLZH
48 tXCYL
ns
t ZLZH
RST
0.2 V CC
0.2 V CC
(2) Power-on Reset
(VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Condi-
tion
Parameter
Symbol
Unit
Remarks
Min
Max
Power supply rising time tR
Power supply cut-off time tOFF
50
ms Power-on reset function only
ms Due to repeated operation
1
Note : Make sure that power supply rises within the selected oscillation stabilization time.
If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended.
2.0 V
VCC
0.2 V
0.2 V
0.2 V
t R
tOFF
28
MB89800 Series
(3) Clock Timing
(VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Typ
Sym
bol
Pin
Con-
Parameter
Unit
Remarks
name dition
Min
Max
Clock frequency
FC
1
10
MHz
ns
X0, X1
Crystal or ceramic
resonator
Clock cycle time
tXCYL
100
30
1000
70
Input clock duty ratio*
Input clock rising/falling time
duty
%
External clock
X0
tCR
tCF
10
ns External clock
* : duty = PWH /tHCYL
• X0 and X1 timing and conditions
tXCYL
tCR
tCF
0.8 VCC
0.8 VCC
X 0
0.2 VCC
0.2 VCC
0.2 VCC
• Clock conditions
When an external
clock in use
When a crystal or ceramic
resonator is used
X 0
X 1
X 0
X 1
Open
FC
FC
C0
C1
29
MB89800 Series
(4) Instruction Cycle
(VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Sym-
bol
Parameter
Unit
Remarks
Min
Max
Minimum execution time
(Instruction cycle)
tinst
4/FC
64/FC
µs
64/FC, 16/FC, 8/FC, 4/FC
(5) Serial I/O Timing
(VCC = +5.0 V±10%, VSS = 0.0 V, TA = −40 °C to +85 °C)
Vlue
Sym-
bol
Parameter
Pin name
Condition
Unit Remarks
Min
2 tinst*
– 200
0.5 tinst*
0.5 tinst*
tinst*
Max
Serial clock cycle time
SCK↓→SO time
tSCYC
tSLOV
tIVSH
tSHIX
tSHSL
tSLSH
tSLOV
tIVSH
tSHIX
SCK
µs
ns
µs
µs
µs
µs
ns
µs
µs
Internal
shift clock
mode
SCK, SO
SI, SCK
SCK, SI
+200
Valid SI → SCK↑
SCK↑→valid SI hold time
Serial clock “H” pulse width
Serial clock “L” pulse width
SCK↓→SO time
SCK
tinst*
External
shift clock
mode
SCK, SO
SI, SCK
SCK, SI
0
200
Valid SI → SCK↑
0.5 tinst*
0.5 tinst*
SCK↑→valid SI hold time
* : For information on tinst, see “(4) Instruction Cycle”.
(6) UART Timing
(VCC = +5.0 V±10%, VSS = 0.0 V, TA = −40 °C to +85 °C)
Vlue
Sym-
bol
Parameter
Serial clock cycle time
Pin name Condition
Unit Remarks
Min
2 tinst*
– 200
0.5 tinst*
0.5 tinst*
tinst*
Max
tSCYC
tSLOV
tIVSH
tSHIX
tSHSL
tSLSH
tSLOV
tIVSH
tSHIX
SCK
µs
ns
µs
µs
µs
µs
ns
µs
µs
Internal
shift clock
mode
SCK↓→SO time
SCK, SO
SI, SCK
SCK, SI
+200
Valid SI → SCK↑
SCK↑→valid SI hold time
Serial clock “H” pulse width
Serial clock “L” pulse width
SCK↓→SO time
SCK
tinst*
External
shift clock
mode
SCK, SO
SI, SCK
SCK, SI
0
200
Valid SI → SCK↑
0.5 tinst*
0.5 tinst*
SCK↑→valid SI hold time
* : For information on tinst, see “(4) Instruction Cycle”.
30
MB89800 Series
• Internal shift clock mode
tSCYC
2.4 V
SCK
SO
0.8 V
0.8 V
tSLOV
2.4 V
0.8 V
tIVSH
tSHIX
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
SI
• External shift clock mode
tSHSL
tSLSH
0.8 VCC
0.8 VCC
SCK
SO
0.2 VCC
0.2 VCC
tSLOV
2.4 V
0.8 V
tIVSH
tSHIX
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
SI
31
MB89800 Series
(7) Peripheral Input Timing
(VCC = +5.0 V±10%, VSS = 0.0 V, TA = −40 °C to +85 °C)
Vlue
Sym-
bol
Condi-
tion
Parameter
Pin name
Unit
Remarks
Min
Max
Peripheral input “H” level pulse width tILIH
Peripheral input “L” level pulse width tIHIL
2 tinst *
2 tinst *
µs
µs
PWC/INT1
INT0
* : For information on tinst, see “(4) Instruction Cycle”.
tILIH
tIHIL
0.8 VCC
0.8 VCC
PWC/INT1
INT0
0.2 VCC
0.2 VCC
32
MB89800 Series
■ EXAMPLE CHARACTERISTICS
(1) ”L” Level Output Voltage
(2) “H” Level Output Voltage
VOL − IOL
VCC - VOH − IOH
VCC = 2.5 V
VCC = 2.5 V
VCC = 2.0 V
VCC - VOH (V)
1.0
VOL1 (V)
VCC = 2.0 V
VCC = 3.0 V
VCC = 3.0 V
0.6
0.5
0.4
0.3
0.2
0.1
0
VCC = 4.0 V
TA = +25 °C
TA = +25 °C
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
VCC = 4.0 V
VCC = 5.0 V
VCC = 6.0 V
VCC = 5.0 V
VCC = 6.0 V
0
-1
-2
-3
-4
-5
IOH (mA)
0
1
2
3
4
5
6
7
8
9
10
IOL (mA)
((3) “H” Level Input Voltage/ “L” Level Input Votage
(CMOS Input)
(4) “H” Level Input Voltage / ”L” Level Input Voltage
(CMOS Hysterisis Input)
VIN − VCC
VIN − VCC
VIN (V)
5.0
VIN (V)
5.0
TA = +25 °C
TA = +25 °C
4.5
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
4.0
VIHS
3.5
3.0
2.5
2.0
VILS
1.5
1.0
0.5
0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
VCC (V)
VCC (V)
VIHS: Threshold when input voltage in hysteresis
characteristics is set to “H” level.
VILS: Threshold when input voltage in hysteresis
characteristics is set to “L” level.
33
MB89800 Series
(5) Power Supply Current (External Clock)
MB89805 ICC1 Example Caracteristics
MB89805 ICCS1 Example Caracteristics
TA = +25 °C
TA = +25 °C
3
9
FC = 1 MHz
8
FC = 1 MHz
FC = 4 MHz
2.5
FC = 4 MHz
FC = 8 MHz
FC = 10 MHz
7
6
5
4
3
2
1
0
FC = 8 MHz
FC = 10 MHz
2
1.5
1
0.5
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Supply Voltage [V]
Supply Voltage [V]
MB89805 ICCS2 Example Caracteristics
MB89805 ICC2 Example Caracteristics
TA = +25 °C
TA = +25 °C
1
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.9
FC = 1 MHz
FC = 4 MHz
FC = 8 MHz
FC = 10 MHz
FC = 1 MHz
FC = 4 MHz
FC = 8 MHz
FC = 10 MHz
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Supply Voltage [V]
Supply Voltage [V]
(6) Pull-up Resistor Value
RPULL − VCC
RPULL (kΩ)
1,000
TA = +25 °C
500
100
50
10
1
2
3
4
5
6
7
VCC (V)
34
MB89800 Series
■ MASK OPTIONS
Part number
Method of specification
Pull-up resistors
MB89803/805
Mask Option
MB89P808, MB89PV800
Fixed
No
Selectable by pin
No
1
P20 to P25, P30 to P33, P40 to P45
Power-on reset
With power-on reset
Without power-on reset
Selectable
With power-on reset
2
3
4
Oscillation stabilization time*1
Approx. 2 17/FC (Approx. 13.1 ms)
Approx. 2 13/FC (Approx. 0.81 ms)
Selectable
Selectable
217/FC
Reset pin output
With reset output
Without reset output
With reset output
Segment output switching
70 segments : No port selection
69 segments : Selection of P17
68 segments : Selection of P17 to P16
66 segments : Selection of P17 to P14
62 segments : Selection of P17 to P10
54 segments : Selection of P17 to P10,
P07 to P00
Selectable*2
Selectable*3
5
*1 : The oscillation settling time is generated by dividing the oscillation clock frequency. Since the oscillation period
is not stable immediately after oscillation has been started, therefore, the oscillation settling time in the above
list should be regarded as a reference.
*2 : Port selection must be same setting of the segment output selection register of LCD controller.
*3 : Note that, when ports are set, the input voltage value for the port pins are different from those for mask ROM
products.
Ports are set by the register setting of the segment output selection register of LCD controller.
■ ORDERING INFORMATION
Part Number
MB89803PF
MB89805PF
MB89P808PF
Package
Remarks
100-pin Plastic QFP
(FPT-100P-M06)
MB89803PFV
MB89805PFV
MB89P808PFV
100-pin Plastic LQFP
(FPT-100P-M05)
100-pin Ceramic MQFP
MB89PV800CF
(MQP-100C-P01)
35
MB89800 Series
■ PACKAGE DIMENSIONS
100-pin Plastic LQFP
(FPT-100P-M05)
Note : Pins width and pins thickness include plating thickness.
16.00±0.20(.630±.008)SQ
14.00±0.10(.551±.004)SQ
75
51
76
50
0.08(.003)
Details of "A" part
1.50 +–00..1200 .059 –+..000048
(Mounting height)
INDEX
0.10±0.10
(.004±.004)
(Stand off)
100
26
0°~8°
"A"
0.50±0.20
(.020±.008)
0.25(.010)
1
25
0.60±0.15
(.024±.006)
0.50(.020)
0.20±0.05
(.008±.002)
0.145±0.055
(.0057±.0022)
M
0.08(.003)
C
2000 FUJITSU LIMITED F100007S-3c-5
Dimensions in mm (inches)
(Continued)
36
MB89800 Series
100-pin Plastic QFP
(FPT-100P-M06)
Note : Pins width and pins thickness include plating thickness.
23.90±0.40(.941±.016)
20.00±0.20(.787±.008)
3.35(.132)MAX
(Mounting height)
0.05(.002)MIN
(STAND OFF)
80
51
81
50
12.35(.486)
REF
14.00±0.20 17.90±0.40
(.551±.008) (.705±.016)
16.30±0.40
(.642±.016)
INDEX
31
100
"A"
1
30
M
LEAD No.
0.65(.0256)TYP
0.30±0.10
(.012±.004)
0.15±0.05(.006±.002)
Details of "B" part
0.13(.005)
Details of "A" part
0.25(.010)
0.30(.012)
"B"
0.10(.004)
0
10°
0.18(.007)MAX
0.53(.021)MAX
18.85(.742)REF
0.80±0.20
(.031±.008)
22.30±0.40(.878±.016)
C
2000 FUJITSU LIMITED F100008-3C-3
Dimensions in mm (inches)
(Continued)
37
MB89800 Series
(Continued)
100-pin Ceramic MQFP
(MQP-100C-P01)
18.70(.736)TYP
16.30±0.33
(.642±.013)
15.58±0.20
(.613±.008)
12.35(.486)TYP
INDEX AREA
0.65±0.15
(.0256±.0060)
1.20 –+00..2400
.047 –+..000186
0.65±0.15
(.0256±.0060)
1.27±0.13
(.050±.005)
18.12±0.20
(.713±.008)
22.30±0.33
(.878±.013)
12.02(.473)
TYP
18.85(.742)
TYP
10.16(.400)
14.22(.560)
TYP
0.30(.012)
TYP
24.70(.972)
TYP
TYP
0.30±0.08
(.012±.003)
1.27±0.13
(.050±.005)
0.30(.012)TYP
7.62(.300)TYP
9.48(.373)TYP
11.68(.460)TYP
0.30±0.08
(.012±.003)
1.20 –+00..2400
.047 –+..000186
10.82(.426)
MAX
0.15±0.05
(.006±.002)
C
1994 FUJITSU LIMITED M100001SC-1-2
Dimensions in mm (inches)
38
MB89800 Series
FUJITSU LIMITED
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The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
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of those products from Japan.
F0112
FUJITSU LIMITED Printed in Japan
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