S7011-1007 [HAMAMATSU]
CCD area image sensor; CCD面积图像传感器
| 型号： | S7011-1007 |
| 厂家： | 
HAMAMATSU CORPORATION |
| 描述： | CCD area image sensor |
| 文件： | 总10页 (文件大小：332K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
I M A G E S E N S O R
CCD area image sensor
S7010/S7011/S7015 series
Front-illuminated FFT-CCD
S7010/S7011/S7015 series are families of FFT-CCD image sensors specifically designed for low-light-level detection in scientific applications. By
using the binning operation, S7010/S7011/S7015 series can be used as a linear image sensor having a long aperture in the direction of the
device length. This makes S7010/S7011/S7015 series ideally suited for use in spectrophotometry. The binning operation offers significant
improvement in S/N and signal processing speed compared with conventional methods by which signals are digitally added by an external circuit.
S7010/S7011/S7015 series also feature low noise and low dark signal (MPP mode operation). This enables low-light-level detection and long
integration time, thus achieving a wide dynamic range.
S7010/S7011/S7015 series have an effective pixel size of 24 × 24 µm and are available in image areas ranging from 12.288 (H) × 1.44 (V) mm2
(512 × 60 pixels) up to a large image area of 24.576 (H) × 6.048 (V) mm2 (1024 × 252 pixels).
Features
Applications
512 (H) × 60 (V) to 1024 (H) × 252 (V) pixel format
Pixel size: 24 × 24 µm
Line/pixel binning
100 % fill factor
Wide dynamic range
Low dark signal
Fluorescence spectrometer, ICP
Raman spectrometer
Industrial inspection requiring
Semiconductor inspection
DNA sequencer
Low-light-level detection
Low readout noise
MPP operation
Selection guide
ꢀ
Suitable
multichannel
detector Head
Active area
[mm (H) × mm (V)]
Number of total
pixels
Number of active
pixels
Type No.
Cooling
S7010-0906
S7010-0907
S7010-0908
S7010-1006
S7010-1007
S7010-1008
S7011-0906
S7011-0907
S7011-1006
S7011-1007
S7015-0908
S7015-1008
532 × 64
532 × 128
532 × 256
1044 × 64
1044 × 128
1044 × 256
532 × 64
532 × 128
1044 × 64
1044 × 128
532 × 256
1044 × 256
512 × 60
512 × 124
512 × 252
1024 × 60
1024 × 124
1024 × 252
512 × 60
512 × 124
1024 × 60
1024 × 124
512 × 252
1024 × 252
12.288 × 1.440
12.288 × 2.976
12.288 × 6.048
24.576 × 1.440
24.576 × 2.976
24.576 × 6.048
12.288 × 1.440
12.288 × 2.976
24.576 × 1.440
24.576 × 2.976
12.288 × 6.048
24.576 × 6.048
Non-cooled
C7020
C7021
C7025
One-stage
TE-cooled
ꢀ General ratings
Parameter
Specification
Pixel size
24 (H) × 24 (V) µm
2 phase
2 phase
Vertical clock phase
Horizontal clock phase
Output circuit
One-stage MOSFET source follower
24 pin ceramic DIP (refer to dimensional outlines)
S7010 series: quartz glass
S7011 series: sapphire glass
S7015 series: quartz glass *2
Package
Window *1
*1: Window-less is available upon request.
*2: Sapphire glass is available upon request.
1
CCD area image sensor S7010/S7011/S7015 series
ꢀ A bsolute m axim um ratings (T a=25 °C )
P aram eter
O perating tem perature
S ym bol
Topr
M in.
-50
-50
-0.5
-0.5
-0.5
-0.5
-10
-10
-10
-10
-10
-10
-10
-10
Typ.
M ax.
+30
+70
+25
+18
+18
+18
+15
+15
+15
+15
+15
+15
+15
+15
U nit
°C
°C
V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
S torage tem perature
O D voltage
Tstg
V O D
R D voltage
V R D
V
IS V voltage
V IS V
V
IS H voltage
V IS H
V
IG V voltage
V IG 1V , V IG 2V
V IG 1H , V IG 2H
V S G
V
IG H voltage
V
S G voltage
V
O G voltage
V O G
V
R G voltage
V R G
V
TG voltage
V T G
V
V ertical clock voltage
H orizontal clock voltage
V P 1V , V P 2V
V P 1H , V P 2H
V
V
O perating conditions (M P P m ode, T a=25 °C )
P aram eter
ꢀ
S ym bol
V O D
M in.
18
11.5
1
Typ.
20
12
3
M ax.
U nit
V
O utput transistor drain voltage
R eset drain voltage
22
V R D
12.5
V
O utput gate voltage
V O G
5
-
V
S ubstrate voltage
V S S
-
0
V
Test point (vertical input source)
Test point (horizontal input source)
Test point (vertical input gate)
Test point (horizontal input gate)
V IS V
-
V R D
V R D
0
-
V
V IS H
-
-
V
V IG 1V , V IG 2V
V IG 1H , V IG 2H
V P 1V H , V P 2V H
V P 1V L, V P 2V L
V P 1H H , V P 2H H
V P 1H L, V P 2H L
V S G H
-8
-8
4
-
V
0
-
V
V ertical shift register
clock voltage
H igh
Low
H igh
Low
H igh
Low
H igh
Low
H igh
Low
6
8
V
V
V
V
V
-9
4
-8
6
-7
8
H orizontal shift register
clock voltage
-9
4
-8
6
-7
8
S um m ing gate voltage
R eset gate voltage
V S G L
-9
4
-8
6
-7
8
V R G H
V R G L
-9
4
-8
6
-7
8
V T G H
Transfer gate voltage
V T G L
-9
-8
-7
ꢀ E lectrical characteristics (Ta=25 °C )
P aram eter
S ym bol
fc
C P 1V , C P 2V
C P 1H , C P 2H
C S G
M in.
Typ.
-
3,000
120
7
M ax.
U nit
M H z
pF
S ignal output frequency
-
-
-
-
-
-
1
-
Vertical shift register capacitance *3
H orizontal shift register capacitance *3
S um m ing gate capacitance
R eset gate capacitance
-
pF
-
pF
C R G
7
-
pF
Transfer gate capacitance
C harge transfer efficiency *4
D C output level *5
C T G
120
-
pF
C TE
V out
Z o
0.99995
0.99999
-
18
-
-
V
12
15
3
O utput im pedance *5
-
-
kW
m W
6
P ow er consum ption *5
*3: S 7010/S 7011-1007
*
P
15
-
*4: C harge transfer efficiency per pixel, m easured at half of the full w ell.
*5: The values depend on the loa d resistance. (typical, V O D =20 V, load resistance=22 kW )
*6: P ow er consum ption of the on -chip am plifier.
ꢀ E lectrical and optical characteristics (Ta=25 °C , unless otherw ise noted)
P aram eter
S ym bol
V sat
M in.
Typ.
F w × S v
300,000
600,000
2.2
M ax.
-
-
U nit
V
S aturation output voltage
-
150,000
V ertical
Horizontal *7
F ull w ell capacity
F w
S v
D S
N r
e-
300,000
-
-
C C D node sensitivity
D ark current *8 M PP m ode
1.8
-
-
µV /e-
25 °C
0 °C
400
3000
150
e-/pixel/s
20
(tentative data)
R eadout noise *9
-
8
12
e- rm s
Line binnng
A rea scanning
P hoto response non-uniform ity *1 1
25,000
12,000
-
75,000
37,500
±3
-
-
-
-
D ynam ic range *1 0
D R
P R N U
±10
%
S pectral response range
-
400 to 1,100
-
nm
l
*7: Large horizontal full w ell for vertical binning operation.
*8: D ark current nearly doubles for every 5 to 7 °C increase in tem perature.
*9: -40 °C , operating frequency is 150 kH z.
*10: D ynam ic range: D R = F ull w ell/R eadout noise.
*11: M easured at half of full w ell capa city.
P hoto response non-uniform ity:
Fixed pattern noise (peak to peak)
P R N U (% ) =
× 100
Signal
2
CCD area image sensor S7010/S7011/S7015 series
ꢀ Spectral response (without window)
ꢀ Spectral transmittance characteristics
(Typ. Ta=25 ˚C)
(Typ. Ta=25 ˚C)
50
40
30
20
10
0
100
90
80
QUARTZ WINDOW
70
SAPPHIRE WINDOW
60
50
40
30
20
10
0
400 500 600 700 800 900 1000 1100 1200
100 200 300 400 500 600 700 800 900 1000
WAVELENGTH (nm)
WAVELENGTH (nm)
KMPDB0051EA
KMPDB0101EA
ꢀ Device structure, line output format
IG2V ISV
IG1V
24
SS
20
P1V
15
TG
16
P2V
14
22
23
V
1
V=60, 124, 252
H=512, 1024
......
......
H
RG
RD
OS
1
2
3
13
ISH
12 IG1H
6
4
5
9
10
11
IG2H
512 or
1024
SG
OD OG
2 ISOLATION
2 ISOLATION
P2H P1H
4 OPTICAL
BLACK
SIGNAL OUT
4 OPTICAL
BLACK
4 BLANK
4 BLANK
KMPDC0015EB
Pixel format
Left ¬ Horizontal Direction ® Right
Blank
4
Optical Black
4
Isolation
Effective
Isolation
Optical Black
4
Blank
4
2
512 or 1024
2
Top ¬ Vertical Direction ® Bottom
Isolation
2
Effective
Isolation
2
60, 124 or 252
3
CCD area image sensor S7010/S7011/S7015 series
ꢀ Timing chart
Line binning
INTEGRATION PERIOD
(Shutter must be open)
VERTICAL BINNING PERIOD
(Shutter must be closed)
READOUT PERIOD (Shutter must be closed)
64← 60 + 4 (ISOLATION): S701 -0906/-1006
3.. 62 63
*
3..126 127
3..254 255
128← 124 + 4 (ISOLATION): S701 -0907/-1007
256← 252 + 4 (ISOLATION): S701 -0908/-1008
Tpwv
*
*
1
2
P1V
Tovr
P2V, TG
P1H
4..530 531
Tpwh, Tpws
532 : S701 -0906/-0907/-0908
*
4..1042 1043
1044: S701 -1006/-1007/-1008
*
1
2
3
P2H, SG
Tpwr
D1
RG
OS
D2
S1..S512
D19
D20: S701 -0906/-0907/-0908
*
D3..D10, S1..S1024, D11..D18
: S701 -1006/-1007/-1008
*
KMPDC0122EA
Parameter
Pulse width
Symbol
Tpwv
Remark
Min.
6 *13
Typ.
Max.
Unit
µ
-
-
-
-
-
-
-
-
-
-
-
-
-
s
12
*
P1V, P2V, TG
P1H, P2H
Rise and fall time
Pulse width
Tprv, Tpfv
Tpwh
200
500
10
-
ns
ns
ns
%
-
12
*
Rise and fall time
Duty ratio
Tprh, Tpfh
-
-
50
-
Pulse width
Tpws
500
10
-
ns
ns
%
SG
Rise and fall time
Duty ratio
Tprs, Tpfs
-
-
-
50
-
Pulse width
Tpwr
100
5
ns
ns
µs
RG
-
-
Rise and fall time
Overlap time
Tprr, Tpfr
Tovr
-
TG P1H
3
-
*12: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.
*13: In case of S701 -0908/-1007.
*
Area scanning 1: low dark current mode
INTEGRATION PERIOD
(Shutter must be open)
READOUT PERIOD (Shutter must be closed)
64← 60 + 4 (ISOLATION): S701 -0906/-1006
4.. 63
4..127
4..255
*
128←124 + 4 (ISOLATION): S701 -0907/-1007
*
Tpwv
256←252 + 4 (ISOLATION): S701 -0908/-1008
*
1
2
3
P1V
P2V, TG
P1H
P2H, SG
RG
OS
Tovr
P2V, TG
ENLARGED VIEW
Tpwh, Tpws
P1H
P2H, SG
RG
Tpwr
D1
OS
S1..S512
D5..D10, S1..S1024, D11..D17
D2
D3
D4
D18
D19
D20: S701 -0906/-0907/-0908
*
: S701 -1006/-1007/-1008
*
KMPDC0123EA
4
CCD area image sensor S7010/S7011/S7015 series
Parameter
Pulse width
Symbol
Tpwv
Remark
Min.
6 *15
Typ.
Max.
Unit
µ
-
-
-
-
-
-
-
-
-
-
-
-
-
s
14
*
P1V, P2V, TG
P1H, P2H
Rise and fall time
Pulse width
Tprv, Tpfv
Tpwh
200
500
10
-
ns
ns
ns
%
-
14
*
Rise and fall time
Duty ratio
Tprh, Tpfh
-
-
50
-
Pulse width
Tpws
500
10
-
ns
ns
%
SG
Rise and fall time
Duty ratio
Tprs, Tpfs
-
-
-
50
-
Pulse width
Tpwr
100
5
ns
ns
µs
RG
-
-
Rise and fall time
Overlap time
Tprr, Tpfr
Tovr
-
TG P1H
3
-
*14: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.
*15: In case of S701 -0908/-1007.
*
Area scanning 2: large full well mode
INTEGRATION PERIOD
(Shutter must be open)
READOUT PERIOD (Shutter must be closed)
4.. 63 64← 60 + 4 (ISOLATION): S701 -0906/-1006
*
4..127 128←124 + 4 (ISOLATION): S701 -0907/-1007
*
Tpwv
4..255 256←252 + 4 (ISOLATION): S701 -0908/-1008
*
1
2
3
P1V
P2V, TG
P1H
P2H, SG
RG
OS
Tovr
P2V, TG
ENLARGED VIEW
Tpwh, Tpws
P1H
P2H, SG
RG
Tpwr
D1
OS
D2
D3
D4
S1..S512
D18
D19
D20: S701 -0906/-0907/-0908
*
D5..D10, S1..S1024, D11..D17
: S701 -1006/-1007/-1008
*
KMPDC0124EA
Parameter
Symbol
Tpwv
Remark
Min.
6 *17
Typ.
Max.
Unit
Pulse width
-
-
-
-
-
-
-
-
-
-
-
-
-
µ
s
16
*
P1V, P2V, TG
P1H, P2H
Rise and fall time
Pulse width
Tprv, Tpfv
Tpwh
200
500
10
-
ns
ns
ns
%
-
16
*
Rise and fall time
Duty ratio
Tprh, Tpfh
-
-
50
-
Pulse width
Tpws
500
10
-
ns
ns
%
SG
Rise and fall time
Duty ratio
Tprs, Tpfs
-
-
-
50
-
Pulse width
Tpwr
100
5
ns
ns
µs
RG
-
-
Rise and fall time
Overlap time
Tprr, Tpfr
Tovr
-
TG - P1H
3
-
*16: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.
*17: In case of S701 -0908/-1007.
*
5
CCD area image sensor S7010/S7011/S7015 series
ꢀ Dimensional outlines (unit: mm)
S7010-0906/-0907
S7010-1006/-1007
PHOTOSENSITIVE
SURFACE
PHOTOSENSITIVE
SURFACE
a
a
1.3 0.3
1.3 0.3
31.75 0.3
40.64 0.41
1st PIN INDICATION PAD
1st PIN INDICATION PAD
0.46
0.46
2.54
2.54
27.94
27.94
KMPDA0053EA
KMPDA0054EA
S7010-0908
S7010-1008
PHOTOSENSITIVE
SURFACE
PHOTOSENSITIVE
SURFACE
a
1.3 0.3
a
1.3 0.3
40.64 0.0.41
32.0 0.3
1st PIN INDICATION PAD
1st PIN INDICATION PAD
0.51
2.54
0.51
27.94
2.54
27.94
KMPDA0055EA
KMPDA0056EA
Active area
b
Type No.
a
S7010-0906 12.288 (H)
S7010-0907 12.288 (H)
S7010-0908 12.288 (H)
S7010-1006 24.576 (H)
S7010-1007 24.576 (H)
S7010-1008 24.576 (H)
1.440 (V)
2.976 (V)
6.048 (V)
1.440 (V)
2.976 (V)
6.048 (V)
6
CCD area image sensor S7010/S7011/S7015 series
S7011-0906/-0907
S7011-1006/-1007
a
3.4 0.4
a
3.4 0.4
5.0
5.0
32.0 0.3
50.0
40.64 0.41
58.84
1st PIN INDICATION PAD
1st PIN INDICATION PAD
PHOTOSENSITIVE SURFACE
PHOTOSENSITIVE SURFACE
TE-COOLER
TE-COOLER
0.46
0.46
2.54
2.54
27.94
27.94
KMPDA0057EB
KMPDA0058EB
Active area
b
Type No.
a
c
S7011-0906 12.288 (H)
S7011-0907 12.288 (H)
S7011-1006 24.576 (H)
S7011-1007 24.576 (H)
1.440 (V)
2.976 (V)
1.440 (V)
2.976 (V)
7.5
7.1
7.5
7.1
S7015-0908
S7015-1008
WINDOW 16.3
WINDOW 28.6
ACTIVE AREA
12.288
ACTIVE AREA 24.576
2.54
44.0
2.54
34.0
42.0
50.0
52.0
60.0
1st PIN INDICATION PAD
PHOTOSENSITIVE SURFACE
1st PIN INDICATION PAD
PHOTOSENSITIVE SURFACE
TE-COOLER
TE-COOLER
(24×) 0.5
(24×) 0.5
KMPDA0044EC
KMPDA0045EB
7
CCD area image sensor S7010/S7011/S7015 series
ꢀ Pin connections
S7010 series
Description
Reset gate
S7011 series
Description
Reset gate
S7015 series
Description
Reset gate
Pin
No. Symbol
Remark
Symbol
RG
RD
Symbol
RG
RD
1
2
3
4
5
6
7
8
RG
RD
OS
OD
OG
SG
NC
NC
Reset drain
Reset drain
Reset drain
Output transistor source
Output transistor drain
Output gate
OS
OD
Output transistor source
Output transistor drain
Output gate
OS
OD
Output transistor source
Output transistor drain
Output gate
OG
SG
OG
SG
Summing gate
Summing gate
Thermistor
Summing gate
Thermistor
=P2H
Th1
Th2
Th1
Th2
Thermistor
CCD horizontal register
clock-2
Thermistor
CCD horizontal register
clock-2
CCD horizontal register
clock-2
9
P2H
P1H
IG2H
IG1H
ISH
P2H
P1H
IG2H
IG1H
ISH
P2H
P1H
IG2H
IG1H
ISH
CCD horizontal register
clock-1
Test point
(horizontal input gate-2)
Test point
(horizontal input gate-1)
Test point
(horizontal input source)
CCD vertical register clock-2
CCD vertical register clock-1
Transfer gate
CCD horizontal register
clock-1
Test point
(horizontal input gate-2)
Test point
(horizontal input gate-1)
Test point
(horizontal input source)
CCD vertical register clock-2
CCD vertical register clock-1
Transfer gate
CCD horizontal register
clock-1
Test point
(horizontal input gate-2)
Test point
(horizontal input gate-1)
Test point
(horizontal input source)
CCD vertical register clock-2
CCD vertical register clock-1
Transfer gate
10
11
12
13
0 V
0 V
=RD
14
15
16
17
18
19
20
21
P2V
P1V
TG *18
NC
P2V
P1V
TG *18
NC
P2V
P1V
TG *18
NC
=P2V
NC
NC
P-
P+
TE-cooler-
TE-cooler+
Substrate (GND)
P-
P+
TE-cooler-
TE-cooler+
Substrate (GND)
SS
NC
Substrate (GND)
SS
NC
SS
NC
Test point
(vertical input source)
Test point
(vertical input gate-2)
Test point
(vertical input gate-1)
Test point
(vertical input source)
Test point
(vertical input gate-2)
Test point
(vertical input gate-1)
Test point
(vertical input source)
Test point
(vertical input gate-2)
Test point
(vertical input gate-1)
22
23
24
ISV
ISV
ISV
=RD
0 V
IG2V
IG1V
IG2V
IG1V
IG2V
IG1V
0 V
*18 TG: Isolation gate between vertical register and horizontal register. In standard operation, TG should be applied the same pulse as P2V.
ꢀ Specifications of built-in TE-cooler (Typ.)
S7011-0906/ S7011-1006/
-1007
6.0
Parameter
Symbol
Condition
S7015-0908
S7015-1008
Unit
-0907
2.8
Internal resistance
Maximum current *19
Rint Ta=25 °C
Imax Tc *20=Th *21=25 °C
Vmax Tc *20=Th *21=25 °C
2.5
1.5
3.8
1.2
3.0
3.6
W
A
V
1.5
4.4
1.5
8.8
Maximum voltage
Maximum heat
absorption *22
Qmax
-
3.4
6.7
3.4
5.1
W
Maximum temperature
of heat radiating side
*19: Maximum current Imax:
70
°C
If the current greater than this value flows into the thermoelectric cooler, the heat absorption begins to decrease due to the
Joule heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and
maintain stable operation, the supply current should be less than 60 % of this maximum current.
*20: Temperature of the cooling side of thermoelectric cooler.
*21: Temperature of the heat radiating side of thermoelectric cooler.
*22: Maximum heat absorption Qmax.
This is a heat absorption when the maximum current is supplied to the TE-cooler.
8
CCD area image sensor S7010/S7011/S7015 series
ꢀ TE-cooler characteristics
S7011-0906/-0907
S7011-1006/-1007
(Typ. Ta=25 ˚C)
(Typ. Ta=25 ˚C)
5
10
8
20
10
0
20
10
0
VOLTAGE vs. CURRENT
VOLTAGE vs. CURRENT
CCD TEMPERATURE vs. CURRENT
CCD TEMPERATURE vs. CURRENT
4
3
2
1
0
6
4
-10
-20
-30
-10
-20
-30
2
0
0
0.5
1.0
1.5
2.0
0
0.5
1.0
1.5
2.0
CURRENT (A)
CURRENT (A)
KMPDB0176EB
KMPDB0177EB
S7015-0908
S7015-1008
(Typ. Ta=25 ˚C)
(Typ. Ta=25 ˚C)
7
6
5
4
3
2
1
0
30
20
10
0
7
6
5
4
3
2
1
0
30
20
10
0
VOLTAGE vs. CURRENT
CCD TEMPERATURE vs. CURRENT
VOLTAGE vs. CURRENT
CCD TEMPERATURE vs. CURRENT
-10
-20
-30
-40
-10
-20
-30
-40
0
1
2
3
4
0
0.5
1.0
1.5
2.0
CURRENT (A)
CURRENT (A)
KMPDB0179EA
KMPDB0178EA
9
CCD area image sensor S7010/S7011/S7015 series
Specifications of built-in temperature sensor
A chip thermistor is built in the same package with a CCD chip, and the CCD chip temperature can be monitored with it. A relation
ꢀ
between the thermistor resistance and absolute temperature is expressed by the following equation.
(Typ. Ta=25 ˚C)
1 MΩ
R1 = R2 × expB (1 / T1 - 1 / T2)
where R1 is the resistance at absolute temperature T1 (K)
R2 is the resistance at absolute temperature T2 (K)
B is so-called the B constant (K)
The characteristics of the thermistor used are as follows.
R (298K) = 10 kW
B (298K / 323K) = 3450 K
100 kΩ
10 kΩ
220
240
260
280
300
TEMPERATURE (K)
KMPDB0111EA
ꢀ Precaution for use (Electrostatic countermeasures)
ꢁ Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with
an earth ring, in order to prevent electrostatic damage due to electrical charges from friction.
ꢁ Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge.
ꢁ Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to
discharge.
ꢁ Ground the tools used to handle these sensors, such as tweezers and soldering irons.
It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the
amount of damage that occurs.
ꢀ Element cooling/heating temperature incline rate
Element cooling/heating temperature incline rate should be set at less than 5 K/min.
Multichannel detector head (C7020, C7021, C7025)
Features
C7020: for S7010 series
C7021: for S7011 series
C7025: for S7015 series
Area scanning or full line-binnng operation
Readout frequency: 250 kHz
-
Readout noise: 20 e rms
∆T=50 ˚C (∆T changes by radiation method.)
Input
Symbol
VD1
VA1+
VA1-
VA2
Value
+5 Vdc, 200 mA
+15 Vdc, +100 mA
-15 Vdc, -100 mA
Supply
voltage
+24 Vdc, 30 mA
VD2
Vp
+5 Vdc, 30 mA (C7021, C7025)
+5 Vdc, 2.5 A (C7021, C7025)
+12 Vdc, 100 mA (C7021, C7025)
HCMOS logic compatible
HCMOS logic compatible, 1 MHz
VF
Master start
Master clock
fms
fmc
Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions.
Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. ©2003 Hamamatsu Photonics K.K.
HAMAMATSU PHOTONICS K.K., Solid State Division
1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184, http://www.hamamatsu.com
U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218
Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 08152-3750, Fax: (49) 08152-2658
France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10
United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777
North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01
Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1/E, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741
Cat. No. KMPD1022E09
Feb. 2003 DN
10
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