HMS51232J4A-12 [HANBIT]

SRAM MODULE 2Mbyte (512K x 32-Bit), 68-Pin JLCC Packaging; SRAM模块2Mbyte ( 512K ×32位) , 68引脚JLCC包装
HMS51232J4A-12
型号: HMS51232J4A-12
厂家: HANBIT ELECTRONICS CO.,LTD    HANBIT ELECTRONICS CO.,LTD
描述:

SRAM MODULE 2Mbyte (512K x 32-Bit), 68-Pin JLCC Packaging
SRAM模块2Mbyte ( 512K ×32位) , 68引脚JLCC包装

存储 静态存储器
文件: 总6页 (文件大小:163K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HANBit  
HMS51232J4A  
SRAM MODULE 2Mbyte (512K x 32-Bit), 68-Pin JLCC Packaging  
Part No. HMS51232J4A  
GENERAL DESCRIPTION  
The HMS51232J4A is a static random access memory (SRAM) module containing 524,288 words organized in a x32-bit  
configuration. The module consists of four 512K x 8 SRAMs mounted on a 68-pin, single-sided, FR4-printed circuit board.  
Four chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the modules 4 bytes independently. Output  
enable(/OE) and write enable(/WE) can set the memory input and output.  
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW. Reading is  
accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.  
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from  
a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.  
FEATURES  
PIN ASSIGNMENT  
w Access time : 10, 12 and 15ns  
w High-density 2MByte design  
w High-reliability, low-power design  
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61  
60  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
w Single +5V ±0.5V power supply  
w Three state output and TTL-compatible  
w FR4-PCB design  
DQ17  
DQ18  
DQ19  
Vss  
DQ14  
DQ13  
DQ12  
Vss  
DQ11  
DQ10  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
w Low profile 68-Pin JLCC  
DQ20  
DQ21  
DQ22  
DQ23  
Vcc  
DQ24  
DQ25  
DQ26  
DQ27  
Vss  
DQ9  
DQ8  
Vcc  
DQ7  
DQ6  
DQ5  
DQ4  
Vss  
OPTIONS  
w Timing  
MARKING  
10ns access  
12ns access  
15ns access  
-10  
-12  
-15  
DQ3  
DQ2  
DQ1  
DQ28  
DQ29  
DQ30  
w Packages  
68-pin JLCC  
J
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43  
68-Pin JLCC  
TOP VIEW  
URL: www.hbe.co.kr  
Rev. 1.0 (May / 2003)  
1
HANBit ElectronicsCo.,Ltd.  
HANBit  
HMS51232J4A  
PIN DESCRIPTION  
DQ0 DQ31  
A0 A18  
Data Inputs/Outputs  
Address Inputs  
/WE  
Write Enable  
/CE1-4  
/OE  
Chip Selects  
Output Enable  
Vcc  
Vss  
Power Supply  
Ground  
BLOCK DIAGRAM  
/CE1  
/CE2  
/CE3  
/CE4  
/WE  
/OE  
A0-18  
U1  
512Kx8  
U2  
512Kx8  
U3  
512Kx8  
U4  
512Kx8  
8
8
8
8
DQ8-15  
DQ16-23  
DQ0-7  
DQ24-31  
TRUTH TABLE  
MODE  
/OE  
/CE  
/WE  
DQ  
POWER  
STANDBY  
NOT SELECTED  
READ  
X
H
L
H
L
L
L
X
H
H
L
HIGH-Z  
HIGH-Z  
Dout  
STANDBY  
ACTIVE  
ACTIVE  
ACTIVE  
WRITE  
X
Din  
URL: www.hbe.co.kr  
Rev. 1.0 (May / 2003)  
2
HANBit ElectronicsCo.,Ltd.  
HANBit  
HMS51232J4A  
ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
SYMBOL  
VIN,OUT  
VCC  
RATING  
Voltage on Any Pin Relative to Vss  
Voltage on Vcc Supply Relative to Vss  
Power Dissipation  
-0.5V to +7.0V  
-0.5V to +7.0V  
4W  
PD  
o
o
Storage Temperature  
TSTG  
TA  
-55 C to +125 C  
o
o
Operating Temperature  
0 C to +70 C  
w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.  
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated  
in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended  
periods may affect reliability.  
o
RECOMMENDED DC OPERATING CONDITIONS ( T =0 to 70 C )  
A
PARAMETER  
Supply Voltage  
SYMBOL  
VCC  
MIN  
4.5V  
0
TYP.  
MAX  
5.5V  
5.0V  
Ground  
VSS  
0
-
0
Input High Voltage  
Input Low Voltage  
VIH  
2.2  
Vcc+0.5V**  
0.8V  
VIL  
-0.5*  
-
*
VIL(Min.) = -2.0V (Pulse Width 10ns) for I 20 mA  
** VIH(Max.) = Vcc+2.0V (Pulse Width 10ns) for I 20 mA  
o
o
DC AND OPERATING CHARACTERISTICS (1)(0 C T 70 C ; Vcc = 5V ± 0.5V )  
A
PARAMETER  
TEST CONDITIONS  
VIN = Vss to Vcc  
SYMBOL  
MIN  
MAX  
UNITS  
Input Leakage Current  
ILI  
-4  
4
µA  
/CE=VIH or /OE =VIH or /WE=VIL  
VOUT=Vss to VCC  
IOH = -4.0mA  
Output Leakage Current  
IL0  
-4  
4
µA  
Output High Voltage  
Output Low Voltage  
VOH  
VOL  
2.4  
-
V
V
IOL = 8.0mA  
0.4  
o
* Vcc=5.0V, Temp=25 C  
DC AND OPERATING CHARACTERISTICS (2)  
MAX  
-12  
DESCRIPTION  
TEST CONDITIONS  
SYMBOL  
UNIT  
-10  
-15  
Min. Cycle, 100% Duty  
Power Supply  
/CE=VIL, VIN=VIH or VIL,  
IOUT=0mA  
lCC  
840  
820  
800  
mA  
Current: Operating  
Power Supply  
Min. Cycle, /CE=VIH  
lSB  
200  
40  
200  
40  
200  
40  
mA  
mA  
Current: Standby  
f=0MHZ, /CEVCC-0.2V,  
VINVCC-0.2V or VIN0.2V  
lSB1  
URL: www.hbe.co.kr  
Rev. 1.0 (May / 2003)  
3
HANBit ElectronicsCo.,Ltd.  
HANBit  
HMS51232J4A  
CAPACITANCE  
DESCRIPTION  
TEST CONDITIONS  
VI/O=0V  
SYMBOL  
CI/O  
MAX  
UNIT  
pF  
Input /Output Capacitance  
Input Capacitance  
28  
20  
VIN=0V  
CIN  
pF  
* NOTE : Capacitance is sampled and not 100% tested  
o
o
AC CHARACTERISTICS (0 C T 70 C ; Vcc = 5V ± 0.5V, unless otherwise specified)  
A
TEST CONDITIONS  
PARAMETER  
VALUE  
0.V to 3V  
3ns  
Input Pulse Level  
Input Rise and Fall Time  
Input and Output Timing Reference Levels  
Output Load  
1.5V  
See below  
Output Load (A)  
Output Load (B)  
for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ  
+5V  
+5V  
480  
480Ω  
DOUT  
DOUT  
255Ω  
30pF*  
255Ω  
5pF*  
* Including scope and jig capacitance  
READ CYCLE  
-10  
-12  
-15  
PARAMETER  
SYMBOL  
UNIT  
MIN  
MAX  
MIN  
MAX  
MIN  
MAX  
Read Cycle Time  
tRC  
tAA  
10  
-
-
10  
10  
5
12  
-
-
12  
12  
6
15  
-
-
15  
15  
7
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Access Time  
Chip Select to Output  
tCO  
tOE  
tOLZ  
tLZ  
-
-
-
Output Enable to Output  
-
-
-
Output Enable to Low-Z Output  
Chip Enable to Low-Z Output  
Output Disable to High-Z Output  
Chip Disable to High-Z Output  
Output Hold from Address Change  
Chip Select to Power Up Time  
Chip Select to Power Down Time  
0
3
0
0
3
0
-
-
0
3
0
0
3
0
-
-
0
3
0
0
3
0
-
-
-
-
-
tOHZ  
tHZ  
5
6
7
5
6
7
tOH  
tPU  
tPD  
-
-
-
-
-
-
10  
12  
15  
URL: www.hbe.co.kr  
Rev. 1.0 (May / 2003)  
4
HANBit ElectronicsCo.,Ltd.  
HANBit  
HMS51232J4A  
WRITE CYCLE  
-10  
-12  
-15  
PARAMETER  
SYMBOL  
UNIT  
MIN  
10  
10  
0
MAX  
MIN  
12  
12  
0
MAX  
MIN  
15  
15  
0
MAX  
Write Cycle Time  
tWC  
tCW  
tAS  
-
-
-
-
-
-
-
5
-
-
-
-
-
-
-
-
-
-
6
-
-
-
-
-
-
-
-
-
-
7
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Select to End of Write  
Address Set-up Time  
Address Valid to End of Write  
Write Pulse Width (/OE=High)  
Write Pulse Width(/OE=Low)  
Write Recovery Time  
tAW  
tWP  
tWP1  
tWR  
tWZ  
tDW  
tDH  
7
8
10  
10  
14  
0
7
8
10  
0
12  
0
Write to Output High-Z  
0
0
0
Data to Write Time Overlap  
Data Hold from Write Time  
End of Write to Output Low-Z  
5
6
7
0
0
0
tOW  
3
3
3
TIMING DIAGRAMS  
Please refer to timing diagram chart.  
FUNCTIONAL DESCRIPTION  
/CE  
H
/WE  
X*  
H
/OE  
X
MODE  
I/O PIN  
High-Z  
High-Z  
DOUT  
SUPPLY CURRENT  
Not Select  
Output Disable  
Read  
I SB, I SB1  
ICC  
L
H
L
H
L
ICC  
L
L
X
Write  
DIN  
ICC  
Note: X means Don't Care  
URL: www.hbe.co.kr  
Rev. 1.0 (May / 2003)  
5
HANBit ElectronicsCo.,Ltd.  
HANBit  
HMS51232J4A  
PACKAGE DIMENSIONS  
4.30±0.20mm  
0.46±0.20mm  
23.44±0.25mm  
1.278±0.20mm  
ORDERING INFORMATION  
Component  
Part Number  
Density  
Org.  
Package  
Vcc  
Access time  
Number  
HMS51232J4A-10  
HMS51232J4A-12  
HMS51232J4A-15  
2MByte  
2MByte  
2MByte  
512KX 32bit  
512KX 32bit  
512KX 32bit  
68 Pin-JLCC  
68 Pin-JLCC  
68 Pin-JLCC  
4EA  
5V  
5V  
5V  
10ns  
12ns  
15ns  
4EA  
4EA  
URL: www.hbe.co.kr  
Rev. 1.0 (May / 2003)  
6
HANBit ElectronicsCo.,Ltd.  

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