HD74ALVC162334T [HITACHI]
Bus Driver, ALVC/VCX/A Series, 1-Func, 16-Bit, True Output, CMOS, PDSO48, TTP-48DC;型号: | HD74ALVC162334T |
厂家: | HITACHI SEMICONDUCTOR |
描述: | Bus Driver, ALVC/VCX/A Series, 1-Func, 16-Bit, True Output, CMOS, PDSO48, TTP-48DC 总线驱动器 总线收发器 逻辑集成电路 光电二极管 |
文件: | 总13页 (文件大小:54K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HD74ALVC162334
16-bit Universal Bus Driver with 3-state Outputs
ADE-205-205A (Z)
2nd. Edition
December 1999
Description
This HD74ALVC162334 is a 16-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation.
Data flow from A to Y is controlled by the output enable (OE) input. The device operates in the
transparent mode when the latch enable (LE) input is low. When LE is high, the A data is latched if the
clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch/flip
flop on the low to high transition of CLK. When OE is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a
pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the
driver.
All outputs, which are designed to sink up to 12 mA, include equivalent 26 Ω resistors to reduce overshoot
and undreshoot.
Features
•
•
•
•
•
VCC = 2.3 V to 3.6 V
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±12 mA (@VCC = 3.0 V)
All outputs have equivalent 26 Ω series resistors, so no external resistors are required
HD74ALVC162334
Function Table
Inputs
Output Y
OE
H
L
LE
X
CLK
A
X
L
X
Z
L
L
X
L
L
X
H
L
H
L
L
H
H
H
↑
L
↑
H
X
H
*1
L
L or H
Y0
H : High level
L : Low level
X : Immaterial
Z : High impedance
↑ : Low to high transition
Note: 1. Output level before the indicated steady state input conditions were established.
2
HD74ALVC162334
Pin Arrangement
CLK
OE 1
48
Y1 2
47 A1
46
45
44
43
42
A2
Y2
GND
Y3
3
4
GND
A3
5
6
A4
Y4
7
VCC
VCC
8
Y5
Y6
41 A5
A6
9
40
39
38
10
11
12
GND
Y7
GND
A7
Y8
37 A8
A9
36
35
34
Y9 13
Y10 14
A10
GND
GND
15
33 A11
Y11
Y12
VCC
Y13
Y14
16
17
A12
VCC
32
31
18
19
20
30 A13
29 A14
GND 21
GND
A15
A16
LE
28
27
26
25
22
Y15
Y16
NC
23
24
(Top view)
3
HD74ALVC162334
Absolute Maximum Ratings
Item
Symbol
Ratings
–0.5 to 4.6
–0.5 to 4.6
–0.5 to VCC +0.5
–50
Unit
V
Conditions
Supply voltage
Input voltage *1
VCC
VI
V
Output voltage *1, 2
Input clamp current
Output clamp current
Continuous output current
VCC, GND current / pin
VO
V
IIK
mA
mA
mA
mA
W
VI < 0
IOK
±50
VO < 0 or VO > VCC
VO = 0 to VCC
IO
±50
ICC or IGND
PT
±100
Maximum power dissipation
0.85
TSSOP
at Ta = 55°C (in still air) *3
Storage temperature
Tstg
–65 to 150
°C
Notes:
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C
and a board trace length of 750 mils.
Recommended Operating Conditions
Item
Symbol
VCC
Min
2.3
0
Max
3.6
VCC
VCC
–6
–8
–12
6
Unit
V
Conditions
Supply voltage
Input voltage
VI
V
Output voltage
High level output current
VO
0
V
IOH
—
—
—
—
—
—
0
mA
VCC = 2.3 V
VCC = 2.7 V
VCC = 3.0 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3.0 V
Low level output current
IOL
mA
8
12
10
85
Input transition rise or fall rate
Operating temperature
∆t / ∆v
ns / V
Ta
–40
°C
Note: Unused control inputs must be held high or low to prevent them from floating.
4
HD74ALVC162334
Logic Diagram
1
48
25
47
OE
CLK
LE
1D
C1
A1
2
Y1
CLK
To fifteen other channels
5
HD74ALVC162334
Electrical Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V)
Min
Max
—
Unit Test Conditions
Input voltage
VIH
2.3 to 2.7 1.7
2.7 to 3.6 2.0
V
—
VIL
2.3 to 2.7
2.7 to 3.6
—
—
0.7
0.8
—
Output voltage
VOH
2.3 to 3.6 VCC–0.2
V
IOH = –100 µA
2.3
1.9
1.7
2.4
2.0
2.0
—
—
IOH = –4 mA, VIH = 1.7 V
IOH = –6 mA, VIH = 1.7 V
IOH = –6 mA, VIH = 2.0 V
IOH = –8 mA, VIH = 2.0 V
IOH = –12 mA, VIH = 2.0 V
IOL = 100 µA
2.3
—
3.0
—
2.7
—
3.0
—
VOL
2.3 to 3.6
2.3
0.2
0.4
0.55
0.55
0.6
0.8
±5
—
IOL = 4 mA, VIL = 0.7 V
IOL = 6 mA, VIL = 0.7 V
IOL = 6 mA, VIL = 0.8 V
IOL = 8 mA, VIL = 0.8 V
IOL = 12 mA, VIL = 0.8 V
VIN = VCC or GND
2.3
—
3.0
—
2.7
—
3.0
—
Input current
IIN
3.6
—
µA
µA
µA
µA
Off state output current IOZ
Quiescent supply current ICC
3.6
—
±10
40
VOUT = VCC or GND
3.6
—
VIN = VCC or GND
∆ICC
3.0 to 3.6
—
750
VIN = one input at (VCC–0.6)
V,
other inputs at VCC or GND
6
HD74ALVC162334
Switching Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V) Min
Typ
Max
Unit FROM
TO
(Input)
(Output)
Maximum clock frequency fmax
2.5±0.2 150
2.7 150
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
5.5
6.0
8.0
—
MHz
—
3.3±0.3 150
2.5±0.2 1.0
—
Propagation delay time
tPLH
tPHL
3.9
4.5
3.9
5.0
6.0
5.0
4.9
5.4
4.9
5.4
6.4
5.4
4.7
5.1
5.0
—
ns
A
Y
Y
Y
Y
Y
2.7
—
3.3±0.3 1.1
2.5±0.2 1.0
LE
CLK
OE
OE
2.7
—
3.3±0.3 1.3
2.5±0.2 1.0
2.7
—
3.3±0.3 1.0
2.5±0.2 1.0
Output enable time
Output disable time
tZH
tZL
ns
ns
2.7
—
3.3±0.3 1.1
2.5±0.2 1.0
tHZ
tLZ
2.7
—
3.3±0.3 1.7
Input capacitance
Output capacitance
CIN
CO
3.3
3.3
3.3
—
—
—
pF
pF
Control inputs
Data inputs
Outputs
—
—
7
HD74ALVC162334
Switching Characteristics (Ta = –40 to 85°C) (cont)
Item
Symbol VCC (V) Min
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit FROM (Input)
Setup time
tsu
2.5±0.2 1.4
2.7 1.7
ns
Data before CLK↑
3.3±0.3 1.5
2.5±0.2 1.2
Data before LE↑
2.7
1.6
CLK “H”
3.3±0.3 1.3
2.5±0.2 1.4
Data before LE↑
2.7
1.5
CLK “L”
3.3±0.3 1.2
2.5±0.2 0.9
Hold time
th
ns
Data after CLK↑
2.7
0.8
3.3±0.3 0.9
2.5±0.2 1.1
Data after LE↑
2.7
1.1
CLK “H” or “L”
3.3±0.3 1.1
2.5±0.2 3.3
Pulse width
tw
ns
LE “L”
2.7
3.3
3.3±0.3 3.3
2.5±0.2 3.3
CLK “H” or “L”
2.7
3.3
3.3±0.3 3.3
8
HD74ALVC162334
Test Circuit
See under table
OPEN
GND
500 Ω
S1
*1
CL= 50 pF
500 Ω
Load Circuit for Outputs
Vcc=2.7V,
Vcc=2.5±0.2V
Symbol
3.3±0.3V
tPLH/ tPHL
tsu / th / tw
OPEN
OPEN
tZH/ tHZ
tZL / tLZ
GND
GND
6.0 V
2 × VCC
Note:
1. CL includes probe and jig capacitance.
9
HD74ALVC162334
Waveforms – 1
tr
tf
V
IH
90 %
Vref
90 %
Vref
Input
10 %
10 %
GND
tPHL
tPLH
VOH
Output
Vref
Vref
VOL
Waveforms – 2
tr
V
IH
90 %
Vref
Timing Input
Data Input
10 %
tsu
GND
th
V
IH
Vref
Vref
GND
tw
V
IH
Vref
Vref
Input
GND
10
HD74ALVC162334
Waveforms – 3
tf
tr
V
IH
90 %
Vref
90 %
Vref
Output
Control
10 %
tZL
10 %
GND
tLZ
≈VOH1
Vref
Waveform - A
Waveform - B
V
ref1
VOL
VOH
tZH
tHZ
V
ref2
Vref
≈VOL1
Vcc=2.7V,
Vcc=2.5±0.2V
TEST
3.3±0.3V
VIH
VCC
2.7 V
Vref
1/2 VCC
1.5 V
Vref1
Vref2
VOH1
VOL1
VOL +0.15 V VOL +0.3 V
VOH–0.15 V VOH–0.3 V
VCC
3.0 V
GND
GND
Notes:
1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.0 ns, tf ≤ 2.0 ns. (VCC = 2.5±0.2 V)
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. (VCC = 2.7 V, 3.3±0.3 V)
2. Waveform – A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
11
HD74ALVC162334
Package Dimensions
Unit : mm
+0.3
–0.1
12.50
48
25
1
24
0.50
0.08
+0.1
–0.05
M
0.20
8.10 ± 0.3
0.65 Max
10° Max
0.50 ± 0.1
0.10
Hitachi code
EIAJ code
JEDEC code
TTP-48DC
—
—
12
HD74ALVC162334
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
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For further information write to:
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(America) Inc.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
13
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