HD74ALVC162834AT-EL [HITACHI]
Bus Driver, ALVC/VCX/A Series, 1-Func, 18-Bit, Inverted Output, CMOS, PDSO56, TSSOP-56;型号: | HD74ALVC162834AT-EL |
厂家: | HITACHI SEMICONDUCTOR |
描述: | Bus Driver, ALVC/VCX/A Series, 1-Func, 18-Bit, Inverted Output, CMOS, PDSO56, TSSOP-56 总线驱动器 |
文件: | 总15页 (文件大小:63K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HD74ALVC162834
18-bit Universal Bus Driver with 3-state Outputs
and Inverted Latch Enable
ADE-205-217D (Z)
5th. Edition
December 1999
Description
The HD74ALVC162834 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation.
Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode
when the latch enable (LE) is low. When LE is low, the A data is latched if the clock (CLK) input is held
at a high or low logic level. If the LE is high, the A data is stored in the latch/flip flop on the low to high
transition of CLK. When OE is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a
pullup registor; the minimum value of the registor is determined by the current sinking capability of the
driver.
All outputs, which are designed to sink up to 12 mA, include 26 Ω resistors to reduce overshoot and
undershoot.
Features
•
•
•
•
•
•
Meets “PC SDRAM registered DIMM design support document, Rev. 1.2”
VCC = 2.3 V to 3.6 V
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±12 mA (@VCC = 3.0 V)
All outputs have equivalent 26 Ω series resistors, so no external resistors are required
HD74ALVC162834
Function Table
Inputs
OE
H
L
LE
X
CLK
A
X
L
Output Y
X
Z
L
L
X
L
L
X
H
L
H
L
L
H
H
H
↑
L
↑
H
X
H
*1
L
L or H
Y0
H :
L :
X :
Z :
↑ :
High level
Low level
Immaterial
High impedance
Low to high transition
Note: 1. Output level before the indicated steady-state input conditions were established.
2
HD74ALVC162834
Pin Arrangement
NC 1
56 GND
55 NC
2
NC
54
53
52
51
50
A1
Y1
GND
Y2
3
4
GND
A2
5
6
Y3
A3
7
VCC
VCC
Y4
8
49 A4
Y5
A5
9
48
47
46
10
Y6
A6
11
12
13
14
15
16
17
GND
GND
Y7
45 A7
Y8
A8
44
43
42
Y9
A9
Y10
Y11
Y12
A10
41 A11
A12
40
39 GND
38
GND 18
Y13
19
A13
37 A14
20
21
22
23
Y14
Y15
VCC
Y16
A15
VCC
A16
A17
GND
A18
CLK
GND
36
35
34
33
32
31
30
29
Y17 24
25
26
27
GND
Y18
OE
LE 28
(Top view)
3
HD74ALVC162834
Absolute Maximum Ratings
Item
Symbol
Ratings
–0.5 to 4.6
–0.5 to 4.6
–0.5 to VCC+0.5
–50
Unit
V
Conditions
Supply voltage range
VCC
*1
Input voltage range
VI
V
*1,
2
Output voltage range
Input clamp current
Output clamp current
VO
V
IIK
mA
mA
mA
mA
W
VI < 0
IOK
±50
VO < 0 or VO > VCC
VO = 0 to VCC
Continuous output current
VCC, GND current / pin
IO
±50
ICC or IGND
PT
±100
Maximum power dissipation
1
TSSOP
at Ta = 55°C (in still air) *3
Storage temperature range
Tstg
–65 to 150
°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other conditions
beyond those indicated under “recommended operating condition” is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability.
Notes: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. The input and output positive-voltage ratings may be exceeded up to 4.6 V if the input and output
clamp-current ratings are observed.
3. The maximum power dissipation is calculated using a junction temperature of 150°C and board
trace length of 750 mils.
Recommended Operating Conditions
Item
Symbol
VCC
Min
2.3
0
Max
3.6
VCC
VCC
–6
–8
–12
6
Unit
V
Conditions
Supply voltage
Input voltage
VI
V
Output voltage
High-level output current
VO
0
V
IOH
—
—
—
—
—
—
0
mA
VCC = 2.3 V
VCC = 2.7 V
VCC = 3.0 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3.0 V
Low-level output current
IOL
mA
8
12
10
85
Input transition rise or fall rate
Operating free-air temperature
∆t/∆v
ns/V
Ta
–40
°C
Note: Unused or floating control pins must be held high or low.
4
HD74ALVC162834
Logic Diagram
27
30
28
54
OE
CLK
LE
A1
1D
C1
3
Y1
CLK
To seventeen other channels
5
HD74ALVC162834
Electrical Characteristics
Ta = –40 to 85°C
Item
Symbol VCC (V)
Min
Max
—
Unit Test Conditions
Input voltage
VIH
2.3 to 2.7 1.7
2.7 to 3.6 2.0
V
—
VIL
2.3 to 2.7
2.7 to 3.6
—
—
0.7
0.8
—
V
Output voltage
VOH
2.3 to 3.6 VCC–0.2
V
IOH = –100 µA
2.3
1.9
1.7
2.4
2.0
2.0
—
—
IOH = –4 mA, VIH = 1.7 V
IOH = –6 mA, VIH = 1.7 V
IOH = –6 mA, VIH = 2.0 V
IOH = –8 mA, VIH = 2.0 V
IOH = –12 mA, VIH = 2.0 V
IOL = 100 µA
2.3
—
3.0
—
2.7
—
3.0
—
VOL
2.3 to 3.6
2.3
0.2
0.4
0.55
0.55
0.6
0.8
±5.0
±10
40
V
—
IOL = 4 mA, VIL = 0.7 V
IOL = 6 mA, VIL = 0.7 V
IOL = 6 mA, VIL = 0.8 V
IOL = 8 mA, VIL = 0.8 V
IOL = 12 mA, VIL = 0.8 V
2.3
—
3.0
—
2.7
—
3.0
—
Input current
IIN
3.6
—
µA VIN = VCC or GND
µA VOUT = VCC or GND
µA VIN = VCC or GND
Off state output current IOZ
Quiescent supply current ICC
3.6
—
3.6
—
∆ICC
3.0 to 3.6
—
750
µA One input at (VCC–0.6)V,
other inputs at VCC or GND
6
HD74ALVC162834
Switching Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V)
Min
150
150
150
1.0
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.5
6.0
7.0
Max
—
Unit From (Input) To (Output)
Maximum clock
frequency
fmax
2.5±0.2
2.7
MHz
—
3.3±0.3
2.5±0.2
2.7
—
Propagation delay time tPLH
tPHL
5.0
5.0
4.2
6.0
6.1
5.4
6.3
6.1
5.4
6.3
6.5
5.5
4.4
4.9
4.5
7.0
9.0
9.0
ns
A
Y
Y
Y
Y
Y
3.3±0.3
2.5±0.2
2.7
1.0
1.4
—
LE
CLK
OE
OE
3.3±0.3
2.5±0.2
2.7
1.4
1.4
—
3.3±0.3
2.5±0.2
2.7
1.4
1.4
—
Output enable time
Output disable time
tZH
tZL
ns
ns
3.3±0.3
2.5±0.2
2.7
1.1
1.0
—
tHZ
tLZ
3.3±0.3
3.3
1.3
3.0
3.0
3.0
Input capacitance
Output capacitance
CIN
CO
pF
pF
Control inputs
Data inputs
Y ports
3.3
3.3
7
HD74ALVC162834
Switching Characteristics (Ta = –40 to 85°C) (cont)
Item
Symbol VCC (V)
Min
2.1
2.1
1.7
1.2
1.6
1.3
1.4
1.5
1.2
0.6
0.6
0.7
0.8
1.1
1.1
3.3
3.3
3.3
3.3
3.3
3.3
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit From (Input)
Setup time
tsu
2.5±0.2
2.7
ns
Data before CLK↑
3.3±0.3
2.5±0.2
2.7
Data before LE↑
CLK “H”
3.3±0.3
2.5±0.2
2.7
Data before LE↑
CLK “L”
3.3±0.3
2.5±0.2
2.7
Hold time
th
ns
Data after CLK↑
3.3±0.3
2.5±0.2
2.7
Data after LE↑
CLK “H” or “L”
3.3±0.3
2.5±0.2
2.7
Pulse width
tw
ns
LE “L”
3.3±0.3
2.5±0.2
2.7
CLK “H” or “L”
3.3±0.3
Switching Characteristics (Ta = 0 to 85°C)
Item
Symbol VCC (V)
Min
Typ
Max
Unit FROM
(Input)
TO
(Output)
Propagation
delay time
CL=0pF *1 tPLH, tPHL 3.3±0.165 0.9
—
—
—
—
—
—
2.0
4.5
2.9
4.5
4.8
2.5
ns
A
Y
Y
CL=50pF
3.3±0.165 1.0
3.3±0.165 1.4
3.3±0.165 1.9
3.3±0.165 1.9
CL=0pF *1
CLK
CLK, A
CL=50pF
*1, 2
CL=50pF tSSO
Y
Y
Output rise /
fall time
CL=50pF tTLH, tTHL 3.3±0.165 1.0
volts/
ns
*1
Notes: 1. This parameter is characterized but not tested.
2. tSSO : Simultaneous switching output time.
8
HD74ALVC162834
Operating Characteristics (Ta = 25°C)
Item
Symbol VCC = 2.5±0.2 V VCC = 3.3±0.3 V Unit Test Conditions
Typ
22.0
5.0
Typ
24.5
6.0
Power dissipation Outputs enable Cpd
pF CL = 0, f = 10 MHz
capacitance
Outputs disable
Test Circuit
See under table
OPEN
GND
500 Ω
S1
*1
CL
500 Ω
Load Circuit for Outputs
Vcc=2.7V,
Vcc=2.5±0.2V
Symbol
3.3±0.3V
tPLH/ tPHL
OPEN
OPEN
tsu / th / tw
tZH/ tHZ
tZL / tLZ
CL
GND
2 × VCC
30 pF
GND
6.0 V
50 pF
Note:
1. CL includes probe and jig capacitance.
9
HD74ALVC162834
Waveforms – 1
tr
tf
V
IH
90 %
Vref
90 %
Vref
Input
10 %
10 %
GND
tPHL
tPLH
VOH
Output
Vref
Vref
VOL
Waveforms – 2
tr
V
IH
90 %
Vref
Timing Input
Data Input
10 %
tsu
GND
th
V
IH
Vref
Vref
GND
tw
V
IH
Vref
Vref
Input
GND
10
HD74ALVC162834
Waveforms – 3
tf
tr
V
IH
90 %
Vref
90 %
Vref
Output
Control
10 %
tZL
10 %
GND
tLZ
≈VOH1
Vref
Waveform - A
Waveform - B
V
ref1
VOL
VOH
tZH
tHZ
V
ref2
Vref
≈VOL1
Vcc=2.7V,
Vcc=2.5±0.2V
TEST
3.3±0.3V
VIH
VCC
2.7 V
Vref
1/2 VCC
1.5 V
Vref1
Vref2
VOH1
VOL1
VOL +0.15 V VOL +0.3 V
VOH–0.15 V VOH–0.3 V
VCC
3.0 V
GND
GND
Notes:
1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.0 ns, tf ≤ 2.0 ns. (VCC = 2.5±0.2 V)
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. (VCC = 2.7 V, 3.3±0.3 V)
2. Waveform – A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
11
HD74ALVC162834
IV Characteristics for Register Output (Measured value)
Weak condition HIGH
Vcc = 3.15 V, Ta = 85°C
VOH (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
-10
-20
-30
-40
-50
-60
-70
-80
Strong condition HIGH
Vcc = 3.45 V, Ta = 0°C
VOH (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
-20
-40
-60
-80
-100
12
HD74ALVC162834
Weak condition LOW
Vcc = 3.15 V, Ta = 85°C
80
70
60
50
40
30
20
10
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VOL (V)
Strong condition LOW
Vcc = 3.45 V, Ta = 0°C
100
80
60
40
20
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VOL (V)
13
HD74ALVC162834
Package Dimensions
Unit : mm
+0.3
–0.1
14.00
56
29
28
1
0.50
+0.1
–0.05
M
0.08
0.20
8.10 ± 0.3
0.40 Max
10° Max
0.50 ± 0.1
0.10
Hitachi code
EIAJ code
JEDEC code
TTP-56D
—
—
14
HD74ALVC162834
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
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: http:semiconductor.hitachi.com/
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Japan
: http://www.hitachi.co.jp/Sicd/index.htm
For further information write to:
Hitachi Semiconductor
(America) Inc.
Hitachi Europe GmbH
Hitachi Asia (Hong Kong) Ltd.
Group III (Electronic Components)
7/F., North Tower, World Finance Centre,
Harbour City, Canton Road, Tsim Sha Tsui,
Kowloon, Hong Kong
Tel: <852> (2) 735 9218
Fax: <852> (2) 730 0281
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Tel: 535-2100
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Germany
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179 East Tasman Drive,
San Jose,CA 95134
Tel: <1> (408) 433-1990
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Taipei Branch Office
3F, Hung Kuo Building. No.167,
Tun-Hwa North Road, Taipei (105)
Tel: <886> (2) 2718-3666
Fax: <886> (2) 2718-8180
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Hitachi Europe Ltd.
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Lower Cookham Road
Maidenhead
Berkshire SL6 8YA, United Kingdom
Tel: <44> (1628) 585000
Fax: <44> (1628) 778322
Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
15
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