HT6222A [HOLTEK]

Multi-Purpose Encoders; 多功能编码器
HT6222A
型号: HT6222A
厂家: HOLTEK SEMICONDUCTOR INC    HOLTEK SEMICONDUCTOR INC
描述:

Multi-Purpose Encoders
多功能编码器

编码器
文件: 总19页 (文件大小:170K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HT6220A/HT6221A/HT6221B/HT6222A  
Multi-Purpose Encoders  
Features  
·
·
Operating voltage: 2.0V~3.6V  
Maximum active keys  
·
-
DOUT with 38kHz carrier for IR medium  
HT6220A: 30 keys  
-
HT6221A: 32 keys  
·
Low standby current  
-
HT6221B: 48 keys  
·
Minimum transmission word: one word  
-
HT6222A: 64 keys  
·
Build-in RC (Internal RC) oscillator  
·
Low power and high noise immunity CMOS  
·
16-bit address codes  
technology  
·
8-bit data codes  
·
HT6220A: 16-pin NSOP package  
·
PPM code method  
HT6221A/HT6221B: 20-pin SOP package  
HT6222A: 24-pin SOP package  
·
Three double-active keys  
Applications  
·
·
Television , setup box and DVD player controllers  
Burglar alarm systems  
Car door controllers  
Car alarm systems  
·
·
·
·
·
·
Smoke and fire alarm systems  
Garage door controllers  
Security systems  
Other remote control systems  
General Description  
The devices are CMOS LSI encoders designed for use  
in remote control systems. They are capable of encod-  
ing 16-bit address codes and 8-bit data codes. Each ad-  
dress/data input can be set to one of the two logic  
states, 0 and 1.  
K45~K46, K49~K50), 32 keys (K1~K32), 48 keys  
(K1~K32, K33~K34, K37~K38, K41~K42, K45~K46,  
K49~K50, K53~K54, K57~K58, K61~K62) and 64 keys  
(K1~K64), respectively. When one of the keys is trig-  
gered, the programmed address/data is transmitted to-  
gether with the header bits via an IR (38kHz carrier)  
transmission medium.  
The HT6220A/HT6221A/HT6221B/HT6222A contain  
30keys (K1~K20, K33~K34, K37~K38, K41~K42,  
Block Diagram  
D
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8
A
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7
Rev. 1.10  
1
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
Pin Assignment  
1
2
3
4
5
6
7
8
9
1
1
1
R
R
R
R
R
R
3
4
5
6
7
8
R
R
A
C
C
C
C
C
C
C
C
L
2
1
2
2
2
2
2
1
1
1
1
1
1
1
4
3
2
1
0
9
8
7
6
5
4
3
R
R
R
R
1
2
3
4
2
1
1
1
1
1
1
1
1
1
0
9
8
7
6
5
4
3
2
1
A
C
C
C
C
C
C
C
C
L
I
N
R
R
R
R
1
2
3
4
2
1
1
1
1
1
1
1
1
1
0
9
8
7
6
5
4
3
2
1
A
C
C
C
C
C
C
C
C
L
I
N
I
1
2
3
4
5
6
7
8
9
1
1
2
3
4
5
6
7
8
9
1
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R
R
R
R
3
4
5
6
R
R
A
C
C
C
C
C
2
1
1
2
3
4
5
6
7
8
1
1
1
1
1
1
1
6
5
4
3
2
1
0
I
N
D
O
U
T
D
O
U
T
D
O
U
T
1
2
3
4
5
V
D
D
V
D
D
V
D
D
D
O
U
T
D
7
D
R
R
7
5
6
D
7
V
D
D
N
N
C
C
0
1
2
N
N
C
C
D
7
V
S
S
V
S
S
E
D
V
S
S
E
D
9
0
0
V
S
S
E
H
T
6
2
2
0
A
H
T
6
2
2
1
A
H
T
6
2
2
1
B
H
T
6
2
2
2
A
1
6
N
S
O
P
-
A
2
0
S
O
P
-
A
2
0
S
O
P
-
A
2
4
S
O
P
-
Pin Description  
HT6222A  
Pin No. Pin Name I/O  
Internal Connection  
Description  
1~6  
7
R3~R8  
DOUT  
VDD  
D7  
I
CMOS IN, Pull-low  
Row control for keyboard matrix, active high  
Serial data output pin, with a 38kHz carrier  
O
¾
I
NMOS OUT  
8
Positive power supply, 2.0V~3.6V for normal operation  
Most significant data bit (D7) code setting  
No connection  
¾
CMOS IN  
¾
9
10, 11  
12  
NC  
¾
¾
O
VSS  
Negative power supply, ground  
¾
13  
LED  
CMOS OUT  
Transmission enable indicator output  
14~21  
C8~C1  
I/O CMOS IN/OUT, Pull-low Column control for keyboard matrix  
CMOS IN, Pull-high  
22  
AIN  
I
I
Low byte address codes (8 bits) scan input  
Row control for keyboard matrix, active high  
Pull-low  
23~24  
R1~R2  
CMOS IN, Pull-low  
Approximate Internal Connection Circuits  
C
M
O
S
I
N
/
O
U
T
C
M
O
S
I
N
/
O
U
T
C
M
O
S
I
N
P
u
l
l
-
l
o
w
P
u
l
l
-
l
o
w
V
D
D
C
M
O
S
I
N
C
M
O
S
O
U
T
N
M
O
S
O
U
T
V
D
D
Rev. 1.10  
2
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
Absolute Maximum Ratings  
Supply Voltage..............................VSS-0.3V to VSS+6V  
Input Voltage..............................VSS-0.3V to VDD+0.3V  
Storage Temperature............................-50°C to 125°C  
Operating Temperature...........................-20°C to 75°C  
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may  
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed  
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.  
Electrical Characteristic  
Ta=25°C  
Test Conditions  
Conditions  
Symbol  
Parameter  
Min.  
Typ.  
Max.  
Unit  
VDD  
¾
VDD  
ISTB  
IDD  
Operating Voltage  
2.0  
¾
3.0  
0.1  
600  
350  
-60  
2
3.6  
1.0  
900  
¾
V
mA  
mA  
mA  
mA  
mA  
mA  
mA  
V
¾
Standby Current  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
3V  
Oscillator stops  
f
OSC=455kHz, no load  
Operating Current  
¾
IOL1  
IOH2  
IOL2  
IOH3  
IOL3  
VIH1  
VIL1  
VIH2  
VIL2  
VIH3  
VIL3  
RPH1  
RPL1  
RPL2  
RPL3  
VO=0.6V  
VO=2.7V  
VO=0.3V  
VO=2.7V  
VO=0.3V  
Output Sink Current for DOUT  
Output Source Current for LED  
Output Sink Current for LED  
Output Source Current for C1~C8  
Output Sink Current for C1~C8  
Input High Voltage for R1~R8  
Input Low Voltage for R1~R8  
Input High Voltage for C1~C8  
Input Low Voltage for C1~C8  
Input High Voltage for AIN  
Input Low Voltage for AIN  
300  
-10  
1
¾
¾
-0.6  
10  
-2.0  
30  
¾
¾
1.9  
0
3.0  
0.8  
3.0  
0.6  
3.0  
0.6  
400  
250  
320  
1500  
¾
¾
¾
¾
¾
¾
¾
V
¾
1.6  
0
V
¾
V
¾
1.5  
0
V
¾
V
¾
VIN=0V  
VIN=3V  
VIN=3V  
VIN=3V  
Input Pull-high Resistance for AIN  
Input Pull-low Resistance for AIN  
Input Pull-low Resistance for R1~R8  
Input Pull-low Resistance for C1~C8  
100  
70  
200  
150  
200  
500  
kW  
kW  
kW  
kW  
120  
300  
450.45 455 459.55 kHz  
445.90 455 464.10 kHz  
Ta=25°C  
3V  
fOSC  
System Frequency  
2.0V~  
3.6V  
0°C < Ta < 70°C  
Note: fOSC specification is guaranteed by design under 0°C < Ta < 70°C and not subject to production testing.  
Rev. 1.10  
3
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
Functional Description  
Keyboard Scan  
·
The HT6222A keyboard form  
The devices remain in the halt mode during the standby  
state (at this time, the oscillator stops, and the standby  
current<1mA). The HT6220A consists of 30 active keys,  
HT6221A has 32 active keys, HT6221B has 48 active  
keys, and the HT6222A has 64 active keys. The key-  
board forms of the devices are shown below.  
C
1
C
2
C
3
C
4
C
5
C
6
K
K
K
K
1
2
3
4
K
K
K
K
5
6
7
8
K
9
K
K
K
K
K
K
K
K
1
1
1
1
4
4
4
4
3
4
5
6
5
6
7
8
K
K
K
K
K
K
K
K
1
1
1
2
4
5
5
5
7
8
9
0
K
K
K
K
K
K
K
K
2
2
2
2
5
5
5
5
1
2
3
4
3
4
5
6
K
K
K
K
K
K
K
K
2
2
2
2
5
5
5
6
5
6
7
8
7
8
9
0
K
K
K
K
K
K
K
K
2
3
3
3
6
6
6
6
9
0
1
2
1
2
3
4
1
2
3
4
5
6
7
8
K
K
K
K
K
K
K
1
1
1
4
4
4
4
0
1
2
1
2
3
4
·
The HT6220A keyboard form  
K
K
K
K
3
3
3
3
3
4
5
6
K
K
K
K
3
3
3
4
7
8
9
0
9
C
1
C
2
C
3
C
5
C
4
0
1
2
K
K
K
K
1
2
3
4
K
K
K
K
5
6
7
8
K
9
K
K
K
K
K
K
1
1
1
1
4
4
3
4
5
6
5
6
K
K
K
K
K
K
1
1
1
2
4
5
7
8
9
0
9
0
R
R
R
R
R
R
1
2
3
4
5
6
K
K
K
K
K
1
1
1
4
4
0
1
2
1
2
When one of the keys (30, 32, 48 or 64 keys) is triggered  
for over 36ms, the oscillator is enabled and the chip is acti-  
vated. If the key is pressed and held for 108ms or less, the  
108ms transmission codes are enabled and comprised of  
a header code (9ms), an off code (4.5ms), low byte ad-  
dress codes (9ms~18ms), high byte address codes  
(9ms~18ms), 8-bit data codes (9ms~18ms), and the in-  
verse codes of the 8-bit data codes (18ms~9ms). After the  
pressed key is held for 108ms, if the key is still held down,  
the transmission codes turn out to be a composition of  
header (9ms) and off codes (2.24ms) only.  
K
K
3
3
3
4
K
K
3
3
7
8
·
The HT6221A keyboard form  
C
1
C
2
C
3
C
C
5
4
C
6
C
7
R
R
R
R
1
2
3
4
K
K
K
K
1
2
3
4
K
K
K
K
5
6
7
8
K
9
K
K
K
K
1
1
1
1
3
4
5
6
K
K
K
K
1
1
1
2
7
8
9
0
K
K
K
K
2
2
2
2
1
2
3
4
K
K
K
K
2
2
2
2
5
6
7
8
K
K
K
K
2
3
3
3
9
0
1
2
K
K
K
1
1
1
0
1
2
To avoid mistakes made by keyboard scanning or simul-  
taneous two-key inputs (except for the three double-key  
active functions (K21+K22, K21+K23, and K21+K24),  
the devices are facilitated with 36ms starting time.  
·
The HT6221B keyboard form  
C
1
C
2
C
3
C
C
5
4
C
6
C
7
The HT6221A/HT6221B/HT6222A also provide three  
double-key active functions (K21+K22, K21+K23, and  
K21+K24) for tape deck recording operations. The dou-  
ble-key operation rules are shown in timing 4 and timing  
6.  
R
R
R
R
R
R
1
2
3
4
5
6
K
K
K
K
1
2
3
4
K
K
K
K
5
6
7
8
K
9
K
K
K
K
K
K
1
1
1
1
4
4
3
4
5
6
5
6
K
K
K
K
K
K
1
1
1
2
4
5
7
8
9
0
9
0
K
K
K
K
K
K
2
2
2
2
5
5
1
2
3
4
3
4
K
K
K
K
K
K
2
2
2
2
5
5
5
6
7
8
7
8
K
K
K
K
K
K
2
3
3
3
6
6
9
0
1
2
1
2
K
K
K
K
K
1
1
1
4
4
0
1
2
1
2
Transmission Codes  
K
K
3
3
3
4
K
K
3
3
7
8
The transmission codes of the devices consist of a 9ms  
header code, a 4.5ms off code, 16-bit address codes  
(18ms~36ms), 9ms~18ms 8-bit data codes, and the in-  
verse code of the 8-bit data codes. The following is an il-  
lustration of the transmission codes.  
K
e
y
-
i
n
K
e
y
E
n
a
b
l
e
s
(
K
1
~
K
6
4
)
3
6
m
s
m
i
n
.
I
R
C
F
o
s
c
=
4
5
5
k
H
z
4
.
5
m
s
0
.
5
6
m
s
0
.
5
6
m
s
3
8
k
H
z
,
D
O
U
T
3
3
%
d
u
t
y
c
a
r
r
i
e
r
4
5
m
s
~
6
3
m
s
2
.
2
4
m
s
2
.
2
4
9
m
s
9
m
s
9
m
s
(
A
0
~
A
1
5
+
D
0
~
D
7
+
D
0
~
D
7
)
1
0
8
m
s
1
0
8
m
s
Timing 1. Output Format for the DOUT  
Rev. 1.10  
4
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
The output code carrier of the DOUT pin is shown in Timing 2.  
3
8
k
H
z
C
a
r
r
i
e
r
8
.
m
7
s
7
2
6
m
s
.
3
Timing 2. 38kHz Carrier  
The transmission codes employ the PPM (Pulse Position Modulation) method to represent their two logic states by ²0²  
(1.12ms) and ²1² (2.24ms) as shown in Timing 3.  
3
8
k
H
z
c
a
r
r
i
e
r
"
Z
e
r
o
"
0
.
5
6
m
s
d
a
t
a
p
e
r
i
o
d
(
1
.
1
2
m
s
)
3
8
k
H
z
c
a
r
r
i
e
r
"
O
n
e
"
d
a
t
a
p
e
r
i
o
d
(
2
.
2
4
m
s
)
Timing 3. Logic States  
·
Setting the address codes (A0~A15)  
the external switch S0~S7 and the ROM1. The  
A8~A15 equal some bits inverted to A0~A7, the inver-  
sion are decided by Logical OR between the external  
switch S8~S15 and the ROM2.  
The algorithm rule of the address codes (A0~A15) can  
be selected by mask option.  
In this case, the 16-bit on-chip MASK ROM (ROM1  
and ROM2) are available, and the value of ROM1 (8  
bits) and ROM2 (8 bits) are decided by one MASK  
LAYER. The current value of ROM1 and ROM2 are  
both ²00H². The A0~A7 are set by logical OR between  
For example:  
The following is an illustration of these rules in selecting  
the address codes (A0~A15).  
H
T
6
2
2
0
A
A
I
N
C
1
C
2
C
3
C
C
5
4
2
W
´
S
8
S
9
S
1
0
S
S
1
1
1
2
1
N
4
´
5
1
4
8
S
0
S
1
S
2
S
3
S
4
(
S
w
i
t
c
h
O
p
e
n
:
0
,
S
w
i
t
c
h
C
l
o
s
e
F
i
l
l
w
i
t
h
z
e
r
o
a
u
t
o
m
a
t
1
0
0
:
0
0
0
0
0
0
0
0
E
x
t
e
r
n
a
l
S
w
i
t
c
h
S
0
~
S
7
S
0
S
1
S
S
2
4
S
3
S
8
S
9
S
S
1
1
0
2
S
1
1
0
0
0
O
n
-
c
h
i
p
R
O
M
1
,
R
O
M
2
:
b
i
t
0
b
i
t
7
b
i
t
0
b
i
t
7
S
0
~
S
4
O
R
R
O
M
1
A
0
~
A
1
7
:
0
0
0
0
0
A
0
A
1
A
A
2
2
A
A
3
3
A
A
4
4
A
A
5
5
A
A
6
6
A
A
7
7
S
8
~
S
1
2
O
R
R
O
M
2
A
8
'
~
A
1
5
'
:
1
0
1
0
A
0
A
1
C
1
0
o
m
p
l
e
m
e
n
t
A
8
~
A
1
1
5
:
1
0
1
1
1
:
n
o
n
i
n
v
e
r
s
i
o
n
:
i
n
v
e
r
s
i
o
n
Rev. 1.10  
5
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
H
T
6
2
2
1
A
/
H
T
6
2
2
1
B
/
H
T
6
2
2
2
A
A
I
N
C
1
C
2
C
3
C
4
C
5
C
6
C
7
C
8
2
W
´
S
8
S
9
S
1
0
S
1
1
S
1
2
S
1
3
S
1
4
S
1
5
1
N
4
´
8
1
4
8
S
0
S
1
S
2
S
3
S
4
S
5
S
6
S
7
(
S
w
i
t
c
h
O
p
e
n
:
0
,
S
w
i
t
c
h
C
l
o
s
e
:
1
)
1
0
0
0
0
1
0
1
0
0
0
E
x
t
e
r
n
a
l
S
w
i
t
c
h
S
0
~
S
1
5
:
S
0
S
1
S
S
2
4
S
S
3
5
S
6
S
S
8
7
S
9
S
S
1
1
0
2
S
S
1
1
1
3
S
1
4
S
1
5
0
0
0
O
n
-
c
h
i
p
R
O
M
1
,
R
O
M
2
:
b
i
t
0
b
i
t
7
b
i
t
0
b
i
t
7
S
0
~
S
7
O
R
R
O
M
1
A
0
~
A
1
7
:
0
0
0
1
1
A
0
A
1
A
A
2
2
A
A
3
3
A
A
4
4
A
A
5
5
A
A
6
6
A
A
7
7
S
8
~
S
1
5
O
R
R
O
M
2
A
8
'
~
A
1
5
'
:
1
0
1
0
A
0
A
1
C
1
0
o
m
p
l
e
m
e
n
t
A
8
~
A
1
1
5
:
1
0
1
1
1
0
1
:
n
o
n
i
n
v
e
r
s
i
o
n
:
i
n
v
e
r
s
i
o
n
Rev. 1.10  
6
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
·
Values of the data codes (D0~D7)  
Table 3: Double-key data code table  
The HT6220A/HT6221A/HT6221B/HT6222A contain  
30, 32, 48 and 64 active keys, respectively. Each key  
corresponds to a data code. For tape deck recording,  
the HT6221A/HT6221B/HT6222A provide three dou-  
ble-key functions. The double-key, single-key, and  
double-key operation rules are shown in Table 3, Ta-  
ble 4, Timing 4, Timing 5 and Timing 6.  
Data Codes  
KEY  
Data Code D7  
D0~D6  
1010110  
0110110  
1110110  
K21 + K22  
K21 + K23  
K21 + K24  
0/1  
0/1  
0/1  
Note: D7 is defined by an external switch  
Table 4: K1~K64 single-key data code table  
Data Codes  
D0~D6  
Data Code  
Data Codes  
D0~D6  
Data Code  
KEY  
KEY  
D7  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
D7  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
0/1  
K1  
K2  
0000 000  
1000 000  
0100 000  
1100 000  
0010 000  
1010 000  
0110 000  
1110 000  
0001 000  
1001 000  
0101 000  
1101 000  
0011 000  
1011 000  
0111 000  
1111 000  
0000 100  
1000 100  
0100 100  
1100 100  
0010 100  
1010 100  
0110 100  
1110 100  
0001 100  
1001 100  
0101 100  
1101 100  
0011 100  
1011 100  
0111 100  
1111 100  
K33  
K34  
K35  
K36  
K37  
K38  
K39  
K40  
K41  
K42  
K43  
K44  
K45  
K46  
K47  
K48  
K49  
K50  
K51  
K52  
K53  
K54  
K55  
K56  
K57  
K58  
K59  
K60  
K61  
K62  
K63  
K64  
0000 001  
1000 001  
0100 001  
1100 001  
0010 001  
1010 001  
0110 001  
1110 001  
0001 001  
1001 001  
0101 001  
1101 001  
0011 001  
1011 001  
0111 001  
1111 001  
0000 101  
1000 101  
0100 101  
1100 101  
0010 101  
1010 101  
0110 101  
1110 101  
0001 101  
1001 101  
0101 101  
1101 101  
0011 101  
1011 101  
0111 101  
1111 101  
K3  
K4  
K5  
K6  
K7  
K8  
K9  
K10  
K11  
K12  
K13  
K14  
K15  
K16  
K17  
K18  
K19  
K20  
K21  
K22  
K23  
K24  
K25  
K26  
K27  
K28  
K29  
K30  
K31  
K32  
Note: D7 is defined by an external switch  
D7=0 : connect to VDD  
D7=1 : connect to VSS  
Rev. 1.10  
7
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
K
2
1
I
n
p
u
t
K
2
1
K
m
I
n
p
u
t
K
m
3
6
m
s
<
t
<
1
3
2
6
6
m
m
s
s
3
6
m
s
1
0
8
m
s
(
m
i
n
.
n
)
D
O
U
T
K
2
1
c
o
d
e
t
r
a
s
m
i
s
s
i
o
n
(
a
)
K
2
1
I
n
p
u
t
K
2
1
K
m
I
n
p
u
t
K
m
0
<
t
<
3
6
m
s
N
o
t
r
a
n
s
m
i
s
s
i
o
n
D
O
U
T
(
b
)
K
2
1
I
n
p
u
t
K
2
1
0
<
t
<
3
6
m
s
K
m
I
n
p
u
t
K
m
N
o
t
r
a
n
s
m
i
s
s
i
o
n
D
O
U
T
(
c
)
K
2
1
I
n
p
u
t
K
2
1
K
m
I
n
p
u
t
K
3
m
3
6
m
s
<
t
<
1
2
6
6
m
m
s
s
3
6
m
s
1
0
8
m
s
(
m
i
n
.
)
D
O
U
T
K
m
c
o
d
e
t
r
a
n
s
m
i
s
s
i
o
n
(
d
)
Timing 4. Invalid Double-Key Input  
K
n
I
n
p
u
t
K
n
3
6
m
s
t
>
1
0
8
m
s
D
O
U
T
K
n
c
o
d
e
t
r
a
n
s
m
i
s
s
i
o
n
(
a
)
K
n
I
n
p
u
t
K
n
t
<
1
0
8
m
s
1
0
8
m
s
3
6
m
s
D
O
U
T
K
n
c
o
d
e
t
r
a
n
s
m
i
s
s
i
o
n
(
b
)
Note: Kn can be one of K1~K64  
Timing 5. Valid Single-Key Input  
Rev. 1.10  
8
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
K
2
1
I
n
p
u
t
K
2
1
K
m
I
n
p
u
t
K
m
3
6
m
s
3
6
m
s
t
>
1
2
6
m
s
1
0
8
m
s
(
m
i
n
.
)
K
2
1
+
K
m
c
o
d
e
D
O
U
T
K
2
1
c
o
d
e
t
r
a
n
s
m
i
s
s
i
o
n
i s  
t
r
a
n
s
m
s
i
o
n
Note: Km can be one of K22~K24  
Timing 6. Valid Double-Key Input  
DOUT and IR LED  
IRC  
After the transmission codes are sent, the DOUT pin  
generates transmission codes with a carrier, and the  
IR-LED goes low to drive a transmission indicator. The  
DOUT pin abbreviate exterior transistor, to provide large  
current driving ability.  
The frequency of the internal RC(IRC) oscillator is de-  
pending on the temperature and operating voltage.  
At Ta=25°C at 3.0V, the IRC has an accuracy of ±1 per  
cent. In the range of 0°C to 70°C at 2.0V~3.6V, the accu-  
racy value of the RC frequency increases to the maxi-  
mum value of ±2 per cent.  
Application Circuits  
HT6220A Application Circuit  
V
D
D
4
m
7
F
/
1
6
V
3
3
W
0
I
n
f
r
a
r
e
d
L
E
D
4
.
W
7
6
5
D
O
U
T
V
D
D
8
7
H
T
6
2
2
0
A
V
S
S
D
7
C
1
C
2
C
3
C
5
C
4
R
2
R
R
1
3
R
4
R
A
5
I
N
R
6
1
3
1
2
1
1
9
1
0
1
5
1
6
1
2
3
4
2
W
´
K
K
K
K
1
2
3
4
K
5
6
7
8
K
9
K
K
K
K
K
K
1
1
1
1
4
4
K
K
K
K
K
K
3
4
5
6
5
6
1
1
1
2
4
5
7
8
9
0
9
0
K
K
K
K
K
K
1
1
1
4
4
0
1
2
1
2
K
K
K
K
3
3
K
K
3
4
3
3
7
8
1
N
4
´
5
1
4
8
Note: Typical infrared diode: EL-1L2 (KODENSHI CORP.)  
Rev. 1.10  
9
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
HT6221A Application Circuit  
V
D
D
4
m
7
F
/
1
6
V
I
n
f
r
a
r
e
d
1
W
k
L
E
D
4
.
W
7
1
1
6
5
D
O
U
T
L
E
D
V
D
D
7
1
0
H
T
6
2
2
1
A
D
7
V
S
S
C
1
C
2
C
3
C
C
4
6
C
C
5
7
C
8
R
1
R
A
2
I
N
R
3
R
4
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
2
3
2
W
´
K
K
K
K
1
2
3
4
K
K
K
K
5
6
7
8
K
9
K
K
K
K
1
1
1
1
K
K
K
K
3
4
5
6
1
1
1
2
K
K
K
K
7
8
9
0
2
2
2
2
K
K
K
K
1
2
3
4
2
2
2
2
K
K
K
K
5
6
7
8
2
3
3
3
9
0
1
2
K
K
K
1
1
1
0
1
2
1
N
4
´
8
1
4
8
Note: Typical infrared diode: EL-1L2 (KODENSHI CORP.)  
Rev. 1.10  
10  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
HT6221B Application Circuit  
V
D
D
4
m
7
F
/
1
6
V
I
n
f
r
a
r
e
d
1
W
k
L
E
D
4
.
W
7
1
1
6
5
D
O
U
T
L
E
D
V
D
D
7
1
0
H
T
6
2
2
1
B
D
7
V
S
S
C
1
C
2
C
3
C
C
4
6
C
C
5
7
C
8
R
1
R
R
2
5
R
R
3
A
6
I
R
N
4
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
8
1
9
2
2
0
3
4
2
W
´
K
K
K
K
1
2
3
4
K
5
6
7
8
K
9
K
K
K
K
K
K
1
1
1
1
4
4
K
K
K
K
K
K
3
4
5
6
5
6
1
1
1
2
4
5
K
K
K
K
K
K
7
8
9
0
9
0
2
2
2
2
5
5
K
K
K
K
K
K
1
2
3
4
3
4
2
2
2
2
5
5
K
K
K
K
K
K
5
6
7
8
7
8
2
3
3
3
6
6
9
0
1
2
1
2
K
K
K
K
K
K
1
1
1
4
4
0
1
2
1
2
K
K
K
K
3
3
K
K
3
4
3
3
7
8
1
N
4
´
8
1
4
8
Note: Typical infrared diode: EL-1L2 (KODENSHI CORP.)  
Rev. 1.10  
11  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
HT6222A Application Circuit  
V
D
D
4
m
7
F
/
1
6
V
I
n
f
r
a
r
e
d
1
W
k
L
E
D
4
.
W
7
1
3
8
7
D
O
U
T
L
E
D
V
D
D
1
2
9
D
7
H
T
6
2
2
2
A
V
S
S
C
1
C
2
C
3
C
C
4
6
C
C
5
7
R
C
1
8
R
2
R
3
R
5
R
4
R
6
R
A
7
I
N
R
8
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
2
3
2
4
1
2
2
W
´
K
K
K
K
1
2
3
4
K
K
K
K
5
6
7
8
K
9
K
K
K
K
K
K
K
K
1
1
1
1
4
4
4
4
K
K
K
K
K
K
K
K
3
4
5
6
5
6
7
8
1
1
1
2
4
5
5
5
K
K
K
K
K
K
K
K
7
8
9
0
9
0
1
2
2
2
2
2
5
5
5
5
K
K
K
K
K
K
K
K
1
2
3
4
3
4
5
6
2
2
2
2
5
5
5
6
K
K
K
K
K
K
K
K
5
6
7
8
7
8
9
0
2
3
3
3
6
6
6
6
9
0
1
2
1
2
3
4
K
K
K
K
K
K
K
1
1
1
4
4
4
4
0
1
2
1
2
3
4
K
K
K
K
3
3
3
3
K
K
K
K
3
4
5
6
3
3
3
4
7
8
9
0
1
N
4
´
8
1
4
8
Note: Typical infrared diode: EL-1L2 (KODENSHI CORP.)  
Rev. 1.10  
12  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
Package Information  
16-pin NSOP (150mil) Outline Dimensions  
1
6
9
8
A
B
1
C
C
'
G
H
D
a
F
E
·
MS-012  
Dimensions in inch  
Symbol  
Min.  
0.228  
0.150  
0.012  
0.386  
¾
Nom.  
¾
Max.  
0.244  
0.157  
0.020  
0.402  
0.069  
¾
A
B
C
C¢  
D
E
F
¾
¾
¾
¾
0.050  
¾
¾
0.004  
0.016  
0.007  
0°  
0.010  
0.050  
0.010  
8°  
G
H
a
¾
¾
¾
Dimensions in mm  
Nom.  
Symbol  
Min.  
5.79  
3.81  
0.30  
9.80  
¾
Max.  
6.20  
3.99  
0.51  
10.21  
1.75  
¾
A
B
C
C¢  
D
E
F
¾
¾
¾
¾
¾
1.27  
¾
¾
0.10  
0.41  
0.18  
0°  
0.25  
1.27  
0.25  
8°  
G
H
a
¾
¾
¾
Rev. 1.10  
13  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
20-pin SOP (300mil) Outline Dimensions  
2
0
1
1
A
B
1
1
0
C
C
'
G
H
D
a
E
F
·
MS-013  
Dimensions in inch  
Symbol  
Min.  
0.393  
0.256  
0.012  
0.496  
¾
Nom.  
¾
Max.  
0.419  
0.300  
0.020  
0.512  
0.104  
¾
A
B
C
C¢  
D
E
F
¾
¾
¾
¾
0.050  
¾
¾
0.004  
0.016  
0.008  
0°  
0.012  
0.050  
0.013  
8°  
G
H
a
¾
¾
¾
Dimensions in mm  
Nom.  
Symbol  
Min.  
9.98  
6.50  
0.30  
12.60  
¾
Max.  
10.64  
7.62  
0.51  
13.00  
2.64  
¾
A
B
C
C¢  
D
E
F
¾
¾
¾
¾
¾
1.27  
¾
¾
0.10  
0.41  
0.20  
0°  
0.30  
1.27  
0.33  
8°  
G
H
a
¾
¾
¾
Rev. 1.10  
14  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
24-pin SOP (300mil) Outline Dimensions  
2
4
1
3
A
B
1
1
2
C
C
'
G
H
D
a
E
F
·
MS-013  
Dimensions in inch  
Symbol  
Min.  
0.393  
0.256  
0.012  
0.598  
¾
Nom.  
¾
Max.  
0.419  
0.300  
0.020  
0.613  
0.104  
¾
A
B
C
C¢  
D
E
F
¾
¾
¾
¾
0.050  
¾
¾
0.004  
0.016  
0.008  
0°  
0.012  
0.050  
0.013  
8°  
G
H
a
¾
¾
¾
Dimensions in mm  
Nom.  
Symbol  
Min.  
9.98  
6.50  
0.30  
15.19  
¾
Max.  
10.64  
7.62  
0.51  
15.57  
2.64  
¾
A
B
C
C¢  
D
E
F
¾
¾
¾
¾
¾
1.27  
¾
¾
0.10  
0.41  
0.20  
0°  
0.30  
1.27  
0.33  
8°  
G
H
a
¾
¾
¾
Rev. 1.10  
15  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
Product Tape and Reel Specifications  
Reel Dimensions  
D
T
2
C
A
B
T
1
SOP 16N (150mil)  
Symbol  
Description  
Dimensions in mm  
330.0±1.0  
A
B
Reel Outer Diameter  
Reel Inner Diameter  
Spindle Hole Diameter  
Key Slit Width  
100.0±1.5  
+0.5/-0.2  
13.0  
C
D
2.0±0.5  
+0.3/-0.2  
16.8  
T1  
T2  
Space Between Flange  
Reel Thickness  
22.2±0.2  
SOP 20W, SOP 24W  
Symbol  
Description  
Reel Outer Diameter  
Reel Inner Diameter  
Dimensions in mm  
330.0±1.0  
A
B
100.0±1.5  
+0.5/-0.2  
13.0  
C
Spindle Hole Diameter  
Key Slit Width  
D
2.0±0.5  
+0.3/-0.2  
24.8  
T1  
T2  
Space Between Flange  
Reel Thickness  
30.2±0.2  
Rev. 1.10  
16  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
Carrier Tape Dimensions  
P
0
P
1
t
D
E
F
W
B
0
C
D
1
P
K
0
A
0
R
e
e
l
H
o
l
e
I
C
p
a
c
k
a
g
e
p
i
n
1
a
n
d
t
h
a
r
e
l
o
c
a
t
e
d
o
n
t
h
e
s
a
m
e
SOP 16N (150mil)  
Symbol  
Description  
Dimensions in mm  
16.0±0.3  
W
P
Carrier Tape Width  
Cavity Pitch  
8.0±0.1  
E
Perforation Position  
1.75±0.1  
F
Cavity to Perforation (Width Direction)  
Perforation Diameter  
Cavity Hole Diameter  
Perforation Pitch  
7.5±0.1  
+0.10/-0.00  
D
1.55  
+0.25/-0.00  
D1  
P0  
P1  
A0  
B0  
K0  
t
1.50  
4.0±0.1  
2.0±0.1  
Cavity to Perforation (Length Direction)  
Cavity Length  
6.5±0.1  
Cavity Width  
10.3±0.1  
2.1±0.1  
Cavity Depth  
Carrier Tape Thickness  
Cover Tape Width  
0.30±0.05  
13.3±0.1  
C
SOP 20W  
Symbol  
Description  
Carrier Tape Width  
Dimensions in mm  
+0.3/-0.1  
24.0  
W
P
Cavity Pitch  
12.0±0.1  
1.75±0.10  
11.5±0.1  
E
Perforation Position  
Cavity to Perforation (Width Direction)  
Perforation Diameter  
Cavity Hole Diameter  
Perforation Pitch  
F
+0.1/-0.0  
D
1.5  
+0.25/-0.00  
D1  
P0  
P1  
A0  
B0  
K0  
t
1.50  
4.0±0.1  
2.0±0.1  
Cavity to Perforation (Length Direction)  
Cavity Length  
10.8±0.1  
13.3±0.1  
3.2±0.1  
Cavity Width  
Cavity Depth  
Carrier Tape Thickness  
Cover Tape Width  
0.30±0.05  
21.3±0.1  
C
Rev. 1.10  
17  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
SOP 24W  
Symbol  
Description  
Carrier Tape Width  
Dimensions in mm  
24.0±0.3  
W
P
Cavity Pitch  
12.0±0.1  
E
Perforation Position  
Cavity to Perforation (Width Direction)  
Perforation Diameter  
Cavity Hole Diameter  
Perforation Pitch  
1.75±0.1  
F
11.5±0.1  
+0.10/-0.00  
D
1.55  
+0.25/-0.00  
D1  
P0  
P1  
A0  
B0  
K0  
t
1.50  
4.0±0.1  
2.0±0.1  
Cavity to Perforation (Length Direction)  
Cavity Length  
10.9±0.1  
15.9±0.1  
3.1±0.1  
Cavity Width  
Cavity Depth  
Carrier Tape Thickness  
Cover Tape Width  
0.35±0.05  
21.3±0.1  
C
Rev. 1.10  
18  
June 1, 2010  
HT6220A/HT6221A/HT6221B/HT6222A  
Holtek Semiconductor Inc. (Headquarters)  
No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan  
Tel: 886-3-563-1999  
Fax: 886-3-563-1189  
http://www.holtek.com.tw  
Holtek Semiconductor Inc. (Taipei Sales Office)  
4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan  
Tel: 886-2-2655-7070  
Fax: 886-2-2655-7373  
Fax: 886-2-2655-7383 (International sales hotline)  
Holtek Semiconductor Inc. (Shenzhen Sales Office)  
5F, Unit A, Productivity Building, No.5 Gaoxin M 2nd Road, Nanshan District, Shenzhen, China 518057  
Tel: 86-755-8616-9908, 86-755-8616-9308  
Fax: 86-755-8616-9722  
Holtek Semiconductor (USA), Inc. (North America Sales Office)  
46729 Fremont Blvd., Fremont, CA 94538, USA  
Tel: 1-510-252-9880  
Fax: 1-510-252-9885  
http://www.holtek.com  
Copyright Ó 2010 by HOLTEK SEMICONDUCTOR INC.  
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek as-  
sumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used  
solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable  
without further modification, nor recommends the use of its products for application that may present a risk to human life  
due to malfunction or otherwise. Holtek¢s products are not authorized for use as critical components in life support devices  
or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information,  
please visit our web site at http://www.holtek.com.tw.  
Rev. 1.10  
19  
June 1, 2010  

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