ICS650-21 [ICSI]

System Peripheral Clock Source; 系统外设时钟源
ICS650-21
型号: ICS650-21
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

System Peripheral Clock Source
系统外设时钟源

时钟
文件: 总4页 (文件大小:66K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PRELIMINARY INFORMATION  
ICS650-21  
System Peripheral Clock Source  
Description  
Features  
The ICS650-21 is a low cost, low jitter, high  
performance clock synthesizer for system  
• Packaged in 20 pin tiny SSOP (QSOP)  
• Lower jitter version of ICS650-01  
Operating VDD of 3.3V or 5V  
• Zero ppm synthesis error in all clocks  
• Inexpensive 25 MHz crystal or clock input  
• Provides Ethernet and Fast Ethernet clocks  
• Provides SCSI clocks  
peripheral applications. Using analog/digital  
Phase-Locked Loop (PLL) techniques, the device  
accepts a parallel resonant 25 MHz crystal input to  
produce up to eight output clocks. The device  
provides clocks for PCI, SCSI, Fast Ethernet,  
Ethernet, USB, and AC97. The user can select one  
of three USB frequencies, and also one of two  
AC97 audio frequencies. The OE pin puts all  
outputs into a high impedance state for board level  
testing. All frequencies are generated with less than  
one ppm error, meeting the demands of SCSI and  
Ethernet clocking.  
• Provides PCI clocks  
• Selectable AC97 audio clock  
• Selectable USB clock  
• OE pin tri-states the outputs for testing  
• Selectable frequencies on three clocks  
• Duty cycle of 45/55 for Processor clock and Audio  
clock  
The ICS650 can be mask customized to produce  
any frequencies from 1 to 150 MHz.  
Block Diagram  
• Advanced, low power CMOS process  
Processor Clocks  
(Fast Ethernet,  
SCSI, PCI )  
3
Output  
Buffer  
2
PSEL1:0  
Output  
Buffer  
ASEL  
Audio Clock  
Clock  
Synthesis  
Circuitry  
Output  
Buffers  
USEL  
USB Clock  
25 MHz  
crystal  
or clock  
X1/ICLK  
Output  
Buffers  
20 MHz  
25 MHz  
Crystal  
Oscillator  
Output  
Buffer  
X2  
Output Enable (all outputs)  
MDS 650-21 A  
1
Revision 010301  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com  
PRELIMINARY INFORMATION  
ICS650-21  
System Peripheral Clock Source  
Pin Assignment  
Processor Clock (MHz)  
PSEL1 PSEL0  
PCLK1  
25.00  
37.5  
66.66  
40.00  
33.3334  
20.00  
20.00  
20.00  
PCLK2,3  
50.00  
75.00  
133.33  
80.00  
66.6667  
40.00  
PSEL1  
USEL  
1
2
3
4
5
6
7
20  
0
0
0
0
M
1
19 PSEL0  
18 PCLK2  
X2  
X1/ICLK  
VDD  
M
M
M
1
0
M
1
PCLK3  
VDD  
17  
16  
0
33.3334  
66.6667  
VDD  
1
M
1
1
50  
100  
GND  
15  
14  
13  
12  
11  
ASEL  
USB Clock (MHz)  
USEL  
UCLK  
Audio Clock (MHz)  
GND  
ASEL  
ACLK  
49.152  
24.576  
14.318  
UCLK  
20M  
ACLK  
25M  
8
OFF/14.318M  
PCLK1  
OE  
0
M
1
0
M
1
12  
9
24  
48  
10  
0 = connect directly to ground, 1 = connect directly  
to VDD, M=leave unconnected (floating)  
20 pin (150 mil) SSOP  
Pin Descriptions  
Pin #  
Name  
USEL  
X2  
X1/ICLK  
VDD  
VDD  
GND  
UCLK  
20M  
ACLK  
25M  
Type Description  
1
2
3
4
5
6
7
I
XO  
XI  
P
P
P
UCLK Select pin. Determines frequency of USB clock per table above.  
Crystal connection. Connect to parallel mode 25 MHz crystal. Leave open for clock.  
Crystal connection. Connect to parallel mode 25 MHz crystal, or clock.  
Connect to VDD. Must be same value as other VDD. Decouple with pin 6.  
Connect to VDD. Must be same value as other VDD.  
Connect to ground.  
O
O
O
O
I
USB clock output per table above.  
Fixed 20 MHz output for Ethernet.  
AC97 Audio clock output per table above.  
Fixed 25 MHz reference output for Fast Ethernet.  
Output Enable. Tri-states all outputs when low.  
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
OE  
PCLK1  
OFF/14.318M  
GND  
O
O
P
PCLK output number 1 per table above.  
14.31818 MHz clock output only when ASEL=VDD.  
Connect to ground.  
ASEL  
VDD  
PCLK3  
PCLK2  
PSEL0  
PSEL1  
I
P
O
O
I
ACLK Select pin. Determines frequency of Audio clock per table above.  
Connect to VDD. Must be same value as other VDD. Decouple with pin 14.  
PCLK output number 3 per table above.  
PCLK output number 2 per table above.  
Processor Select pin #0. Determines frequencies on PCLKs 1-3 per table above.  
Processor Select pin #1. Determines frequencies on PCLKs 1-3 per table above.  
I
Key: I = Input; XO/XI = crystal connections; O = output; P = power supply connection  
MDS 650-21 A  
2
Revision 010301  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com  
PRELIMINARY INFORMATION  
ICS650-21  
System Peripheral Clock Source  
Electrical Specifications  
Parameter  
Conditions  
Minimum  
Typical  
Maximum Units  
ABSOLUTE MAXIMUM RATINGS (note 1)  
Supply voltage, VDD  
Referenced to GND  
7
VDD+0.5  
70  
V
V
C
C
C
Inputs and Clock Outputs  
Ambient Operating Temperature  
Soldering Temperature  
Storage temperature  
Referenced to GND  
Max of 10 seconds  
-0.5  
0
260  
-65  
150  
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)  
Operating Voltage, VDD  
3.0  
2
5.5  
0.8  
0.4  
V
V
Input High Voltage, VIH  
Input Low Voltage, VIL  
Output High Voltage, VOH  
Output Low Voltage, VOL  
Select inputs, OE  
Select inputs, OE  
V
VDD=3.3V, IOH=-8mA  
VDD=3.3V, IOL=8mA  
2.4  
V
V
Output High Voltage, VOH, VDD = 3.3 or 5V IOH=-8mA  
VDD-0.4  
V
Operating Supply Current, IDD, at 5V  
Operating Supply Current, IDD, at 3.3V  
Short Circuit Current, VDD = 3.3  
Input Capacitance  
No Load, note 2  
No Load, note 2  
Each output  
50  
30  
±50  
5
mA  
mA  
mA  
pF  
Except X1  
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)  
Input Crystal or Clock Frequency  
25.000  
MH z  
ppm  
ns  
Output Clocks Accuracy (synthesis error)  
Output Clock Rise Time  
All clocks  
1
0.8 to 2.0V  
2.0 to 0.8V  
At VDD/2  
At VDD/2  
1.5  
1.5  
60  
55  
Output Clock Fall Time  
ns  
Output Clock Duty Cycle, UCLCK  
Output Clock Duty Cycle, PCLCK, ACLCK  
One Sigma Jitter, except ACLK  
One Sigma Jitter, ACLK  
40  
45  
50  
50  
%
%
75  
ps  
120  
ps  
Absolute Clock Period Jitter PCLK, UCLK, 20M  
- 500  
500  
ps  
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged  
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.  
2. With all clocks at highest frequencies.  
External Components  
The ICS650 requires a minimum number of external components for proper operation. Decoupling  
capacitors of 0.1µF should be connected between VDD and GND (on pins 4 and 6, and pins 16 and 14),  
as close to the chip as possible. A series termination resistor of 33Wmay be used for each clock output. The  
25.000 MHz crystal must be connected as close to the chip as possible. The crystal should be a fundamental  
mode, parallel resonant, 30ppm or better (to meet the Ethernet specs). Crystal capacitors should be  
connected from pins X1 to ground and X2 to ground. The value of these capacitors is given by the  
following equation, where C is the crystal load capacitance: Crystal caps (pF) = (C -12) x 2. So for a  
L
L
crystal with 16pF load capacitance, two 8pF caps should be used. If a clock input is used, drive it into X1  
and leave X2 unconnected.  
MDS 650-21 A  
3
Revision 010301  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com  
PRELIMINARY INFORMATION  
ICS650-21  
System Peripheral Clock Source  
Package Outline and Package Dimensions  
(For current dimensional specifications, see JEDEC Publication No. 95.)  
20 pin SSOP  
Inches  
Symbol Min  
Millimeters  
Max  
Min  
1.35  
0.10  
0.20  
0.18  
8.55  
Max  
A
A1  
b
0.053 0.069  
0.004 0.010  
0.008 0.012  
0.007 0.010  
0.337 0.344  
.025 BSC  
1.75  
0.25  
0.30  
0.25  
8.75  
E1  
E
c
D
e
0.635 BSC  
INDEX  
AREA  
E
0.228 0.244  
0.150 0.157  
0.016 0.050  
5.80  
3.80  
0.40  
6.20  
1
2
E1  
L
4.00  
1.27  
D
A
A1  
c
b
L
e
Ordering Information  
Part/Order Number  
ICS650R-21  
Marking  
Package  
Shipping  
Tubes  
Temperature  
0 to 70° C  
ICS650R-21  
ICS650R-21  
ICS650R-21I  
ICS650R-21I  
20 pin SSOP  
20 pin SSOP  
20 pin SSOP  
20 pin SSOP  
ICS650R-21T  
ICS650R-21I  
Tape and Reel 0 to 70° C  
Tubes -40 to 85° C  
Tape and Reel -40 to 85° C  
ICS650R-21IT  
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its  
use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is  
intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary  
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does  
not authorize or warrant any ICS product for use in life support devices or critical medical instruments.  
MDS 650-21 A  
4
Revision 010301  
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com  

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