ICS650R-05 [ICSI]
HDTV Clock Synthesizer; HDTV时钟合成器
| 型号： | ICS650R-05 |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | HDTV Clock Synthesizer |
| 文件： | 总4页 (文件大小：63K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY INFORMATION
PRELIMINARY INFORMATION
ICS650-05
HDTV Clock Synthesizer
Description
Features
The ICS650-05 is a low cost, low jitter, high
performance clock synthesizer designed to
produce 74.175824 MHz and 74.250000 MHz as
necessary for HDTV applications. Using our
patented analog Phase-Locked Loop (PLL)
techniques, the device uses a 27.0 MHz clock or
fundamental crystal input to produce buffered,
fixed clocks and a selectable frame rate clock for
HDTV systems.
• Packaged in 20 pin tiny SSOP (QSOP)
• Input Frequency of 27.0 MHz
• Zero ppm synthesis error in output clocks
• Provides fixed 13.5 MHz, dual 27.0 MHz, and
54.0 MHz output clocks with a selectable Frame
Rate Clock of 74.175824 MHz or
74.250000 MHz
• Ideal for HDTV applications
• 3.3 V or 5.0 V operating voltage
Block Diagram
Output
FRCLK
Buffer
Clock
Synthesis
and
Control
Circuit
Output
54.0 MHz
Buffer
FRS
Output
13.5 MHz
Buffers
Input
Buffer/Crystal
Oscillator
Output
Buffers
27.0 MHz
27.0 MHz
Output
27.0 MHz
Buffer
OE (all outputs)
MDS 650-05 A
1
Revision 081199
Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax
PRELIMINARY INFORMATION
PRELIMINARY INFORMATION
ICS650-05
HDTV Clock Synthesizer
Pin Assignment
VDD
X2
20 VDD
19 OE
1
2
3
4
5
6
7
X1/ICLK
18 FRS
FRCLK Output Select Table (in MHz)
VDD
VDD
GND
NC
17 FRCLK
FRS Pin 18
FRCLK Pin 17
74.175824
0
1
16
15
14
13
12
11
VDD
GND
GND
54M
74.250000
27M
8
9
27M
13.5M
GND
10
GND
20 pin SSOP (QSOP)
Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
Name
VDD
X2
X1/ICLK
VDD
VDD
GND
NC
Type Description
P
XO
XI
P
P
P
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Crystal connection to a 27.0 MHz crystal or leave unconnected for clock input
Crystal connection. Connect to a 27.0 MHz fundamental mode crystal or clock input.
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Connect to ground.
-
No Connect. Do not connect anything to this pin.
27 MHz buffered oscillator clock output.
13.5 MHz clock output.
27M
O
O
P
9
13.5M
GND
GND
27M
10
11
12
13
14
15
16
17
18
19
20
Connect to ground.
P
Connect to ground.
O
O
P
27 MHz buffered clock output.
54 MHz buffered clock output.
Connect to ground.
54M
GND
GND
VDD
FRCLK
FRS
P
Connect to ground.
P
O
I
I
P
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Frame Rate Clock as shown on table.
Frame Rate Frequency Select input pin. Determines FRCLK output as shown on table.
Output Enable. Tri-states all clocks when low.
Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
OE
VDD
Key: I = Input with internal pull-up; O = output; P = power supply connection; XI, XO = crystal
connections
MDS 650-05 A
2
Revision 081199
Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax
PRELIMINARY INFORMATION
PRELIMINARY INFORMATION
ICS650-05
HDTV Clock Synthesizer
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
7
VDD+0.5
70
V
V
°C
°C
°C
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Referenced to GND
Max of 10 seconds
-0.5
0
260
-65
150
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Operating Voltage, VDD
3.0
2
5.5
0.8
0.4
V
V
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output Low Voltage, VOL
FRS, OE
FRS, OE
V
VDD=3.3V, IOH=-8mA
VDD=3.3V, IOL=8mA
2.4
V
V
Output High Voltage, VOH, VDD = 3.3 or 5V IOH=-8mA
VDD-0.4
V
Operating Supply Current, IDD, at 5V
Operating Supply Current, IDD, at 3.3V
Short Circuit Current, VDD = 3.3 V
Input Capacitance
No Load
26
14
±50
7
mA
mA
mA
pF
No Load
Each output
Except X1
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Input Crystal or Clock Frequency
27
MH z
ppm
ns
Output Clocks Accuracy (synthesis error)
Output Clock Rise Time
All clocks
1
0.8 to 2.0V
2.0 to 0.8V
At VDD/2
1.5
1.5
60
Output Clock Fall Time
ns
Output Clock Duty Cycle
One Sigma Jitter, ACLK
40
50
100
40
%
VDD= 3.3 V
ps
VDD= 5.0 V
VDD= 3.3 V
VDD= 5.0 V
ps
Absolute Clock Period Jitter
±300
±200
ps
ps
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01 µF should be connected between VDD and GND on pins 4 and 6, and 16 and 14, and a 33 W
terminating resistor may be used on each clock output if the trace is longer than 1 inch.
MDS 650-05 A
3
Revision 081199
Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax
PRELIMINARY INFORMATION
PRELIMINARY INFORMATION
ICS650-05
HDTV Clock Synthesizer
Package Outline and Package Dimensions
20 pin SSOP
Millimeters
Symbol
Min
Max
1.73
A
b
1.55
0.203
0.190
8.560
3.810
5.840
0.305
0.254
8.740
4.000
6.200
E
H
c
D
E
H
e
0.635 BSC
0.410
h
h x 45°
L
Q
0.016
0.127
0.035
0.250
D
A
c
Q
b
L
e
Ordering Information
Part/Order Number
ICS650R-05
Marking
Package
Shipping
Tubes
Temperature
0 to 70 °C
ICS650R-05
ICS650R-05
20 pin SSOP
20 pin SSOP
ICS650R-05T
Tape and Reel 0 to 70 °C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its
use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is
intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does
not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 650-05 A
4
Revision 081199
Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax
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