ICS840-77 [ICSI]
77.76MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT; 77.76MHZ ， LVCMOS / LVTTL振荡器更换
| 型号： | ICS840-77 |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | 77.76MHZ, LVCMOS/LVTTL OSCILLATOR REPLACEMENT |
| 文件： | 总9页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
GENERAL DESCRIPTION
FEATURES
The ICS840-77 is a SONET Oscillator Replace- • One LVCMOS/LVTTL output, 15Ω output impedence
ICS
ment and a member of the HiPerClocksTM
• Crystal oscillator interface designed for 19.44MHz,
family of high performance devices from ICS.
18pF parallel resonant crystal
HiPerClockS™
The ICS840-77 uses a 19.44MHz crystal to
synthesize 77.76MHz. The ICS840-77 has
• Output frequency: 77.76MHz
• Random jitter: 2.82ps (typical)
• Deterministic jitter: 0.205ps (typical)
• 3.3V operating supply
excellent jitter performance. The ICS840-77 is packaged in
a small 8-pin TSSOP, making it ideal for use in systems with
limited board space.
• 0°C to 70°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
Pullup
OE
VDD
XTAL_OUT
XTAL_IN
OE
Q1
1
2
3
4
8
7
6
5
77.76MHz
Q0
Q0
VDDO
GND
19.44MHz
XTAL_IN
Clock
Synthesizer
ICS840-77
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
XTAL_OUT
Q1
Top View
ICS840-77
8-Lead SOIC
3.90mm x 4.92mm x 1.37mm body package
M Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
840AG-77
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REV.A NOVEMBER 7, 2005
1
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
VDD
Power
Input
Power supply pin.
XTAL_OUT,
XTAL_IN
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Output enable pin. When HIGH, outputs are enabled. When LOW,
forces outputs to HiZ state. LVCMOS/LVTTL interface levels.
2, 3
4
OE
Input
Pullup
5
6
GND
VDDO
Power
Power
Power supply ground.
Output supply pin.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
15Ω output impedence.
7, 8
Q0, Q1
Output
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
Test Conditions
Minimum
Typical Maximum Units
CIN
Input Capacitance
4
pF
kΩ
Ω
RPULLUP
ROUT
Input Pullup Resistor
Output Impedance
51
15
TABLE 3. CONTROL FUNCTIONT ABLE
Control Inputs
Output
Q0, Q1
Hi-Z
OE
0
1
Active
840AG-77
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REV.A NOVEMBER 7, 2005
2
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage, V
4.6V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Func-
tional operation of product at these conditions or any condi-
tions beyond those listed in the DC Characteristics or AC
Characteristics is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may affect prod-
uct reliability.
DD
Inputs, V
-0.5V to VDD + 0.5 V
-0.5V to VDDO + 0.5V
I
Outputs, VO
Package Thermal Impedance, θJA
8 Lead TSSOP
101.7°C/W (0 mps)
112.7°C/W (0 lfpm)
8 Lead SOIC
StorageTemperature, T
-65°C to 150°C
STG
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum
3.0
Typical
3.3
Maximum Units
VDD
VDDO
IDD
Power Supply Voltage
3.6
3.6
V
V
Output Supply Voltage
Power Supply Current
Output Supply Current
3.0
3.3
OE = VDD (output enabled)
TBD
TBD
mA
IDDO
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VIH
VIL
IIH
Input High Voltage
2
VDD + 0.3
V
V
Input Low Voltage
-0.3
0.8
5
Input High Current
VDD = VIN = 3.6V
µA
µA
V
IIL
Input Low Current
VDD = 3.6V, VIN = 0V
-150
2.6
VOH
VOL
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
0.5
V
NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Information Section,
"3.3V Output Load Test Circuit".
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Typical Maximum Units
Fundamental
19.44
TBD
Mode of Oscillation
Frequency
MHz
Ω
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
7
pF
TBD
µW
840AG-77
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REV.A NOVEMBER 7, 2005
3
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
TABLE 6. AC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = 0°C TO 70°C
Symbol Parameter
fOUT Output Frequency
tDJ
Test Conditions
Minimum Typical Maximum Units
77.76
0.205
2.82
MHz
ps
Deterministic Jitter; NOTE 1
Random Jitter; NOTE 1
tRJ
ps
RMS of Total Distribution (σ);
tRMS
tp-p
2.85
2.18
4.0
ps
ps
ps
NOTE 1
Peak-to-Peak Jitter; NOTE 1
Accumulated Jitter (σ);
NOTE 1
tacc
n = 2 to 50000 cycles
Time at minimum operating voltage
to be 0 s
tOSC
Oscillation Start Up Time
10
ms
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
650
50
ps
%
NOTE 1: Measured using Wavecrest SIA-3000.
840AG-77
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REV.A NOVEMBER 7, 2005
4
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
PARAMETER MEASUREMENT INFORMATION
1.65V 0.15V
VDDO
2
SCOPE
Q0, Q1
VDD,
VDDO
tPW
tPERIOD
Qx
LVCMOS
GND
tPW
tPERIOD
x 100%
odc =
-1.65V 0.15V
3.3V OUTPUT LOAD AC TEST CIRCUIT
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
80%
tF
80%
20%
20%
Clock
Outputs
tR
OUTPUT RISE/FALL TIME
840AG-77
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REV.A NOVEMBER 7, 2005
5
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
APPLICATION INFORMATION
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
INPUTS:
CRYSTAL INPUT:
OUTPUTS:
LVCMOS OUTPUT:
For applications not requiring the use of the crystal oscillator All unused LVCMOS output can be left floating.We recommend
input, both XTAL_IN and XTAL_OUT can be left floating.Though that there is no trace attached.
not required, but for additional protection, a 1kΩ resistor can be
tied from XTAL_IN to ground.
SELECT PINS:
All select pins have internal pull-ups and pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
CRYSTAL INPUT INTERFACE
The ICS840-77 has been characterized with 18pF parallel lel resonant crystal and were chosen to minimize the ppm error.
resonant crystals. The capacitor values, C1 and C2, shown in The optimum C1 and C2 values can be slightly adjusted for
Figure 1 below were determined using a 19.44MHz, 18pF paral- different board layouts.
XTAL_OUT
C1
12p
X1
18pF Parallel Cry stal
XTAL_IN
C2
12p
Figure 1. CRYSTAL INPUt INTERFACE
840AG-77
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REV.A NOVEMBER 7, 2005
6
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
RELIABILITY INFORMATION
TABLE 7A. θJAVS. AIR FLOWT ABLE FOR 8 LEAD TSSOP
θJA byVelocity (Meters per Second)
0
1
2.5
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
TABLE 7B. θJAVS. AIR FLOWT ABLE 8 LEAD SOIC
θJA by Velocity (Linear Feet per Minute)
0
200
128.5°C/W
103.3°C/W
500
115.5°C/W
97.1°C/W
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
153.3°C/W
112.7°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS840-77 is: 2423
840AG-77
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REV.A NOVEMBER 7, 2005
7
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - G SUFFIX FOR 8 LEAD TSSOP
PACKAGE OUTLINE - M SUFFIX FOR 8 LEAD SOIC
TABLE 8A. PACKAGE DIMENSIONS
TABLE 8B. PACKAGE DIMENSIONS
Millimeters
SYMBOL
Millimeters
SYMBOL
Minimum
Maximum
MINIMUM
MAXIMUM
N
A
8
N
A
A1
B
C
D
E
e
8
--
1.20
0.15
1.05
0.30
0.20
3.10
1.35
0.10
0.33
0.19
4.80
3.80
1.75
0.25
0.51
0.25
5.00
4.00
A1
A2
b
0.05
0.80
0.19
0.09
2.90
c
D
E
6.40 BASIC
0.65 BASIC
1.27 BASIC
E1
e
4.30
4.50
H
h
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
L
0.45
0°
0.75
8°
L
α
α
aaa
--
0.10
Reference Document: JEDEC Publication 95, MS-012
Reference Document: JEDEC Publication 95, MO-153
840AG-77
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REV.A NOVEMBER 7, 2005
8
PRELIMINARY
ICS840-77
77.76MHZ, LVCMOS/LVTTL
OSCILLATOR REPLACEMENT
Integrated
Circuit
Systems, Inc.
TABLE 9. ORDERING INFORMATION
Part/Order Number
ICS840AG-77
Marking
40A77
40A77
TBD
Package
8 lead TSSOP
Shipping Packaging Temperature
tube
2500 tape & reel
tube
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
ICS840AG-77T
ICS840AG-77LF
ICS840AG-77LFT
ICS840AM-77
8 lead TSSOP
8 lead "Lead-Free" TSSOP
8 lead "Lead-Free" TSSOP
8 lead SOIC
TBD
2500 tape & reel
tube
TBD
ICS840AM-77T
ICS840AM-77LF
ICS840AM-77LFT
TBD
8 lead SOIC
2500 tape & reel
tube
TBD
8 lead "Lead-Free" SOIC
8 lead "Lead-Free" SOIC
TBD
2500 tape & reel
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
840AG-77
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REV.A NOVEMBER 7, 2005
9
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