ICS9169AM-70 [ICSI]

Frequency Generator for Workstation Systems; 频率发生器的工作站系统
ICS9169AM-70
型号: ICS9169AM-70
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

Frequency Generator for Workstation Systems
频率发生器的工作站系统

晶体 外围集成电路 光电二极管 时钟
文件: 总7页 (文件大小:199K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Integrated  
Circuit  
Systems, Inc.  
ICS9169A-70  
Frequency Generator for Workstation Systems  
General Description  
Features  
9 PCI outputs selectable from 30 to 66.6MHz  
3 SCSI outputs, selectable from 10 to 80MHz  
TheICS9169A-70 isalow-costfrequencygeneratordesigned  
specifically for workstation or PC system clocks. The  
integrated buffer minimizes skew and provides all the clocks  
required. A 14.318 MHz XTAL oscillator provides the  
reference clock to generate standard Pentium frequencies.  
The CPU clock makes gradual frequency transitions without  
violating the PLL timing of internal microprocessor clock  
multipliers.  
500ps skew window for all synchronous clock edges  
Integrated buffer outputs drive up to 30pF loads  
500ps output to output skew window  
Buffers drive 30pF loads nominally 0.8V/ns skew rate  
3.0V-3.7Vsupplyrange  
32-pinSOICpackage  
48 MHz clock for USB support and 24 MHz clock  
for FD  
Pin Configuration  
Block Diagram  
32-Pin SOIC  
9169A-70RevB2/14/01  
ICS reserves the right to make changes in the device data identified in this  
publication without further notice. ICS advises its customers to obtain the latest  
version of all device data to verify that any information being relied upon by the  
customer is current and accurate.  
ICS9169A-70  
Pin Descriptions  
PIN NUMBER  
PIN NAME  
TYPE  
DESCRIPTION  
1
VDD1  
PWR  
Power for logic, PLL and output buffers.  
XTAL or external reference frequency input. This  
input includes XTAL load capacitance and feedback  
bias for a 12-16 MHz crystal, nominally 14.31818  
Mhz.  
2
3
X1  
X2  
IN  
XTAL output which includes XTAL load  
capacitance.  
OUT  
5,6,9,10,13,14,20,23,24 PCI(0:8)  
OUT  
PWR  
PWR  
PCI clock outputs  
4,7,11,19,22,25  
8,12,21  
GND  
Ground for logic, PLL and output buffers.  
Power for PCI clock outputs  
VDD3  
Frequency multiplier select pins. See table above.  
These inputs have internal pull up devices.  
15,16,17  
FS(0:2)A  
IN  
29  
VDD2  
PWR  
OUT  
Power for SCSI clock outputs  
SCSI clock outputs  
28,27,26  
SCSI (0:2)  
Frequency multiplier select pins. See table next  
page. These inputs have internal pull up devices  
31,30,18  
32  
FS(0:2)B  
REF0  
IN  
REF is a buffered copy of the crystal oscillator or  
reference input clock, nominally 14.31818 MHz.  
OUT  
Note:  
X1, X2 contain iternal 18pF crystal load cap. Intended to have external load  
caps of 15 to 18pF required for nominal crystal of 17 to 18pF crystal total load.  
2
ICS9169A-70  
VDD = 3.3 10ꢀ, TA = 0 to 70°C  
Crystal = 14.31818MHz  
SCSI outputs: SCSI(0:2)  
(Assume divide by 2 from VCO)  
Target Actual  
REF  
MHz  
FS2B  
FS1B  
FS0B  
MHz  
MHz  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
24  
48  
10  
20  
40  
50  
60  
80  
24  
14.318  
48.07  
10.02  
20.05  
40.09  
50.11  
60.14  
80.18  
14.318  
14.318  
14.318  
14.318  
14.318  
14.318  
14.318  
PCI outputs: PCI (0:8)  
(Assume divide by 2 from VCO)  
Target Actual  
MHz MHz  
REF  
MHz  
FS2A  
FS1A  
FS0A  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Tristate Tristate Tristate  
REF/2  
30  
REF/2  
30.07  
33.27  
50.11  
54.89  
60.14  
66.63  
REF  
14.318  
14.318  
14.318  
14.318  
14.318  
14.318  
33.3  
50  
55  
60  
66.6  
Note: When FS(0:2)A is 000 or 001, the Tristate and  
Test modes applies to all outputs for REF, PCI, and  
SCSI outputs.  
REF  
FS2A  
FS1A  
FS0A  
PCI  
SCSI  
0
0
0
0
0
1
Tristate Tristate Tristate  
REF/21 REF/21 REF1  
Note:1. InTestmode, eachPLLisbypassed.Theclock  
signal at X1 (externally driven clock or the  
crystal) is applied to the divider circuits.  
3
ICS9169A-70  
Absolute Maximum Ratings  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V  
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V  
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are  
stress specifications only and functional operation of the device at these or any other conditions above those listed in the  
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended  
periods may affect product reliability.  
Electrical Characteristics - Input/Supply/Common Output Parameters  
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-10% (unless otherwise stated)  
PARAMETER  
Input High Voltage  
Input Low Voltage  
Input High Current  
Input Low Current  
Supply Current  
SYMBOL  
VIH  
CONDITIONS  
MIN  
2.0  
-
TYP  
-
MAX UNITS  
-
0.9  
5
V
V
VIL  
-
IIH1  
VIN = VDD  
VIN = 0 V  
-5  
0.2  
mA  
mA  
mA  
MHz  
IIL1  
-20  
-50.0  
50  
-
IDD  
CL = 0 pF; Select @ 66M  
VDD = 3.3 V;  
110  
Input frequency  
Fi  
14.318  
Input Capacitance1  
CIN  
Logic Inputs  
5
pF  
pF  
CINX  
X1 & X2 pins  
27.0  
36.0  
0.136  
63.0  
1.7  
45.0  
Transition Time1  
Settling Time1  
Clock Overshoot1  
Clk Stabilization1  
Ttrans  
Ts  
To 1st crossing of target Freq.  
2.0  
600  
4.0  
3
mS  
µS  
From 1st crossing to 1% target Freq.  
Tsh  
MHz  
mS  
TSTAB  
From VDD = 3.3 V to 1% target Freq.  
1Guarenteed by design, not 100% tested in production.  
Electrical Characteristics - REF  
TA = 0 - 70C; VDD = VDDL = 3.3 V +/-10%; CL = 20 pF (unless otherwise stated)  
PARAMETER  
Output High Voltage  
Output Low Voltage  
Output High Current  
Output Low Current  
Rise Time  
SYMBOL  
VOH1  
CONDITIONS  
MIN  
2.4  
TYP MAX UNITS  
IOH = -14 mA  
IOL = 11 mA  
VOH = 2.0 V  
VOL = 0.8 V  
2.9  
0.3  
-43.0  
31.0  
0.7  
0.6  
53  
V
V
VOL1  
0.4  
IOH1  
23.0  
mA  
mA  
nS  
nS  
%
IOL1  
20.0  
1
tr5  
VOL = 0.8 V, VOH = 2.4 V  
VOH = 2.4 V, VOL = 0.8 V  
VT = 1.5 V  
1.5  
1.5  
60  
1
Fall Time  
tf5  
1
Duty Cycle  
dt5  
40  
-
1
Jitter  
tj1s5  
VT = 1.5 V  
182  
-
400  
700  
pS  
pS  
1
tjabs5  
VT = 1.5 V  
-700  
1Guarenteed by design, not 100% tested in production.  
4
ICS9169A-70  
Electrical Characteristics - SCSI  
TA = 0 - 70C; VDD = VDDL = 3.3 V +/-10%; CL = 20 pF (unless otherwise stated)  
PARAMETER  
SYMBOL  
VOH1  
CONDITIONS  
MIN  
2.4  
TYP  
MAX UNITS  
V
Output High Voltage  
Output Low Voltage  
Output High Current  
Output Low Current  
IOH = -14 mA  
IOL = 11 mA  
VOH = 2.0 V  
VOL = 0.8 V  
2.9  
0.3  
VOL1  
0.4  
V
IOH1  
-43.0  
31.0  
23.0  
mA  
mA  
IOL1  
20.0  
1
Rise Time  
Fall Time  
tr5  
VOL = 0.8 V, VOH = 2.4 V  
0.7  
0.6  
50  
-
1.5  
1.5  
nS  
nS  
%
1
tf5  
VOH = 2.4 V, VOL = 0.8 V  
1
Duty Cycle  
Skew (window)  
Jitter  
dt5  
VT = 1.5 V  
45  
-250  
-
55  
1
tsk1  
VT = 1.4 V  
250  
300  
150  
700  
400  
pS  
pS  
pS  
1
tj1s5  
VT = 1.5 V; Rs= 33; (10 to 24 MHz Clocks)  
VT = 1.5 V; Rs= 33; (40 to 80 MHz Clocks)  
VT = 1.5 V; Rs= 33; (10 to 24 MHz Clocks)  
VT = 1.5 V; Rs= 33; (40 to 80 MHz Clocks)  
200  
90  
-
1
tj1s5  
-
1
tjabs5  
-700  
-400  
1
tjabs5  
-
pS  
1Guarenteed by design, not 100% tested in production.  
Electrical Characteristics - PCI  
TA = 0 - 70C; VDD = 3.3 V +/-10%; CL = 30 pF (unless otherwise stated)  
PARAMETER  
SYMBOL  
VOH1  
CONDITIONS  
MIN  
2.4  
TYP  
2.9  
MAX UNITS  
V
Output High Voltage  
Output Low Voltage  
Output High Current  
Output Low Current  
IOH = -14 mA  
IOL = 11 mA  
VOH = 2.0 V  
VOL = 0.8 V  
VOL1  
0.3  
0.4  
V
IOH1  
-43.0  
31.0  
23.0  
mA  
mA  
IOL1  
20.0  
1
Rise Time  
Fall Time  
tr1  
VOL = 0.8 V, VOH = 2.4 V  
VOH = 2.4 V, VOL = 0.8 V  
VT = 1.4 V  
0.8  
0.9  
1.5  
1.5  
nS  
nS  
%
1
tf1  
1
Duty Cycle  
Skew (window)  
Jitter  
dt1  
45.0  
-250  
51.0  
55.0  
250  
150  
300  
1
tsk1  
VT = 1.4 V  
pS  
pS  
pS  
1
tj1s1  
VT = 1.5 V; Rs= 33  
VT = 1.5 V; Rs= 33  
88  
1
tjabs1  
-300  
1Guarenteed by design, not 100% tested in production.  
5
ICS9169A-70  
GeneralLayoutPrecautions:  
1) Use a ground plane on the top layer  
of the PCB in all areas not used by  
traces.  
2) Make all power traces and vias as  
wide as possible to lower inductance.  
Notes:  
1 All clock outputs should have series  
terminating resistor. Not shown in all  
places to improve readibility of  
diagram  
2 Optional EMI capacitor should be  
used on all CPU, SDRAM, and PCI  
outputs.  
3 Optional crystal load capacitors are  
recommended.  
CapacitorValues:  
C1, C2 : Crystal load values determined by user  
All unmarked capacitors are 0.01µF ceramic  
6
ICS9169A-70  
LEAD COUNT  
DIMENSONL  
32L  
.804  
SOIC Package  
Ordering Information  
ICS9169AM-70  
Example:  
ICS XXXX M - PPP  
Pattern Number (2 or 3 digit number for parts with ROM code patterns)  
Package Type  
M=SOIC  
Device Type (consists of 3 or 4 digit numbers)  
Prefix  
ICS, AV = Standard Device  
ICS reserves the right to make changes in the device data identified in this  
publication without further notice. ICS advises its customers to obtain the latest  
version of all device data to verify that any information being relied upon by the  
customer is current and accurate.  
7

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