74ALVCH162525PV [IDT]
SSOP-56, Tube;型号: | 74ALVCH162525PV |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | SSOP-56, Tube |
文件: | 总7页 (文件大小:83K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
3.3V CMOS 18-BIT REGIS-
TERED BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
AND BUS-HOLD
IDT74ALVC162525
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
This 18-bit registered bus transceiver is built using advanced dual metal
CMOStechnology.Dataflowineachdirectioniscontrolledbyoutput-enable
(OEABandOEBA)andclock-enable(CLKENABandCLKENBA)inputs.For
theA-to-Bdataflow,thedataflowsthroughasingleregister.TheB-to-Adata
canflowthroughafour-stagepipelineregisterpath,orthroughasingleregister
path,dependingonthestateoftheselect(SEL)input.Dataisstoredintheinternal
registersonthelow-to-hightransitionoftheclock(CLK)input,providedthatthe
appropriateCLKENinputsarelow.TheA-to-Bdatatransferissynchronized
totheCLKABinput,andB-to-AdatatransferissynchronizedwiththeCLK1BA
andCLK2BAinputs.
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• VCC = 2.5V ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
TheALVCH162525hasseriesresistorsinthedeviceoutputstructureofthe
“B”portwhichwillsignificantlyreducelinenoisewhenusedwithlightloads.This
driverhasbeendesignedtodrive±12mAatthedesignatedthresholdlevels.
The “A” port has a ±24mA driver.
Toensure the high-impedance state duringpoweruporpowerdown, OE
shouldbetiedtoVCCthroughapullupresistor;theminimumvalueoftheresistor
isdeterminedbythecurrent-sinkingcapabilityofthedriver.
The ALVCH162525 has “bus-hold” which retains the inputs’ last state
whenevertheinputbusgoestoahighimpedance.Thispreventsfloatinginputs
andeliminatestheneedforpull-up/downresistors.
DRIVE FEATURES:
• High Output Drivers: ±24mA (A port)
• Balanced Output Drivers: ±12mA (B port)
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONALBLOCKDIAGRAM
55
CLKAB
30
CLK1BA
29
CLK2BA
28
CLKENBA
1
CLKENAB
2
OEAB
27
OEBA
56
SEL
CE
CE
C1
CE
C1
1D
CE
1
C1
C1
1D
3
A1
1D
54
0
1D
B1
CE
C1
1D
1 of 18 Channels
To 17 Other Channels
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
MARCH 1999
1
© 1999 Integrated Device Technology, Inc.
DSC-4220/1
IDT74ALVC162525
3.3VCMOS18-BITREGISTEREDBUSTRANSCEIVERWITH3-STATEOUTPUTS
INDUSTRIALTEMPERATURERANGE
ABSOLUTEMAXIMUMRATINGS(1)
PINCONFIGURATION
Symbol
Description
Max
Unit
V
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +4.6
(3)
1
2
3
4
5
6
CLKENAB
OEAB
56
55
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
SEL
CLKAB
B1
TSTG
IOUT
IIK
Storage Temperature
DC Output Current
–65 to +150
–50 to +50
±50
° C
mA
mA
A1
GND
A2
54
53
52
51
50
Continuous Clamp Current,
VI < 0 or VI > VCC
GND
B2
IOK
Continuous Clamp Current, VO < 0
–50
mA
mA
A3
VCC
A4
B3
ICC
ISS
Continuous Current through each
VCC or GND
±100
7
8
9
VCC
NOTES:
49
48
B4
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
A5
B5
A6
10
11
12
B6
47
46
45
GND
A7
GND
B7
2. VCC terminals.
3. All terminals except VCC.
13
14
A8
A9
8
B
44
43
CAPACITANCE (TA = +25°C, F = 1.0MHz)
B9
Symbol
Parameter(1)
Conditions
VIN = 0V
VOUT = 0V
VIN = 0V
Typ.
Max. Unit
15
A10
A11
42
41
40
39
38
37
36
35
34
33
32
31
30
29
B10
B11
CIN
Input Capacitance
Output Capacitance
I/O Port Capacitance
5
7
7
7
9
9
pF
pF
pF
16
17
18
COUT
A12
GND
A13
B12
COUT
GND
B13
NOTE:
19
20
1. As applicable to the device type.
A14
B14
A15
21
22
23
24
25
B15
VCC
A16
VCC
B16
A17
PINDESCRIPTION
B17
GND
GND
A18
Pin Names
CLKAB
CLK1BA
CLK2BA
CLKENBA
CLKENAB
OEAB
Description
26
27
28
B18
ClockInputforthe AtoBdirection
OEBA
CLK1BA
ClockInputforthe BtoApipeline register
ClockInputfortheBtoAoutputregister
CLKENBA
CLK2BA
ClockEnablefortheCLK1BAandCLK2BAclocks(ActiveLOW)
Clock Enable for the CLKAB clock (Active LOW)
OutputEnablefortheBport(ActiveLOW)
OutputEnablefortheAport(ActiveLOW)
Selectpinforpipelined/non-pipelinedmodeintheB-to-Adirection
(Active LOW)
SSOP/ TSSOP/ TVSOP
TOP VIEW
OEBA
SEL
Ax
Bx
A-to-BDataInputsorB-to-A3-StateOutputs(1)
B-to-ADataInputsorA-to-B3-StateOutputs(1)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
2
IDT74ALVC162525
INDUSTRIALTEMPERATURERANGE
3.3VCMOS18-BITREGISTEREDBUSTRANSCEIVERWITH3-STATEOUTPUTS
FUNCTIONTABLE(1)
B-TO-A STORAGE (OEBA = L)
A-TO-B STORAGE (OEAB = L)
Inputs
Outputs
Ax
Inputs
Outputs
Bx
CLKENBA
CLK2BA
CLK1BA
SEL
Bx
CLKENAB
CLKAB
Ax
B (2)
H
X
X
X
X
A (2)
H
X
X
0
0
L
L
L
L
↑
↑
↑
↑
X
X
↑
H
H
L
L
L
H
L
L
L
L
↑
↑
L
L
H
H
H
(3)
L
NOTES:
(3)
↑
H
H
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH Transition
2. Output level before the indicated steady-state input conditions were established
3. Three CLK1BA edges and one CLK2BA edge are needed to propagate data from B
to A when SEL is low.
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
OperatingCondition:TA = –40°C to +85°C
Symbol
Parameter
Test Conditions
Min.
1.7
2
Typ.(1)
—
Max.
—
Unit
VIH
Input HIGH Voltage Level
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
V
—
—
VIL
Input LOW Voltage Level
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
—
—
—
—
0.7
0.8
V
IIH
IIL
Input HIGH Current
VCC = 3.6V
VCC = 3.6V
VCC = 3.6V
VI = VCC
—
—
—
—
—
—
—
±5
±5
µA
µA
µ A
Input LOW Current
VI = GND
VO = VCC
VO = GND
IOZH
IOZL
VIK
VH
High Impedance Output Current
(3-State Output pins)
—
±10
±10
–1.2
—
Clamp Diode Voltage
VCC = 2.3V, IIN = –18mA
VCC = 3.3V
–0.7
V
Input Hysteresis
—
—
100
0.1
—
40
mV
µ A
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = 3.6V
VIN = GND or VCC
∆ICC
Quiescent Power Supply Current
Variation
One input at VCC - 0.6V, other inputs at VCC or GND
—
—
750
µ A
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
3
IDT74ALVC162525
3.3VCMOS18-BITREGISTEREDBUSTRANSCEIVERWITH3-STATEOUTPUTS
INDUSTRIALTEMPERATURERANGE
BUS-HOLDCHARACTERISTICS
Symbol
IBHH
Parameter(1)
Test Conditions
VI = 2V
Min.
–75
75
Typ.(2)
—
Max.
—
Unit
Bus-HoldInputSustainCurrent
VCC = 3V
µ A
IBHL
VI = 0.8V
—
—
IBHH
Bus-HoldInputSustainCurrent
Bus-HoldInputOverdrive Current
VCC = 2.3V
VCC = 3.6V
VI = 1.7V
–45
45
—
—
µ A
µ A
IBHL
VI = 0.7V
—
—
IBHHO
VI = 0 to 3.6V
—
—
±500
IBHLO
NOTES:
1. Pins with Bus-Hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
OUTPUTDRIVECHARACTERISTICS(APORT)
Symbol
Parameter
TestConditions(1)
Min.
VCC – 0.2
2
Max.
—
Unit
VOH
OutputHIGHVoltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
IOH = – 6mA
IOH = – 12mA
V
VCC = 2.3V
VCC = 2.3V
VCC = 2.7V
VCC = 3V
—
1.7
—
2.2
—
2.4
—
VCC = 3V
IOH = – 24mA
IOL = 0.1mA
IOL = 6mA
2
—
VOL
OutputLOWVoltage
VCC = 2.3V to 3.6V
VCC = 2.3V
—
0.2
0.4
0.7
0.4
0.55
V
—
IOL = 12mA
IOL = 12mA
IOL = 24mA
—
VCC = 2.7V
VCC = 3V
—
—
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OUTPUTDRIVECHARACTERISTICS(BPORT)
Symbol
Parameter
TestConditions(1)
Min.
VCC – 0.2
1.9
1.7
2.2
2
Max.
—
Unit
VOH
OutputHIGHVoltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
IOH = – 4mA
IOH = – 6mA
IOH = – 4mA
IOH = – 8mA
IOH = – 6mA
IOH = – 12mA
IOL = 0.1mA
IOL = 4mA
V
VCC = 2.3V
VCC = 2.7V
VCC = 3V
—
—
—
—
2.4
2
—
—
VOL
OutputLOWVoltage
VCC = 2.3V to 3.6V
VCC = 2.3V
—
0.2
0.4
0.55
0.4
0.6
0.55
0.8
V
—
IOL = 6mA
—
VCC = 2.7V
VCC = 3V
IOL = 4mA
—
IOL = 8mA
—
IOL = 6mA
—
IOL = 12mA
—
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
4
IDT74ALVC162525
INDUSTRIALTEMPERATURERANGE
3.3VCMOS18-BITREGISTEREDBUSTRANSCEIVERWITH3-STATEOUTPUTS
OPERATING CHARACTERISTICS, TA = 25°C
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Symbol
CPD
Parameter
Test Conditions
Typical
—
—
Typical
160
Unit
PowerDissipationCapacitanceOutputsenabled
PowerDissipationCapacitanceOutputsdisabled
CL = 0pF, f = 10Mhz
pF
CPD
160
SWITCHING CHARACTERISTICS (FOR A AND B PORTS)(1)
VCC = 2.5V ± 0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
Symbol
fMAX
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPZH
tPZL
tPHZ
tPLZ
tPHZ
tPLZ
tSU
Parameter
Min.
120
1
Max.
—
Min.
125
—
Max.
—
Min.
150
1
Max.
—
Unit
MHz
ns
PropagationDelay
5.5
5.4
4.7
CLKAB to 2Bx
PropagationDelay
1
1
1
1
1
4.5
6.7
6.1
6.3
6.3
—
—
—
—
—
4.4
6.8
6.1
5.4
5.4
1
1
1
1
1
4.2
5.7
5.1
4.9
4.9
ns
ns
ns
ns
ns
CLK2BA to Ax
OutputEnableTime
OEAB to Bx
OutputEnableTime
OEBA to Ax
OutputDisableTime
OEAB to Bx
OutputDisableTime
OEBA to Ax
Set-up Time, Ax data before CLKAB↑
Set-up Time, Bx data before CLK2BA↑
Set-up Time, Bx data before CLK1BA↑
Set-upTime, SEL before CLK2BA↑
Set-up Time, CLKENAB before CLKAB↑
Set-up Time, CLKENBA before CLK1BA↑
Set-up Time, CLKENBA before CLK2BA↑
Hold Time, Ax data after CLKAB↑
Hold Time, Bx data before CLK2BA↑
Hold Time, Bx data before CLK1BA↑
Hold Time, SEL before CLK2BA↑
Hold Time, CLKENAB before CLKAB↑
Hold Time, CLKENBA before CLK1BA↑
Hold Time, CLKENBA before CLK2BA↑
Pulse Duration, CLK HIGH or LOW
1.3
2.1
1.3
3.3
2.1
2.7
2.7
0.7
0.4
0.8
0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.3
1.8
1.2
3.3
1.9
2.5
2.5
0.4
0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.3
1.7
1.1
3.3
1.6
2.1
2.2
0.9
0.6
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
500
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
tSU
tSU
tSU
tSU
tSU
tSU
tH
tH
tH
0.4
0
tH
0.1
0.3
0.1
0
tH
0.1
0
0.3
0
tH
tH
0
0
tW
3.2
—
3.2
—
3
(2)
tSK(O)
OutputSkew
—
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
5
IDT74ALVC162525
3.3VCMOS18-BITREGISTEREDBUSTRANSCEIVERWITH3-STATEOUTPUTS
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
TESTCONDITIONS
VIH
VT
SAME PHASE
INPUT TRANSITION
0V
tPHL
tPLH
Symbol VCC(1)=3.3V±0.3V VCC(1)=2.7V VCC(2)=2.5V±0.2V Unit
VOH
VT
OUTPUT
VLOAD
VIH
6
6
2 x Vcc
Vcc
V
V
VOL
2.7
1.5
300
300
50
2.7
1.5
300
300
50
tPHL
tPLH
VIH
VT
0V
VT
Vcc / 2
150
V
OPPOSITE PHASE
INPUT TRANSITION
VLZ
VHZ
CL
mV
mV
pF
150
ALVC Link
30
Propagation Delay
VLOAD
Open
GND
DISABLE
VCC
ENABLE
VIH
VT
CONTROL
INPUT
500Ω
0V
tPZL
tPLZ
VIN
VOUT
Pulse(1, 2)
Generator
VLOAD/2
D.U.T.
VLOAD/2
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
VT
VLZ
VOL
500Ω
tPHZ
tPZH
RT
CL
OUTPUT
NORMALLY
HIGH
VOH
VHZ
SWITCH
OPEN
VT
0V
ALVC Link
0V
Test Circuit for All Outputs
ALVC Link
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Enable and Disable Times
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
NOTES:
VIH
VT
0V
1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns.
DATA
INPUT
tSU
tH
VIH
VT
0V
TIMING
INPUT
SWITCHPOSITION
Test
Switch
VLOAD
GND
Open
tREM
VIH
VT
0V
ASYNCHRONOUS
CONTROL
Open Drain
Disable Low
Enable Low
VIH
VT
0V
SYNCHRONOUS
CONTROL
Disable High
Enable High
tSU
tH
ALVC Link
All Other Tests
VIH
Set-up, Hold, and Release Times
VT
0V
INPUT
tPLH1
tPHL1
VOH
VT
LOW-HIGH-LOW
VT
PULSE
OUTPUT 1
OUTPUT 2
VOL
tSK (x)
tSK (x)
tW
VOH
VT
HIGH-LOW-HIGH
PULSE
VT
VOL
ALVC Link
tPLH2
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
tPHL2
Pulse Width
ALVC Link
Output Skew - tSK(X)
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
6
IDT74ALVC162525
INDUSTRIALTEMPERATURERANGE
3.3VCMOS18-BITREGISTEREDBUSTRANSCEIVERWITH3-STATEOUTPUTS
ORDERINGINFORMATION
ALVC
X
XX
XX
IDT
XX
XXX
Device Type Package
Bus-Hold
Family
Temp. Range
Shrink Small Outline Package
Thin Shrink Small Outline Package
Thin Very Small Outline Package
PV
PA
PF
18-Bit Registered Bus Transceiver with 3-State Outputs
525
162
Double-Density with Resistors, ±12mA (B Port)
±24mA (A Port)
H
Bus-Hold
74
-40°C to +85°C
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
for Tech Support:
logichelp@idt.com
(408) 654-6459
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com
7
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