ICS554GI-01AILFT [IDT]
Low Skew Clock Driver, 554 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, 0.65 MM PITCH, TSSOP-16;
| 型号： | ICS554GI-01AILFT |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Low Skew Clock Driver, 554 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, 0.65 MM PITCH, TSSOP-16 光电二极管 |
| 文件： | 总7页 (文件大小：175K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
ICS554-01A
Description
Features
The ICS554-01A is a low skew clock buffer with a single
complimentary PECL input to four PECL outputs. Part of
ICS’ Clock Blocks family, this is our lowest skew PECL
• Input frequency up to 200 MHz
• Advanced CMOS process
TM
• Outputs are skew matched to within 50 ps
• Packaged in 16-pin TSSOP
clock buffer. The ICS554-01A is footprint compatible with
the ICS554-01, but requires fewer passive components for
termination thus providing a cost-saving alternative. For
parts which do not require PECL inputs or outputs, see the
ICS553 for a 1 to 4 low skew buffer, or the ICS552-02 for a
1 to 8 low skew buffer. For more than 8 outputs see the
• One PECL input to 4 PECL output clock drivers
• Operating Voltages of 3.3 V or 5 V
• Industrial temperature range
TM
MK74CBxxx Buffalo series of clock drivers.
• Functional equivalent to ICS554-01
• Simplified passive termination network compared to
ICS554-01
ICS makes many non-PLL and PLL based low skew output
devices as well as Zero Delay Buffers to synchronize
clocks. Contact us for all of your clocking needs.
Block Diagram
VDD
IN
IN
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
VSS
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
1
ICS554-01A
REV B 070606
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
Pin Assignment
NC
VDD
Q0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
VDD
Q3
Q0
Q3
Q1
Q2
Q1
Q2
GND
IN
GND
IN
16-pin 173 mil (0.65mm) TSSOP
Pin Descriptions
Number
Name
Type
Pin Description
1
2
NC
VDD
Q0
—
No Connect.
Power Connect to +3.3 V or 5 V. Must be same as pin 15.
Output Clock Output Q0.
3
4
Q0
Output Clock Output Q0.
5
Q1
Output Clock Output Q1.
6
Q1
Output Clock Output Q1.
7
GND
IN
Power Connect to Ground.
8
Input
Input
PECL Clock Input.
9
IN
Complementary PECL Clock Input.
10
11
12
13
14
15
16
GND
Q2
Power Connect to Ground
Output Clock Output Q2.
Q2
Output Clock Output Q2.
Q3
Output Clock Output Q3.
Q3
Output Clock Output Q3.
VDD
NC
Power Connect to +3.3 V or 5 V. Must be same as pin 2.
—
No Connect.
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
2
ICS554-01A
REV B 070606
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
External Components
The ICS554-01A requires a decoupling capacitor of 0.01µF to be connected between VDD on pin 2 and GND on
pin 7, as well as between VDD on pin 15 and GND on pin 10. These decoupling capacitors should be placed as
close to the device as possible.
To achieve the low output skews that the ICS554-01A is capable of, careful attention must be paid to board layout.
Essentially, all 8 outputs must have identical terminations, loads, and trace geometries. If they do not, the output
skew will be degraded. For example, using a 30Ω series termination on one output (with 33Ω on the others) will
cause at least 15ps of skew.
Termination for PECL or LVPECL Outputs
The clock layout topology shown below is a typical termination for PECL or LVPECL outputs. The two different
layouts mentioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that generate PECL/LVPECL compatible outputs.
Therefore, termination resistors (DC current path to ground) or current sources must be used for functionality.
These outputs are designed to drive 50 ohm transmission lines. Matched impedance techniques should be used to
maximize operating frequency and minimize signal distortion. There are a few simple termination schemes. The
figures below show two different layouts which are recommended only as guidelines. Other suitable clock layouts
may exist, but it is recommended that board designers simulate to guarantee compatibility across all printed circuit
and clock component process variations.
Z0 = 50 ohms
3.3 V
5
FIN
FOUT
Z0 = 50 ohms
5
Z
Z
0
2
2
0
50 ohms
50 ohms
RTT
Z0 = 50 ohms
Z0 = 50 ohms
C1
Z0
FIN
FOUT
1
RTT =
(VOH + VOL / VCC -2) -2
3
2
3
Z
Z
0
2
0
C1 = 0.1µF to 0.01µF
PECL or LVPECL Output Termination
LVPECL Output Termination
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
3
ICS554-01A
REV B 070606
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS554-01A. These ratings, which are
standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
7 V
-0.5 V to VDD+0.5 V
-40 to +85 °C
-65 to +150°C
125°C
260°C
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+85
Units
°C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
-40
–
+3.15
+5.25
V
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
4
ICS554-01A
REV B 070606
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
DC Electrical Characteristics
VDD=3.3 V ±±% Ambient temperature -40 to +85 °C
Parameter
Symbol
VDD
IN
Conditions
Min.
3.15
Typ.
Max.
5.25
Units
Operating Voltage
V
V
Peak to Peak Input Voltage
Input Common Mode Range
Input Common Mode Range
Output High Voltage
0.3
1.0
IN
VDD=3.3 V
VDD-2
VDD-3.7
VDD-1.2
VDD-0.6
VDD-0.6
IN
VDD=5 V
Note 1
V
V
OH
Output Low Voltage
V
Note 1
VDD - 2.0
V
OL
Operating Supply Current
Short Circuit Current, 3.3 V
Short Circuit Current, 5 V
IDD
No Load, 135 MHz
80
50
60
mA
mA
mA
I
I
OS
OS
Note 1: V and V can be set by the external resistor values on the PECL outputs.
OH
OL
note 2: IDD includes the current through the external resistors which can be modified.
AC Electrical Characteristics
VDD = 3.3 V ±±, Ambient Temperature -40 to +85 °C
Parameter
Symbol
Conditions
Min. Typ. Max.
Units
MHz
ns
Input Frequency
0
200
Propagation Delay
VDD = 3.3 V
2
2
VDD = 5 V
ns
Output to Output Skew
Duty Cycle
Crosspoint of pair
Crosspoint of pair
0
50
55
ps
45
50
%
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
5
ICS554-01A
REV B 070606
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.6± mm Pitch)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Min Max
Inches
Max
16
Symbol
Min
--
A
A1
A2
b
--
1.20
0.15
1.05
0.30
0.20
5.1
0.047
0.006
0.041
0.012
0.05
0.80
0.19
0.09
4.90
0.002
0.032
0.007
E1
E
INDEX
AREA
C
0.0035 0.008
0.193 0.201
0.252 BASIC
0.169 0.177
0.0256 Basic
D
E
E1
e
L
6.40 BASIC
4.30 4.50
0.65 Basic
1
2
D
0.45
0°
0.75
8°
0.018
0°
0.030
8°
α
aaa
--
0.10
--
0.004
A
2
A
A
1
c
- C -
e
SEATING
PLANE
b
L
aaa
C
Ordering Information
Part / Order Number
ICS554G-01AI
ICS554GI-01AIT
ICS554G-01AILF
ICS554GI-01AILFT
Marking
Shipping Packaging
Tubes
Package
Temperature
-40 to +85 °C
-40 to +85 °C
-40 to +85 °C
-40 to +85 °C
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
554G01AI
Tape and Reel
Tubes
Tape and Reel
554G1AIL
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no
responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS
does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
IDT™ / ICS™ LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
6
ICS554-01A
REV B 070606
ICS554-01A
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
PECL BUFFER
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Printed in USA
相关型号：
ICS554GI-01AIT
Low Skew Clock Driver, 554 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, 0.65 MM PITCH, TSSOP-16
IDT
ICS554GI-01ALFT
Low Skew Clock Driver, 554 Series, 4 True Output(s), 0 Inverted Output(s), CMOS, PDSO16, 4.40 MM, 0.65 MM PITCH, TSSOP-16
IDT
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