ICS556G-01T [ICSI]

BROADCOM 25 MHZ LVDS CLOCK; 博通25 MHz的LVDS时钟
ICS556G-01T
型号: ICS556G-01T
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

BROADCOM 25 MHZ LVDS CLOCK
博通25 MHz的LVDS时钟

时钟
文件: 总6页 (文件大小:141K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ICS556-01  
BROADCOM 25 MHZ LVDS CLOCK  
Description  
Features  
The ICS556-01 is a clock oscillator with LVDS outputs.  
Using a standard 25 MHz crystal, the device outputs a  
.25 mHz (reference) differential output clock. The  
operation voltage is 2.5 V to support today’s popular  
interfaces. The termination resistor is off-chip.  
Packaged in 8-pin TSSOP  
Requires no external components  
Low Phase Jitter: <1 ps from 10 kHz to 10 MHz  
Differential LVDS outputs  
Operating voltage of 2.5 V.  
Advanced, low power, sub-micron CMOS process  
Block Diagram  
VDD  
OE  
X1  
CLK  
Crystal  
100  
25 MHz Crystal  
Oscillator  
CLK  
X2  
2
GND  
MDS 556-01 B  
1
Revision 020204  
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
ICS556-01  
Broadcom 25 MHz LVDS Clock  
Pin Assignment  
X 1  
V D D  
G N D  
G N D  
8
7
6
5
X 2  
1
2
3
4
O E  
C L K  
C L K  
I C S 5 5 6 - 0 1  
8 P i n ( 1 7 3 m i l ) T S S O P o r S O I C  
Pin Descriptions  
Pin  
Number  
Pin  
Name  
Pin  
Type  
Pin Description  
1
2
3
4
5
6
7
8
X1  
VDD  
GND  
GND  
CLK  
CLK  
OE  
Input  
Crystal connection.  
Power Power supply. Connect to 2.5 V.  
Power Connect to ground.  
Power Connect to ground.  
Output Inverting differential clock output.  
Power Differential clock output.  
Input  
Input  
Output Enable. Internal pull-up resistor.  
Crystal connection.  
X2  
only partial outputs are used, it is recommended to  
terminate the un-used outputs.  
External Component Selection  
The ICS556-01 requires a minimum number of external  
components for proper operation. A 100termination  
resistor between CLK and CLK is provided on-chip.  
2.5V  
2.5V  
LVDS_Driver  
Decoupling Capacitors  
+
R1  
100 ohm  
A decoupling capacitor of 0.01µF should be connected  
between VDD and GND on pins 2 and 3 as close to the  
ICS556-01 as possible. For optimum device  
-
performance, the decoupling capacitor should be  
mounted on the component side of the PCB. Avoid the  
use of vias in the decoupling circuit.  
100 Ohm Differential Transmission Line  
F I G U R E 2 . T Y P I C A L L V D S  
D R I V E R T E R M I N A T I O N  
LVDS Driver Termination  
A general LVDS interface is shown in Figure 2. In a 100  
differential transmission line environment, LVDS drivers  
require a matched load termination of 100 across near  
the receiver input. For a multiple LVDS outputs buffer, if  
MDS 556-01 B  
2
Revision 020204  
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
ICS556-01  
Broadcom 25 MHz LVDS Clock  
Recommended Crystal Parameters:  
Quartz Crystal  
Initial Accuracy of 25°C±20 ppm  
Temperature Stability±20 ppm  
Load Capacitance5 pf  
Shunt Capacitance, C02 pF Max  
Equivalent Series Resistance80 Max  
The ICS556-01 25 MHz LVDS Clock utilizes an  
external crystal to generate a low phase noise output.  
To assure the best system performance and reliability,  
a crystal device with the recommended parameters  
(shown below) must be used, and the layout guidelines  
discussed in the following section shown must be  
followed.  
The external crystal must be connected as close to the  
chip as possible and should be on the same side of the  
PCB as the ICS556-01. There should be no via’s  
between the crystal pins and the X1 and X2 device  
pins. There should be no signal traces underneath or  
close to the crystal.  
The frequency of oscillation of a quartz crystal is  
determined by its “cut” and by the load capacitors  
connected to it. The crystal specified for use with the  
ICS556-01 is designed to have zero frequency error  
when the total of on-chip plus stray capacitance is 5 pF.  
The value (in pF) of these crystal caps should equal  
(C - 12 pF)*2. In this equation, C =crystal load  
L
L
capacitance in pF. Example: or a crystal with a 16 pF  
load capacitance, each crystal capacitor would be 8 pF  
[(16-12) x 2] = 8.  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the ICS556-01. These ratings,  
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of  
the device at these or any other conditions above those indicated in the operational sections of the  
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can  
affect product reliability. Electrical parameters are guaranteed only over the recommended operating  
temperature range.  
Item  
Rating  
Supply Voltage, VDD  
All Inputs and Outputs  
7 V  
-0.5 V to VDD+0.5 V  
0 to +70°C  
Ambient Operating Temperature  
Storage Temperature  
-65 to +150°C  
260°C  
Soldering Temperature  
Recommended Operation Conditions  
Parameter  
Min.  
Typ.  
Max.  
+70  
Units  
°C  
Ambient Operating Temperature  
Power Supply Voltage (measured in respect to GND)  
Reference crystal parameters  
0
+2.375  
+2.625  
V
Refer to page 3  
MDS 556-01 B  
3
Revision 020204  
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
ICS556-01  
Broadcom 25 MHz LVDS Clock  
DC Electrical Characteristics  
VDD=2.5 V 5% , Ambient temperature 0 to +70°C, unless stated otherwise  
Parameter  
Operating Voltage  
Output High Voltage  
Output Low Voltage  
Symbol  
Conditions  
Min.  
2.375  
1.375  
Typ.  
Max.  
Units  
VDD  
2.625  
V
V
V
V
V
Note 1  
Note 1  
= -4 mA  
OH  
V
1.125  
OL  
Output High Voltage (CMOS  
Level)  
V
I
VDD-0.4  
OH  
OH  
Operating Supply Current  
IDD  
No load, OE = 1  
No load, OE = 0  
5.3  
1.7  
mA  
mA  
Note 1: Outputs terminated with 50to VDD/2  
AC Electrical Characteristics  
VDD = 2.5 V 5%, Ambient Temperature 0 to +70° C, unless stated otherwise  
Parameter  
Conditions  
Min. Typ. Max. Units  
Input Frequency  
25  
25  
350  
0
MHz  
MHz  
mV  
mV  
V
Output Frequency  
Differential Output Voltages (V  
)
250  
-40  
450  
40  
OD  
V  
V
Magnitude Change  
Magnitude Change  
OS  
OD  
OD  
Offset Voltage (V  
)
1.125 1.25 1.375  
OS  
V  
V
3
25  
mV  
mA  
mA  
ns  
OS  
Differential Output Short Circuit Current (I  
)
-3.5  
-3.5  
0.8  
0.8  
50  
OSD  
Output Short Circuit Current (I  
Output Rise Time  
)
OS  
20% to 80%, no load  
20% to 80%, no load  
Measured at 1.25 V,  
1.2  
1.2  
55  
Output Fall Time  
ns  
Output Clock Duty Cycle  
45  
%
C =5 pF  
L
Maximum Output Jitter (p-p)  
Phase Jitter (RMS)  
C =5 pF  
40  
ps  
ps  
L
Phase Noise integrated  
from 10 kHz to 10 MHz  
1.8  
2.5  
MDS 556-01 B  
4
Revision 020204  
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
ICS556-01  
Broadcom 25 MHz LVDS Clock  
ParameterMeasurementInformation  
VDD = 2.5V±5%  
SCOPE  
Z = 50  
Qx  
80%  
VOD  
80%  
50Ω  
LVDS  
Z = 50Ω  
nQx  
20%  
20%  
Clock  
Outputs  
50Ω  
tOR  
tOF  
OUTPUT RISE/FALL TIME  
2.5V OUTPUT LOAD AC TEST CIRCUIT  
V D D  
nCLK  
out  
5 0  
5 0 Ω  
D C Input  
LV D S  
CLK  
Pulse Width  
V O S /V O S  
out  
tPERIOD  
V O S S E T U P  
tPW & tPERIOD  
VDD  
nCLK  
CLK  
VOH  
VOL  
out  
DC Input  
LVDS  
100  
VOD/VOD  
t(φ)  
out  
tjit(φ) = t(φ) - t(φ)mean = Phase Jitter  
VOD SETUP  
PHASE JITTER  
VDD  
nCLK  
Cross Points  
VOD  
VOS  
CLK  
GND  
DIFFERENTIAL INPUT LEVEL  
MDS 556-01 B  
5
Revision 020204  
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
ICS556-01  
Broadcom 25 MHz LVDS Clock  
Package Outline and Package Dimensions (8-pin TSSOP)  
Package dimensions are kept current with JEDEC Publication No. 95  
Millimeters  
Min Max  
Inches  
Max  
8
Symbol  
A
Min  
--  
--  
1.20  
0.15  
1.05  
0.30  
0.20  
3.10  
0.047  
0.006  
0.041  
0.012  
A1  
0.05  
0.80  
0.19  
0.09  
2.90  
0.002  
0.032  
0.007  
E1  
A2  
b
C
E
INDEX  
AREA  
0.0035 0.008  
0.114 0.122  
0.252 BASIC  
0.169 0.177  
0.0256 Basic  
D
E
E1  
e
L
6.40 BASIC  
4.30 4.50  
0.65 Basic  
1
2
D
0.45  
0°  
0.75  
8°  
0.018  
0.030  
8°  
α
0°  
aaa  
-
0.10  
-
0.004  
A
2
A
A
1
c
- C -  
e
SEATING  
PLANE  
b
L
aaa  
C
Ordering Information  
Part / Order Number  
Marking  
Shipping  
packaging  
Tubes  
Package  
Temperature  
ICS556G-01  
ICS556G-01T  
556G-01  
556G-01  
8-pin TSSOP  
8-pin TSSOP  
0 to +70° C  
0 to +70° C  
Tape and Reel  
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)  
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would  
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial  
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary  
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any  
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or  
critical medical instruments.  
MDS 556-01 B  
6
Revision 020204  
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  

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