ICS9112AM-26 [IDT]

Low Skew Clock Driver, 9112 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, 0.150 INCH, SOIC-8;
ICS9112AM-26
型号: ICS9112AM-26
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述:

Low Skew Clock Driver, 9112 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, 0.150 INCH, SOIC-8

光电二极管
文件: 总8页 (文件大小:127K)
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Integrated  
Circuit  
Systems, Inc.  
ICS9112-26  
Low Skew Output Buffer  
General Description  
The ICS9112-26 is a high performance, low skew, low jitter  
clock driver. It is designed to distribute high speed clocks in  
PC systems operating at speeds from 0 to 133 MHz.  
Features  
Frequency range 0 - 133 MHz (3.3V)  
Less than 200 ps Jitter between outputs  
Skew controlled outputs  
Skew less than 250 ps between outputs  
Available in 8 pin 150 mil SOIC &  
173 mil TSSOP packages.  
The ICS9112-26 comes in an eight pin 150 mil SOIC package.  
It has four output clocks.  
3.3V 10ꢀ operation  
Block Diagram  
Pin Configuration  
CLK0  
VDD  
1
2
3
4
8
7
6
5
CLK_IN  
CLK3  
VDD  
CLK0  
CLK1  
GND  
CLK1  
CLK2  
CLK_IN  
8 pin SOIC & TSSOP  
CLK2  
CLK3  
Pin Descriptions  
PIN NUMBER  
PIN NAME  
CLK01  
VDD  
TYPE  
OUT  
PWR  
PWR  
OUT  
OUT  
OUT  
IN  
DESCRIPTION  
1
2,6  
3
Buffered clock output  
Power Supply (3.3V)  
Ground  
GND  
4
CLK11  
CLK21  
CLK31  
CLK_IN  
Buffered clock output  
Buffered clock output  
Buffered clock output  
Input reference frequency.  
5
7
8
Notes:  
1. Weak pull-down on all outputs  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
9112-26 Rev B- 07/16/01  
information being relied upon by the customer is current and accurate.  
ICS9112-26  
Absolute Maximum Ratings  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V  
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V  
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are  
stress specifications only and functional operation of the device at these or any other conditions above those listed in the  
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended  
periods may affect product reliability.  
Electrical Characteristics at 3.3V  
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5% (unless otherwise stated)  
PARAMETER  
SYMBOL  
CONDITIONS  
DD = min to max, IOH = -1 mA  
MIN  
VDD - 0.2  
2
TYP  
3.3  
MAX UNITS  
V
V
V
V
VOH  
High-level Output Voltage  
V
DD = 3V, IOH = -24 mA  
VDD = 3V, IOH = 12 mA  
VDD = min to max, IOH = 1 mA  
2.9  
2.4  
3.1  
0.0055  
0.28  
0.14  
-61  
0.2  
0.8  
V
V
V
VOL  
Low-level Output Voltage  
V
V
DD = 3V, IOH = 24 mA  
DD = 3V, IOH = 12 mA  
VDD = 3V, VO = 1V  
0.55  
-50  
IOH  
IOL  
High-level Input Current  
Low-level Input Current  
V
DD = 3.3V, VO = 1.65V  
DD = 3V, VO = 2V  
-77  
V
60  
-5  
103  
111  
VDD = 3.3V, VO = 1.65V  
V = VO or VDD  
II  
Input Current  
5
µA  
pF  
Input Capacitance1  
Output Capacitance1  
CI  
VDD = 3.3V, VI = 0V or 3.3V  
3
V
DD = 3.3V, VI = 0V or 3.3V  
REF = 0 MHz  
Unloaded outputs at 66.67 MHz  
CO  
3.2  
22  
25  
pF  
50  
40  
µA  
mA  
IDD  
Supply current  
1. Guaranteed by design, not 100% tested in production.  
Switching Characteristics at 3.3V  
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5% (unless otherwise stated)  
PARAMETER  
Low-to-high Propagation Delay1  
High-to-low Propagation Delay1  
Output Skew Window1  
Process Skew1  
SYMBOL  
tPLH  
CONDITIONS  
VO = VDD/2  
VO = VDD/2  
VO = VDD/2  
VO = VDD/2  
66 MHz  
133 MHz  
66 MHz  
133 MHz  
0.3 to 0.6 VDD  
0.3 to 0.6 VDD  
MIN  
4
4
TYP  
5.6  
5.2  
50  
MAX UNITS  
7
7
ns  
ns  
ps  
ps  
tPHL  
Tsk(O)  
Tsk(PR)  
100  
0.5  
6
3
6
3
2
2
CLKIN High Time1  
Thigh  
Tlow  
ns  
ns  
CLKIN Low Time1  
Output Rise Slew Rate1  
Output Rise Slew Rate1  
Tr  
Tf  
3.6  
3.2  
5
5
V/ns  
V/ns  
1. Guaranteed by design, not 100% tested in production.  
Notes:  
1. Guaranteed by design and characterization. Not subject to 100ꢀ test.  
2. CLK_IN input has a threshold voltage of 1.4V  
3. All parameters expected with loaded outputs  
2
ICS9112-26  
SYMBOL  
In Millimeters  
In Inches  
COMMON DIMENSIONS  
COMMON DIMENSIONS  
MIN  
1.35  
0.10  
0.33  
0.19  
MAX  
1.75  
0.25  
0.51  
0.25  
MIN  
.0532  
.0040  
.013  
MAX  
.0688  
.0098  
.020  
A
A1  
B
C
D
E
e
.0075  
.0098  
SEE VARIATIONS  
SEE VARIATIONS  
3.80  
4.0  
.1497  
.1574  
1.27 BASIC  
0.050 BASIC  
H
h
5.80  
0.25  
0.40  
6.20  
0.50  
1.27  
.2284  
.010  
.016  
.2440  
.020  
.050  
L
SEE VARIATIONS  
SEE VARIATIONS  
N
α
0°  
8°  
0°  
8°  
VARIATIONS  
D mm.  
D (inch)  
N
8
MIN  
4.80  
MAX  
5.00  
MIN  
MAX  
.1890  
.1968  
150 mil (Narrow Body) SOIC  
Ordering Information  
ICS9112yM-26-T  
Example:  
ICS XXXX y M - PPP - T  
Designation for tape and reel packaging  
Pattern Number (2 or 3 digit number for parts with ROM code patterns)  
Package Type  
M=SOIC  
Revision Designator (will not correlate with datasheet revision)  
Device Type (consists of 3 or 4 digit numbers)  
Prefix  
ICS, AV = Standard Device  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
3
information being relied upon by the customer is current and accurate.  
ICS9112-26  
SYMBOL  
In Millimeters  
In Inches  
COMMON DIMENSIONS  
COMMON DIMENSIONS  
MIN  
-
MAX  
1.20  
0.15  
1.05  
0.30  
0.20  
MIN  
-
MAX  
.047  
.006  
.041  
.012  
.008  
A
A1  
A2  
b
0.05  
0.80  
0.19  
0.09  
.002  
.032  
.007  
.0035  
c
SEE VARIATIONS  
6.40 BASIC  
SEE VARIATIONS  
0.252 BASIC  
D
E
E1  
e
4.30  
4.50  
0.65 BASIC  
0.75  
.169  
.177  
0.0256 BASIC  
L
0.45  
.018  
.030  
SEE VARIATIONS  
SEE VARIATIONS  
N
0°  
-
8°  
0°  
-
8°  
α
aaa  
0.10  
.004  
VARIATIONS  
D mm.  
D (inch)  
N
8
MIN  
2.90  
MAX  
3.10  
MIN  
.114  
MAX  
4.40 mm. Body, 0.65 mm. pitch TSSOP  
(0.0256 mil)  
.122  
7/6/00 Rev B  
(173 mil)  
MO-153 JEDEC  
Doc.# 10-0038  
Ordering Information  
ICS9112yG-26-T  
Example:  
ICS XXXX y G - PPP - T  
Designation for tape and reel packaging  
Pattern Number (2 or 3 digit number for parts with ROM code patterns)  
Package Type  
G=TSSOP  
Revision Designator (will not correlate with datasheet revision)  
Device Type  
Prefix  
ICS, AV = Standard Device  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
4
information being relied upon by the customer is current and accurate.  
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Home > Products > Timing Solutions > PC-Notebook-Server Clocks > Single-ended I/O Fan-out and Zero Delay Buffers > 9112-26  
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9112-26 (Single-ended I/O Fan-out and Zero Delay Buffers)  
Description  
Clock Buffer  
Market Group  
PC CLOCK  
Additional Info  
The ICS9112-26 is a high performance, low skew, low jitter clock driver. It is designed to distribute high speed clocks in PC systems operating at  
speeds from 0 to 133 MHz.  
Related Orderable Parts  
1 2  
Attributes  
Voltage  
9112AG-26  
3.3 V (PG8)  
TSSOP 8  
NA  
9112AG-26LF  
3.3 V (PGG8)  
TSSOP 8  
NA  
9112AG-26LFT  
9112AG-26T  
3.3 V (PG8)  
TSSOP 8  
NA  
9112AM-26  
3.3 V (DC8)  
SOIC 8  
NA  
9112AM-26LF  
3.3 V (PGG8)  
3.3 V (DCG8)  
TSSOP 8  
NA  
SOIC 8  
NA  
Package  
Speed  
C
C
C
C
C
C
Temperature  
Status  
Active  
Active  
Active  
Yes  
Active  
Active  
Yes  
Active  
Yes  
No  
Yes  
No  
Sample  
Minimum Order  
Quantity  
192  
96  
192  
96  
2500  
2500  
2500  
2500  
194  
97  
194  
97  
Factory Order  
Increment  
1 2  
Related Documents  
Type  
Title  
Size  
Revision Date  
Datasheet  
9112-26 Datasheet  
86 KB  
05/14/2007  
Home | Site Map | About IDT | Press Room | Investor Relations | Trademark | Privacy Policy | Careers | Register | Contact Us  
Use of this website signifies your agreement to the acceptable use and privacy policy. Copyright 1997-2007 Integrated Device Technology, Inc. All Rights Reserved.  
Node: www.idt.com  
Global Sites  
Search Entire Site  
Contact IDT | Investors | Press  
Email | Print  
Document Search | Package Search | Parametric Search | Cross Reference Search | Green & RoHS | Calculators | Thermal Data | Reliability & Quality | Military  
Home > Products > Timing Solutions > PC-Notebook-Server Clocks > Single-ended I/O Fan-out and Zero Delay Buffers > 9112-26  
You may also like...  
Add to myIDT [?]  
9112-26 (Single-ended I/O Fan-out and Zero Delay Buffers)  
Description  
Clock Buffer  
Market Group  
PC CLOCK  
Additional Info  
The ICS9112-26 is a high performance, low skew, low jitter clock driver. It is designed to distribute high speed clocks in PC systems operating at  
speeds from 0 to 133 MHz.  
Related Orderable Parts  
1 2  
Attributes  
Voltage  
9112AG-26  
3.3 V (PG8)  
TSSOP 8  
NA  
9112AG-26LF  
3.3 V (PGG8)  
TSSOP 8  
NA  
9112AG-26LFT  
9112AG-26T  
3.3 V (PG8)  
TSSOP 8  
NA  
9112AM-26  
3.3 V (DC8)  
SOIC 8  
NA  
9112AM-26LF  
3.3 V (PGG8)  
3.3 V (DCG8)  
TSSOP 8  
NA  
SOIC 8  
NA  
Package  
Speed  
C
C
C
C
C
C
Temperature  
Status  
Active  
Active  
Active  
Yes  
Active  
Active  
Yes  
Active  
Yes  
No  
Yes  
No  
Sample  
Minimum Order  
Quantity  
192  
96  
192  
96  
2500  
2500  
2500  
2500  
194  
97  
194  
97  
Factory Order  
Increment  
1 2  
Related Documents  
Type  
Title  
Size  
Revision Date  
Datasheet  
9112-26 Datasheet  
86 KB  
05/14/2007  
Home | Site Map | About IDT | Press Room | Investor Relations | Trademark | Privacy Policy | Careers | Register | Contact Us  
Use of this website signifies your agreement to the acceptable use and privacy policy. Copyright 1997-2007 Integrated Device Technology, Inc. All Rights Reserved.  
Node: www.idt.com  

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