IDTQS5925Q [IDT]
Clock Generator, 160MHz, CMOS, PDSO16, 0.150 INCH, QSOP-16;
| 型号： | IDTQS5925Q |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Clock Generator, 160MHz, CMOS, PDSO16, 0.150 INCH, QSOP-16 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总7页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PROGRAMMABLE
FREQUENCY GENERATOR
QS5925
DESCRIPTION:
FEATURES:
The QS5925is a high-performance,lowskew,lowjitterphase-locked
loop(PLL)clockdriver.Itprovidesprecisephaseandfrequencyalignment
ofits clockoutputs toanexternallyappliedclockinputorinternalcrystal
oscillator. The QS5925 has been specially designed to interface with
GigabitEthernetand FastEthernetapplications byprovidinga 125MHz
clock from 25MHz input. It can also be programmed to provide output
frequencies ranging from 3.125MHz to 160MHz with input frequencies
rangingfrom3.125MHzto80MHz.The QS5925includes aninternalRC
filterthatprovidesexcellentjittercharacteristicsandeliminatestheneedfor
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4programmablefrequencyoutputs
Optionalcrystalinput,internalcapacitors
BalancedDrive Outputs ±12mA
PLLdisable mode forlowfrequencytesting
Tri-state outputenable (OE)
PHY/MACnetworkingapplications
Inputfrequencies upto80MHz
Outputfrequencies upto160MHz
5Vtolerantinputs
externalcomponents.Whenusingtheoptionalcrystalinput,theX pinmust
Lowoutputskew/jitter
Externalfeedback,internalloopfilter
3V to 3.6V supply voltage
2
beconnectedtotheCLKINpin.Theon-chipcrystaloscillatorincludes the
feedback resistor and crystal capacitors (nominal load capacitance is
15pF),andrequires afundamentalmodecrystalwithamaximumequiva-
lentseries resistance of50Ω.
Available in16-pinQSOPpackage
FUNCTIONALBLOCKDIAGRAM
S0
S1
SELECT
MODE
FB
PHASE
LOOP
VCO
0
1
FREQUENCY
DIVIDER
1/N
DETECTOR
FILTER
CLKIN
Q/N
Q0
X2
XTAL
OSC
X1
Q
1
OPTIONAL
CRYSTAL
Q2
OE
INDUSTRIAL TEMPERATURE RANGE
JANUARY 2001
1
c
2001 Integrated Device Technology, Inc.
DSC-5776/2
QS5925
PROGRAMMABLEFREQUENCYGENERATOR
INDUSTRIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS (1)
PINCONFIGURATION
Symbol
Description
Max.
Unit
VTERM
Supply Voltage to Ground
– 0.5 to +7
V
VDDN
GNDN
Q2
1
2
3
4
5
6
7
8
S1
S0
16
15
14
13
12
11
10
9
DC Output Voltage VOUT
DC Input Voltage VIN
– 0.5 to Vcc +0.5
– 0.5 to +7
.55
V
V
TA = 85°C Maximum Power Dissipation
W
°C
GNDQ
TSTG
Storage Temperature
– 65 to +150
NOTE:
DDQ
X1
V
Q1
SO16-7
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
Q0
X2
Q/N
GNDN
OE
CLKIN
FB
PINDESCRIPTION
QSOP
TOP VIEW
Pin Names
QTY
I/O
Description
CLKIN
1
1
1
1
I
Inputclock
(1)
X1
I
Crystaloscillatorinput
Crystaloscillatoroutput
(1)
X2
O
I
FB
PLLfeedbackinputwhichshouldbe
connectedtoQ/Noutputpinonly. PLL
locks onto +ve edge of FB signal.
Sx
2
3
1
1
I
O
O
I
Mode/Frequencyselectinputs(three-level)
Clockoutputs
Qx
Q/N
OE
Programmabledivide-by-Nclockoutput
Tri-stateoutputenable.Whenasserted
HIGH,clockoutputs arehighimpedance.
VDDN
1
2
1
1
I
I
I
I
Powersupplyforoutputbuffers
Groundsupplyforoutputbuffers
Power supply for PLL
GNDN
VDDQ
GNDQ
GroundsupplyforPLL
NOTE:
1. For best accuracy, use parallel resonant crystal specified for a load
capacitance of 15pF.
FUNCTION TABLE
Output Used for
Allowable CLKIN Range (MHz)(1,2)
OutputFrequencyRelationships
Feedback
Minimum
25/N
Maximum
Q/N
Qx
Q/N
160/N
CLKIN
CLKIN x N
NOTES:
1. Operation in the specified CLKIN frequency range guarantees that the VCO will operate in the optimal range of 25MHz to 160MHz. Operation with
CLKIN outside specified frequency ranges may result in invalid or out-of-lock outputs.
2. Qx is not allowed to be used as feedback.
2
QS5925
PROGRAMMABLEFREQUENCYGENERATOR
INDUSTRIALTEMPERATURERANGE
DIVIDESELECTIONTABLE(1)
S1
S0
Divide-by-N Value
FACTORY TEST
Mode
(2)
L
L
L
M
H
L
2
3
PLL
PLL
PLL
PLL
PLL
PLL
PLL
L
M
M
M
H
H
H
4
(3)
M
H
L
5
6
7
M
H
8
(4)
16
TEST
NOTES:
1. H = HIGH
M = MEDIUM
L = LOW
2. Factory test mode: operation not specified.
3. Ethernet mode (use a 25MHz input frequency and Q/N as feedback).
4. Test mode for low frequency testing. In this mode, CLKIN bypasses the VCO (VCO powered down). Frequency must be > 1MHz due to dynamic
circuits in the frequency dividers. Q0 : Q2 outputs are divided by 2 in test mode.
OPERATINGCONDITIONS
Symbol
VDD
TA
Parameter
Min
3
Typ
3.3
25
Max
3.6
85
Unit
V
Power Supply Voltage
OperatingTemperature
–40
—
—
° C
pF
CL
OutputLoadCapacitance
—
5
15
CIN
Input Capacitance, CLKIN, FB, OE, F = 1MHz, VIN = 0V, TA = 25°C
7
pF
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
Symbol
Parameter
Input HIGH Voltage
Test Conditions
CLKIN, FB and OE
Min.
Typ.
Max.
Unit
VIH
2
—
—
V
(1)
VIHH
Sx
VDD - 0.6
—
—
—
—
VIL
Input LOW Voltage
CLKIN, FB and OE
Sx
0.8
V
(1)
VILL
—
—
0.6
(1)
VIMM
Input MID Voltage
Input HIGH Current
Sx
VDD/2 - 0.3
- 5
—
VDD/2 + 0.3
V
IIH
VIN = VDD; CLKIN, FB and OE
VIN = VDD; Sx
0.07
50
5
150
5
µA
IIHH
IIL
—
Input LOW Current
VIN = 0V; CLKIN, FB and OE
VIN = 0V; Sx
- 5
—
µA
IILL
IIMM
VOH
- 150
- 50
2.4
- 50
0
—
50
Input MID Current
VIN = VDD/2; Sx
VDD = 3V, IOH = -12mA
VDD = 3V, IOH = -100µA
VDD = 3V, IOL = 12mA
VDD = 3V, IOL = 100µA
µA
Output HIGH Voltage
2.8
—
—
—
0.55
0.2
V
2.8
VOL
Output LOW Voltage
—
0.15
—
V
—
NOTE:
1. These inputs are normally wired to Vcc, GND, or unconnected. If the inputs are switched in real time, the function and timing of the outputs may
glitch, and the PLL may require an additional lock time before all datasheet limits are achieved.
3
QS5925
PROGRAMMABLEFREQUENCYGENERATOR
INDUSTRIALTEMPERATURERANGE
POWER SUPPLY CHARACTERISTICS
(1)
Symbol
Parameter
Test Conditions
VDD = Max.
Min.
Typ.
Max
Unit
IDDQ
Quiescent Supply Current
—
0.7
2
mA
CLK = FB = X1 = GND
Sx = H
OE = H
All outputs unloaded
VDD = Max., VIN = 3V
∆IDD
Supply Current per Input
Dynamic Supply Current
—
—
1
30
µA
IDD
VDD = 3.6V
77
130
mA
S0 = MID; S1 = GND
OE = GND
FOUT = 60MHz
All outputs unloaded
NOTE:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
tR
Rise Time (1)
Fall Time (1)
Duty Cycle (1)
0.8V to 2V
2V to 0.8V
VT = VDD/2
VT = VDD/2
—
0.7
1.5
1.5
55
ns
tF
—
45
0.7
50
ns
%
ns
ps
dT
tPD
tSK
CLKIN to FB Propagation Delay (1)
Skew (output - output) (1)
- 1.6
—
- 0.95
—
- 0.5
300
600
200
75
VT = VDD/2; Qx
VT = VDD/2; Q/N - Qx
For N = 2 at 125MHz output (Qx)
VT = 1.5V
—
—
tJ
Cycle - Cycle Jitter (1)
CLKIN Duty Cycle (1)
CLKIN Rise Time (1)
CLKIN Fall Time (1)
Oscillator Frequency
Output Frequency
Input Frequency
—
—
ps
%
dT_INPUT
tR_INPUT
tF_INPUT
fOSC
25
—
0.8V to 2V
—
—
2
ns
0.8V to 2V
—
—
2
ns
—
—
—
30
MHz
MHz
MHz
fOUT
—
25
—
160
160/N
fIN
Q/N used for feedback
25/N
—
NOTE:
1. This parameter is guaranteed by design but not tested.
4
QS5925
PROGRAMMABLEFREQUENCYGENERATOR
INDUSTRIALTEMPERATURERANGE
TESTLOADSANDWAVEFORMS
3V
VCC
2V
CC
TH
V
= V
/2
0.8
0V
150Ω
1ns
1ns
OUTPUT
Input Test Waveform
15pF
150Ω
CC
V
2V
CC
VTH = V
/2
0.8
0V
AC Test Load
tR
tF
Output Waveform
HOW TO USE THE QS5925
ByconnectingQ/NtoFB(see Figure 1),the QS5925notonlybecomes
a zerodelaybuffer,butalsoa clockmultiplier.WithproperselectionofS0
andS1,theQ0–Q2outputswillgeneratetwo,three,uptoeighttimestheinput
clockfrequency.Whenusedinthismode,youmustmakesurethattheinput
and output frequency specifications are not violated (refer to Function
Table). There are some applications where higher fan-out is required.
These kinds of applications could be addressed by using the QS5925 in
conjunctionwithaclockbuffersuchas theQS53805.Figure2shows how
higherfan-outwithdifferentclockrates canbe generated.
The QS5925is a general-purpose phase-lockedloop(PLL)thatcanbe
usedas a zerodelaybufferora clockmultiplier.Itgenerates three outputs
atthe VCOfrequencyandone outputatthe VCOfrequencydividedbyn,
wherenisdeterminedbytheMode/FrequencySelectinputpinsS0andS1.
The PLL will adjust the VCO frequency (within the limits of the Function
Table) to ensure that the input frequency equals the Q/N frequency.
TheQS5925canaccepttwotypesofinputsignal. Thefirstisareference
clock generated by another device on the board which needs to be
reproducedwitha minimaldelaybetweenthe incomingclockandoutput.
Thesecondis anexternalcrystal. Whenusedinthefirstmode,thecrystal
input(X1)shouldbetiedtogroundandthecrystaloutput(X2)shouldbeleft
unconnected.
FB
FB
INA
5 COPIES
OF Q/N
Q/N
Q/N
CLKIN
CLKIN
Q0
Q1
Q2
QS5925
QS5925
QS53805
INB
X2
X1
X2
X1
5 COPIES
OF Q
QX
S0
S1
S0
S1
Figure 2
Figure 1
5
QS5925
PROGRAMMABLEFREQUENCYGENERATOR
INDUSTRIALTEMPERATURERANGE
ByconnectingoneoftheQS53805outputstotheFBinputoftheQS5925, shorted to the CLKIN (pin 7) as shown in Figure 3. For best accuracy, a
thepropagationdelayfromCLKINtotheoutputoftheQS53805willbenearly parallel resonant crystal with a crystal load capacitance rating of 15pF
zero.
shouldbe used.Toreduce the parasiticbetweenthe externalcrystaland
theQS5925,itisrecommendedtoconnectthecrystalascloseaspossible
to the X1 and X2 pins.
ThesecondwaytodrivetheinputoftheQS5925isviaanexternalcrystal.
When connecting an external crystal to pins 5 and 6, the X2 pin must be
CLKIN
QS5925
Q0
Q1
X2
XTAL
Q2
OSC
Q/N
X1
S0
S1
Figure 3
One of the questions often asked is what is the accuracy of our clock integer,theoutputfrequencyerror(oraccuracy)ismerelyafunctionofhow
generators? Inapplicationswhereclocksynthesizersareused,theterms
frequency accuracy and frequency error are used interchangeably.
Here, frequency accuracy (or error) is based on two factors. One is the
inputfrequencyandtheotheris themultiplicationfactor.Clockmultipliers
(or synthesizers) are governed by the equation:
accuratetheinputis. Forinstance,QS5925couldaccepttwoformsofinput,
onefromacrystaloscillator(seeFigure1)andtheotherfromacrystal(see
Figure3).Byusinga20MHzclockwithamultiplicationfactorof5(withan
accuracy of ±30 parts per million), one can easily have three copies of
100MHz of clock with ±30PPM of accuracy. Frequency accuracy is
definedbythe followingequation:
Output Frequency = (M)* Input Frequency
N
Accuracy = (Measured Freq. – Nominal Freq.)
Nominal Frequency
where “M”is the feedbackdivide and“N”is the reference divide. Ifthe
ratioofM/Nisnotaninteger,thentheoutputfrequencywillnotbeanexact
multiple ofthe input. Onthe otherhand,ifthe ratiowere a whole number,
where measured frequency is the average frequency over certain
number of cycles (typically 10,000) and the nominal frequency is the
the output clock would be an exact multiple of the input. In the case of desiredfrequency.
QS5925, since the reference divide (“N”) is “1”, the equation is a strong
functionofthefeedbackdivide(“M”). Inaddition,sincethefeedbackis an
6
QS5925
PROGRAMMABLEFREQUENCYGENERATOR
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
X
IDTQS
XXXX
Package
Device Type
Q
Quarter Size Outline Package (150 mil.) (SO16-7)
Programmable Frequency Generator
5925
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7
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