MPC9824FAR2 [IDT]
Processor Specific Clock Generator, 200MHz, PQFP32, LQFP-32;
| 型号： | MPC9824FAR2 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Processor Specific Clock Generator, 200MHz, PQFP32, LQFP-32 时钟 外围集成电路 晶体 |
| 文件： | 总12页 (文件大小：451K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Clock Generator for PowerQUICC and PowerPC MPC9824
Microprocessors and Microcontrollers
NRND – Not Recommend for New Designs
NRND
DATASHEET
The MPC9824 is a PLL based clock generator specifically designed for
Freescale Microprocessor and Microcontroller applications including the
PowerPC and PowerQUICC. This device generates the microprocessor input
clock and other microprocessor system and bus clocks at any one of eight output
frequencies. These frequencies include 33, 50, 66, 100, 125, 133.33, 166.66 and
200 MHz. The device offers six low skew clock outputs plus the three reference
outputs. The clock input reference is 25 MHz and may be derived from an
external source of by the addition of a 25 MHz crystal to the on-chip crystal
oscillator. The extended temperature range of the MPC9824 supports
telecommunication and networking requirements.
MPC9824
MICROPROCESSOR
CLOCK GENERATOR
Features
•
•
•
•
•
6 LVCMOS outputs for processor and other system circuitry
3 Buffered 25 MHz reference clock outputs
Crystal oscillator or external reference input
25 MHz Input reference frequency
FA SUFFIX
32-LEAD LQFP PACKAGE
CASE 873A-04
Selectable output frequencies = 33.33, 50, 66.66, 100, 125, 133.33, 166.66,
or 200 MHz
•
•
•
•
•
Low cycle-to-cycle and period jitter
Package = 32 lead LQFP
3.3 V supply
Supports computing, networking, telecommunications applications
Ambient temperature range -40°C to +85°C
AC SUFFIX
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 873A-04
Functional Description
The MPC9824 uses a PLL with a 25 MHz input reference frequency to generate a single bank of 6 configurable LVCMOS
output clocks. The output frequency of this bank is configurable by three FSEL pins. The 25 MHz reference may be either an
external frequency source or a 25 MHz crystal. The 25 MHz crystal is directly connected to the XTAL_IN and XTAL_OUT pins
with no additional components required. An external reference may be applied to the XTAL_IN pin with the XTAL_OUT pin left
floating. The input reference, whether provided by a crystal or an external input is also directly buffered to a second bank of
3 LVCMOS outputs. These outputs may be used as the clock source for processor I/O applications such as an Ethernet PHY.
The MPC9824 is packaged in a 32 lead LQFP package.
MPC9824 REVISION 2 FEBRUARY 15, 2013
1
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
QA0
BYPASS
QA1
SEL_XTAL
0
XTAL_IN
125,133.33,166.66,
200, 33.33, 50,
QA2
QA3
OSC
1
0
1
XTAL_OUT
REF_IN
Ref
66.66,100 MHz
PLL
400 MHz
or
QA4
QA5
500 MHz
FSEL0
FSEL1
FSEL2
Data
Generator
QREF0
QREF1
QREF2
25 MHz
MR/OE
Figure 1. MPC9824 Logic Diagram
Table 1. Pin configuration
Pin
I/O
Type
Function
QA0, QA1, QA2
QA3, QA4, QA5
Output
LVCMOS
Clock Outputs
QREF0, QREF1,
QREF2
Output
LVCMOS
Reference Output (25 MHz)
XTAL_IN
XTAL_OUT
REF_IN
Input
Output
Input
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
Crystal Oscillator Input Pin
Crystal Oscillator Output Pin
External Reference Input (internal pull-down)
SEL_XTAL
Input
Selects between XTAL or External Source (internal pull-up)
Configures Bank A Clock Output Frequency (internal pull-up)
FSEL0
FSEL1
FSEL2
Input
BYPASS
MR/OE
VDDA
Input
Input
LVCMOS
LVCMOS
Test Mode to Bypass PLL (active low, internal pull-up)
Master Reset (internal pull-down)
Analog Supply, An external filter is recommended
3.3 V Supply
VDD
—
—
—
—
GND
Ground
MPC9824 REVISION 2 FEBRUARY 15, 2013
2
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 2. FSEL Function Table
VCO
Frequency
Output
Frequency
FSEL0
FSEL1
FSEL2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
400
400
400
400
500
500
400
400
33.33 MHz
66.66 MHz
50 MHz
100 MHz
125 MHz
166.66 MHz
133.33 MHz
200 MHz
Table 3. Function Table
Control
0
1
SEL_XTAL
BYPASS
MR/OE
External Reference
PLL Bypassed
Normal
Crystal Input
Normal Operation
Reset
24 23 22 21 20 19 18 17
25
VDD
QA5
QA4
16
26
27
15
QREF2
GND
GND
14
28
29
30
QREF1
VDD
QA3
QA2
VDD
13
12
11
MPC9824
QREF0
GND
NC
31
32
QA1
QA0
10
9
1
2
3
4
5
6
7
8
Figure 2. MPC9824 32-Lead LQFP Package Pinout (Top View)
MPC9824 REVISION 2 FEBRUARY 15, 2013
3
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
MPC9824 OPERATION
Crystal Oscillator
If more precise frequency control is desired, the addition of
capacitors from each of the XTAL_IN and XTAL_OUT pins to
ground may be used to trim the frequency as shown in Figure
3. In this case the recommended crystal should have a CL =
18 pF.
In either case the crystal should be located as close to the
MPC9824 XTAL_IN and XTAL_OUT pins as possible to
minimize any board level parasitic capacitance.
The MPC9824 features a fully integrated Pierce oscillator
to minimize system implementation costs. The MPC9824
may be operated with a 25 MHz crystal without other compo-
nents. For operation without external components, the crystal
selection should be of a 25 MHz parallel resonant type with a
load specification of CL = 10 pF. See Table 4 for complete
crystal specifications.
Table 4. Crystal Specifications
Parameter
Value
Value (with trim caps)
Fundamental AT Cut
Parallel Resonance
5–7 pF
Crystal Cut
Fundamental AT Cut
Parallel Resonance
5–7 pF
Resonance
Shunt Capacitance (CO)
Load Capacitance (CL)
18 pF
18 pF
Equivalent Series Resistance (ESR) 20–50
20–50
Figure 3 Crystal with Trim Caps
*NOTE: These are recommended values and are subject to change due to specific crystal paramter and board layout. Refer to
ICS Application Notes for futher information on the crystal selection.
Power-Supply Bypassing
The MPC9824 should have all VDD pins bypassed with
0.01 µF capacitors and a minimum of one 1.0 µF capacitor for
the overall package. All capacitors should be located as close
to the package as possible.
RF = 10-15
CF = 22 F
VDDA
MPC9824
VDD
C2
An external RC filter from VDD to VDDA is recommended as
shown in Figure 4.
VDD
C1, C2 = 0.01...0.1 F
C1
Figure 4. Power Supply Filter
©2013 Integrated Device Technology, Inc.
MPC9824 REVISION 2 FEBRUARY 15, 2013
4
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 5. Absolute Maximum Ratings(1)
Symbol
VDD
IIN
Characteristics
Min
Max
3.8
Unit
V
Condition
Supply Voltage
–0.3
DC Input Current
±20
±75
125
mA
mA
°C
IOUT
TS
DC Output Current
Storage Temperature
–65
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated
conditions is not implied.
Table 6. General Specifications
Symbol
VTT
Characteristics
Output Termination Voltage
Min
Typ
Max
Unit
V
Condition
VDD ÷ 2
MM
ESD Protection (Machine model)
ESD Protection (Human body model)
Latch-Up Immunity
200
2000
200
V
HBM
LU
V
mA
CIN
Input Capacitance
4
pF Inputs
TC
Ambient Temperature
–40
85
75
°C
CPD
Power Dissipation Capacitance
10
pF Per output
RPU, RPD Pull-up/Pull-down Resistance
K
Table 7. DC Characteristics (VDD = 3.3 V ± 5%, TA = –40°C to +85°C)
Symbol
VIH
Characteristics
Input High Voltage (xtal_in)
Input High Voltage
Min
2.4
2.0
Typ
Max
VDD + 0.3
VDD + 0.3
0.8
Unit
V
Condition
Input threshold = VDD/2
VIH
V
VIL
Input Low Voltage
V
LVCMOS
IIN
Input Current(1)
±150
A
V
VIN = VDD or GND
VOH
VOL
ZOUT
IDD
Output High Voltage
2.4
IOH = –12 mA
IOL = 12 mA
Output Low Voltage
0.4
V
Output Impedance
14
Maximum Quiescent Supply Current
3.5
6.5
mA VDD pins, output not
loaded
IDDA
Maximum Quiescent Supply Current
mA VDDA pins, output not
loaded
1. Inputs have pull-down or pull-down resistors affecting the input current.
MPC9824 REVISION 2 FEBRUARY 15, 2013
5
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Table 8. AC Characteristics (VDD = 3.3 V ± 5%, TA = –40°C to +85°C) (1)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Input and Output Timing Specification
fref
Input Reference Frequency (25 MHz input)
XTAL Input
25
25
MHz
MHz
fVCO
VCO Frequency Range
MHz
FSEL0, FSEL1, FSEL2 = 000,001,
010,011,110,111
FSEL0, FSEL1, FSEL2 = 100,101
400
500
fMCX
Output Frequency (QAx)
PLL locked
FSEL0, FSEL1, FSEL2 = 000
FSEL0, FSEL1, FSEL2 = 001
FSEL0, FSEL1, FSEL2 = 010
FSEL0, FSEL1, FSEL2 = 011
FSEL0, FSEL1, FSEL2 = 100
FSEL0, FSEL1, FSEL2 = 101
FSEL0, FSEL1, FSEL2 = 110
FSEL0, FSEL1, FSEL2 = 111
Output Frequency (QREFx)
33.33
66.66
50
100
125
166.66
133.33
200
MHz
25
DC
fout
Output Duty Cycle
Output Frequency Accuracy
45
0
50
55
%
Crystal(2)
External Reference
100
0
ppm
ppm
PLL Specifications
BW
PLL Closed Loop Bandwidth(3)
500
kHz
ms
tLOCK
Maximum PLL Lock Time
10
Skew and Jitter Specifications
tsk(O)
Output-to-Output Skew
Cycle-to-Cycle Jitter
100
100
75
ps
ps
ps
ps
ps
ps
within bank
QA output
QA output
tJIT(CC)
tJIT(PER) Period Jitter
tJIT(Ø) I/O Phase Jitter, RMS
tr, tf Output Rise/Fall Time
30
750
2.5
20% to 80%
QREF pin
tJIT
Phase Noise Jitter, RMS; 25MHz,
Integration Range: 1.875MHz - 20MHz
1. AC characteristics apply for parallel output termination of 50 to VTT
.
2. Based upon recommended crystal specifications and tune-in capacitors as outlined in operation section..
3. dB point of PLL transfer characteristics.
Z = 50
Z = 50
Pulse
Generator
Z = 50
DUT MPC9824
RT = 50
RT = 50
VTT
VTT
Figure 5. MPC9824 AC Test Reference (LVCMOS Outputs)
MPC9824 REVISION 2 FEBRUARY 15, 2013
6
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
RELIABILITY INFORMATION
Table 9. JA vs. Air Flow Table for 32 Lead LQFP
JA BY VELOCITY (LINEAR FEET PER MINUTE)
67.8°C/W
55.9°C/W
50.1°C/W
47.9°C/W
42.1°C/W
39.4°C/W
0
200
500
Single-Laye PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
MPC9824 REVISION 2 FEBRUARY 15, 2013
7
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 2 OF 3
CASE 873A-04
ISSUE C
32-LEAD LQFP PACKAGE
MPC9824 REVISION 2 FEBRUARY 15, 2013
8
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 3 OF 3
CASE 873A-04
ISSUE C
MPC9824 REVISION 2 FEBRUARY 15, 2013
9
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
PACKAGE DIMENSIONS
PAGE 1 OF 3
CASE 873A-04
ISSUE C
32-LEAD LQFP PACKAGE
MPC9824 REVISION 2 FEBRUARY 15, 2013
10
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
Revision History Sheet
Rev
Table
Page
Description of Change
NRND – Not Recommend for New Designs
Date
2
1
2/15/2013
MPC9824 REVISION 2 FEBRUARY 15, 2013
11
©2013 Integrated Device Technology, Inc.
MPC9824 Data Sheet
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS
We’ve Got Your Timing Solution
6024 Silver Creek Valley Road Sales
Technical Support
800-345-7015 (inside USA)
netcom@idt.com
San Jose, California 95138
+408-284-8200 (outside USA) +480-763-2056
Fax: 408-284-2775
www.IDT.com/go/contact IDT
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document,
including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not
guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the
suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any
license under intellectual property rights of IDT or any third parties.
IDT’s products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to signifi-
cantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third
party owners.
Copyright 2013. All rights reserved.
相关型号：
MPC9855VM
200MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA100, 11 X 11 MM, 1 MM PITCH, LEAD FREE, MAPBGA-100
NXP
©2020 ICPDF网 联系我们和版权申明