2N7622U2 [INFINEON]
RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-2); 抗辐射的逻辑电平功率MOSFET表面贴装( SMD - 2 )型号: | 2N7622U2 |
厂家: | Infineon |
描述: | RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-2) |
文件: | 总9页 (文件大小:207K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD-97174A
2N7622U2
IRHLNA797064
60V, P-CHANNEL
RADIATION HARDENED
LOGIC LEVEL POWER MOSFET
SURFACE MOUNT (SMD-2)
TECHNOLOGY
Product Summary
Part Number
Radiation Level RDS(on)
ID
IRHLNA797064 100K Rads (Si)
IRHLNA793064 300K Rads (Si)
0.015Ω -56A*
0.015Ω -56A*
SMD-2
International Rectifier’s R7TM Logic Level Power
MOSFETs provide simple solution to interfacing
CMOS and TTL control circuits to power devices in
space and other radiation environments. The
threshold voltage remains within acceptable
operating limits over the full operating temperature
and post radiation. This is achieved while maintaining
single event gate rupture and single event burnout
immunity.
Features:
n
n
n
n
n
n
n
n
n
n
5V CMOS and TTL Compatible
Fast Switching
Single Event Effect (SEE) Hardened
Low Total Gate Charge
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Ceramic Package
Surface Mount
These devices are used in applications such as
current boost low signal source in PWM, voltage
comparator and operational amplifiers.
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
Units
I
@V
@V
= -4.5V,T = 25°C Continuous Drain Current
-56*
-56*
D
D
GS
GS
C
A
I
= -4.5V,T = 100°C Continuous Drain Current
C
I
Pulsed Drain Current À
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy Á
Avalanche Current À
-224
250
DM
@ T = 25°C
P
D
W
W/°C
V
C
2.0
V
±10
GS
E
1060
-56
mJ
A
AS
I
AR
E
Repetitive Avalanche Energy À
Peak Diode Recovery dv/dt Â
Operating Junction
25
mJ
V/ns
AR
dv/dt
-3.7
T
-55 to 150
J
T
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
°C
g
STG
300 (for 5s)
3.3 (Typical)
* Current is limited by package
For footnotes refer to the last page
www.irf.com
1
06/11/07
IRHLNA797064, 2N7622U2
Pre-Irradiation
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min Typ Max Units
Test Conditions
BV
Drain-to-Source Breakdown Voltage
-60
—
—
V
V
= 0V, I = -250µA
D
DSS
GS
Reference to 25°C, I = -1.0mA
∆BV
/∆T Temperature Coefficient of Breakdown
—
-0.06
—
V/°C
DSS
J
D
Voltage
R
V
Static Drain-to-Source On-State
Resistance
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
Forward Transconductance
Zero Gate Voltage Drain Current
—
—
0.015
Ω
V
= -4.5V, I = -56A
GS D
Ã
DS(on)
-1.0
—
82
—
—
4.1
—
—
—
-2.0
—
—
-1.0
-10
V
mV/°C
S
V
DS
= V , I = -250µA
GS(th)
GS
D
∆V
g
/∆T
J
GS(th)
fs
V
= -15V, I
= -56A Ã
DS
DS
I
V
= -48V ,V =0V
DSS
DS GS
µA
nA
nC
—
V
= -48V,
DS
= 0V, T = 125°C
V
GS
J
I
I
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
-100
100
190
53
56
38
265
210
70
V
GS
= -10V
GSS
GSS
V
GS
= 10V
Q
Q
Q
V
= -4.5V, I = -56A
g
gs
gd
d(on)
r
GS D
V
DS
= -30V
t
t
t
t
V
V
GS
= -30V, I = -56A,
D
DD
= -6.0V, R = 2.35Ω
G
ns
d(off)
f
L
S
+ L
—
Measured from the center of
D
nH
drain pad to center of source pad
Ciss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
10520
2780
310
—
—
—
V
GS
= 0V, V
= -25V
f = 1.0MHz
DS
C
C
pF
oss
rss
f = 1.0MHz, open drain
Ω
R
Gate Resistance
2.3
g
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
Test Conditions
I
I
V
t
Q
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
—
—
—
—
-56*
-224
-5.0
159
430
S
SM
SD
rr
A
V
ns
nC
T = 25°C, I = -56A, V
= 0V Ã
j
S
GS
T = 25°C, I = -56A, di/dt ≤ -100A/µs
j
F
V
DD
≤ -25V Ã
RR
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L + L .
S D
* Current is limited by package
Thermal Resistance
Parameter
Min Typ Max Units
Test Conditions
R
R
Junction-to-Case
Junction-to-PC board
—
—
—
1.6
0.5
—
thJC
thJ-PCB
°C/W
soldered to a 2 square copper-cladboard
Note: Corresponding Spice and Saber models are available on International Rectifier Web site.
For footnotes refer to the last page
2
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Radiation Characteristics
IRHLNA797064, 2N7622U2
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation ÄÅ
Parameter
Upto 300K Rads (Si)1 Units
Test Conditions
Min
Max
BV
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
-60
-1.0
—
—
—
—
V
V
= 0V, I = -250µA
DSS
GS D
V
V
-2.0
-100
100
-10
= V , I = -250µA
GS
GS(th)
DS
D
I
I
I
V
V
GS
= -10V
= 10V
GSS
GSS
DSS
GS
nA
µA
V
= -48V, V =0V
GS
DS
R
DS(on)
Static Drain-to-Source
On-State Resistance (TO-3)
—
0.015
Ω
V
GS
= -4.5V, I = -56A
D
R
DS(on)
Static Drain-to-Source On-state
Resistance (SMD-2)
—
—
0.015
-5.0
Ω
V
= -4.5V, I = -56A
D
GS
V
Diode Forward Voltage
V
V
= 0V, I = -56A
GS
D
SD
1. Part numbers IRHLNA797064, IRHLNA793064
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion
LET
Energy Range
VDS (V)
(MeV/(mg/cm2)) (MeV)
(µm)
@VGS= @VGS= @VGS= @VGS= @VGS= @VGS= @VGS= @VGS=
0V
2V
4V
5V
6V
7V
8V
10V
Br
I
37
60
82
305
370
390
39
34
30
-60
-60
-60
-60
-60
-60
-60
-60
-60
-60
-40
-
-40
-20
-
-30
-25
-20
-
-
-
-
-
-
Au
-70
-60
-50
-40
-30
-20
-10
0
Br
I
Au
0
1
2
3
4
5
6
7
8
9 10
VGS
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHLNA797064, 2N7622U2
Pre-Irradiation
10000
1000
100
10
10000
VGS
VGS
-10V
TOP
-10V
-7.5V
-5.0V
-4.5V
-3.5V
-3.0V
-2.5V
TOP
-7.5V
-5.0V
-4.5V
-3.5V
-3.0V
-2.5V
1000
100
10
BOTTOM -2.25V
BOTTOM -2.25V
-2.25V
-2.25V
60µs PULSE WIDTH
Tj = 150°C
µ
60 s PULSE WIDTH
Tj = 25°C
1
1
0.1
1
10
100
0.1
1
10
100
-V
, Drain-to-Source Voltage (V)
-V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000
100
10
1.5
1.0
0.5
I
= -56A
D
T
= 25°C
J
T
J
= 150°C
V
= -25V
DS
V
= -4.5V
GS
60µs PULSE WIDTH
2
2.5
3
3.5
4
-60 -40 -20
0
20 40 60 80 100 120 140 160
-V , Gate-to-Source Voltage (V)
T , Junction Temperature (°C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs.Temperature
4
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Pre-Irradiation
IRHLNA797064, 2N7622U2
30
25
20
15
10
5
18
16
14
12
10
8
I
= -56A
T
= 150°C
D
J
T
T
= 150°C
J
= 25°C
T
= 25°C
J
J
Vgs = -4.5V
80
0
2
4
6
8
10
12
0
20
40
60
100
-I , Drain Current (A)
-V
Gate -to -Source Voltage (V)
D
GS,
Fig 5. Typical On-Resistance Vs
Fig 6. Typical On-Resistance Vs
GateVoltage
DrainCurrent
2.0
75
70
65
60
55
50
I
= -1.0mA
D
1.5
1.0
0.5
0.0
I
= -50µA
D
D
D
D
I
I
I
= -250µA
= -1.0mA
= -150mA
-60 -40 -20
0
20 40 60 80 100 120 140 160
, Temperature ( °C )
-60 -40 -20
0
20 40 60 80 100 120 140 160
, Temperature ( °C )
T
J
T
J
Fig 7. Typical Drain-to-Source
BreakdownVoltageVsTemperature
Fig 8. Typical Threshold Voltage Vs
Temperature
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5
IRHLNA797064, 2N7622U2
Pre-Irradiation
16000
12
8
V
= 0V,
= C
f = 1 MHz
GS
V
V
= -48V
I
= -56A
C
C
C
+ C , C
SHORTED
DS
DS
D
iss
gs
gd
ds
14000
12000
10000
8000
6000
4000
2000
0
= -30V
= C
rss
oss
gd
VDS= -12V
= C + C
ds
gd
C
iss
C
oss
4
FOR TEST CIRCUIT
SEE FIGURE 17
C
rss
0
1
10
100
0
50
Q
100
150
200
250
300
-V , Drain-to-Source Voltage (V)
DS
Total Gate Charge (nC)
G,
Fig 9. Typical Capacitance Vs.
Fig 10. Typical Gate Charge Vs.
Drain-to-SourceVoltage
Gate-to-SourceVoltage
1000
120
100
80
60
40
20
0
LIMITED BY PACKAGE
T
= 150°C
J
100
10
1
T
= 25°C
J
V
= 0V
GS
0.1
0
1
2
3
4
5
25
50
75
100
125
150
-V
, Source-to-Drain Voltage (V)
SD
TC , Case Temperature (°C)
Fig 11. Typical Source-to-Drain Diode
Fig12. Maximum Drain Current Vs.
ForwardVoltage
CaseTemperature
6
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Pre-Irradiation
IRHLNA797064, 2N7622U2
1000
2400
2000
1600
1200
800
400
0
OPERATION IN THIS AREA
LIMITED BY R (on)
I
D
DS
00µ
s
1
TOP
-25A
-35.4A
BOTTOM -56A
100
10
1
1ms
10ms
Tc = 25°C
Tj = 150°C
Single Pulse
1
10
, Drain-to-Source Voltage (V)
100
25
50
75
100
125
150
-V
Starting T , Junction Temperature (°C)
DS
J
Fig 13. Maximum Safe Operating Area
Fig 14. Maximum Avalanche Energy
Vs. DrainCurrent
1
D = 0.50
0.20
0.10
0.1
P
DM
t
1
0.05
SINGLE PULSE
( THERMAL RESPONSE )
t
2
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 15. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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7
IRHLNA797064, 2N7622U2
Pre-Irradiation
L
I
AS
V
DS
-
+
D.U.T
AS
R
G
VDD
A
I
DRIVER
V
-20V
GS
0.01
Ω
t
p
t
p
15V
V
(BR)DSS
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
Current Regulator
Same Type as D.U.T.
50KΩ
Q
Q
G
.2µF
-12V
-4.5V
.3µF
-
Q
V
GS
GD
+
DS
D.U.T.
V
GS
V
G
-3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 17a. Basic Gate Charge Waveform
Fig 17b. Gate Charge Test Circuit
RD
VDS
t
t
r
t
t
f
d(on)
d(off)
V
GS
VGS
D.U.T.
10%
RG
-
+
VDD
VGS
90%
PulseWidth ≤ 1 µs
Duty Factor≤ 0.1 %
V
DS
Fig 18b. Switching Time Waveforms
Fig 18a. Switching Time Test Circuit
8
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Pre-Irradiation
Footnotes:
IRHLNA797064, 2N7622U2
à Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Total Dose Irradiation with V Bias.
À
Repetitive Rating; Pulse width limited by
maximum junction temperature.
Ä
GS
= 0 during
-10 volt V
applied and V
Á
V
= -25V, starting T = 25°C, L= 0.67mH
J
GS
irradiation per MIL-STD-750, method 1019, condition A.
DS
DD
Peak I = -56A, V
= -10V
L
GS
Å Total Dose Irradiation with V
Bias.
 I
≤ -56A, di/dt ≤ -380A/µs,
DS
= 0 during
SD
DD
-48 volt V
applied and V
V
≤ -60V, T ≤ 150°C
DS
irradiation per MlL-STD-750, method 1019, condition A.
GS
J
Case Outline and Dimensions — SMD-2
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
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TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 06/2007
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9
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