ICE2PCS04HKLA1 [INFINEON]
Power Factor Controller, Current-mode, 138kHz Switching Freq-Max, PDIP8, GREEN, PLASTIC, DIP-8;
| 型号： | ICE2PCS04HKLA1 |
| 厂家： | 
Infineon |
| 描述： | Power Factor Controller, Current-mode, 138kHz Switching Freq-Max, PDIP8, GREEN, PLASTIC, DIP-8 光电二极管 |
| 文件： | 总20页 (文件大小：429K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Version 2.1, 22 March 2010
CCM-PFC
ICE2PCS04
ICE2PCS04G
Standalone Power Factor
Correction (PFC) Controller in
Continuous Conduction Mode
(CCM) with Input Brown-Out
Protection
Power Management & Supply
N e v e r s t o p t h i n k i n g .
CCM-PFC
Revision History:
2010-03-22
Datasheet
Previous Version:
Page
Subjects(major changes since last version)
Package outline dimension
18&19
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www.infineon.com
CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG.
Edition 2010-03-22
Published by
Infineon Technologies AG
81726 München, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
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Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
CCM-PFC
ICE2PCS04
ICE2PCS04G
Standalone Power Factor Correction (PFC)
Controller in Continuous Conduction Mode
ICE2PCS04
PG-DIP-8
(CCM) with Input Brown-Out Protection
Product Highlights
•
•
•
•
•
•
•
Leadfree DIP and DSO Package
Wide Input Range
Direct sensing, Input Brown-Out Detection
Optimized for applications which require fast Startup
Output Power Controllable by External Sense Resistor
Fast Output Dynamic Response during Load Jumps
Trimmed, internal fixed Switching Frequency (133kHz)
ICE2PCS04G
PG-DSO-8
Features
Description
The ICE2PCS04/G is a 8-pin wide input range controller
IC for active power factor correction converters. It is de-
signed for converters in boost topology, and requires few
•
•
•
•
Ease of Use with Few External Components
Supports Wide Input Range
Average Current Control
External Current and Voltage Loop Compensation external components. Its power supply is recommended
for Greater User Flexibility
to be provided by an external auxiliary supply which will
switch on and off the IC.
•
•
Trimmed internal fixed Switching Frequency
(133kHz+5% at 25oC)
The IC operates in the CCM with average current control,
and in DCM only under light load condition. The switching
frequency is trimmed and fixed internally at 133kHz. Both
current and voltage loop compensations are done exter-
nally to allow full user control.
Direct sensing, Input Brown-Out Detection
with Hysteresis
Short Startup(SoftStart) duration
Max Duty Cycle of 95% (typ)
•
•
•
•
•
•
•
•
•
•
Trimmed Internal Reference Voltage (3V+2%)
VCC Under-Voltage Lockout
Cycle by Cycle Peak Current Limiting
Output Over-Voltage Protection
Open Loop Detection
Soft Overcurrent Protection
Enhanced Dynamic Response
Fulfills Class D Requirements of IEC 1000-3-2
There are various protection features incorporated to en-
sure safe system operation conditions. The internal refer-
ence is trimmed (3V+2%) to ensure precise protection and
output control level.
Typical Application
VOUT
Auxiliary Supply
VCC
EMI-Filter
85 ... 265 VAC
CCM PFC
ICE2PCS04/G
VINS
Brown-out
Protection Unit
GATE
VSENSE
VCOMP
PWM Logic
Driver
Voltage Loop
Compensation
Fixed
Oscillator
Ramp
Generator
ICOMP
Current Loop
Compensation
Nonlinear
Gain
ISENSE
GND
Type
Package
PG-DIP-8
PG-DSO-8
ICE2PCS04
ICE2PCS04G
Version 2.0
3
22 March 2010
CCM-PFC
ICE2PCS04/G
1
1.1
1.2
Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Representative Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
3.1
3.2
3.3
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
System Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Input Brown-Out Protection (IBOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Soft Over Current Control (SOC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Peak Current Limit (PCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Open Loop Protection (OLP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Over-Voltage Protection (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Fixed Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Average Current Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Complete Current Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Pulse Width Modulation (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Nonlinear Gain Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PWM Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Voltage Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Voltage Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Enhanced Dynamic Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
3.5
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.7
3.8
3.8.1
3.8.2
3.9
4
4.1
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
System Protection Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Current Loop Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Voltage Loop Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Driver Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5
Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Version 2.0
4
22 March 2010
CCM-PFC
ICE2PCS04/G
Pin Configuration and Functionality
1
Pin Configuration and Functionality
1.1
Pin Configuration
ICOMP (Current Loop Compensation)
Low pass filter and compensation of the current control
loop. The capacitor which is connected at this pin
integrates the output current of OTA2 and averages the
current sense signal.
Pin
Symbol Function
1
2
3
4
5
6
7
8
GND
IC Ground
ICOMP Current Loop Compensation
ISENSE Current Sense Input
ISENSE (Current Sense Input)
The ISENSE Pin senses the voltage drop at the
external sense resistor (R1). This is the input signal for
the average current regulation in the current loop. It is
also fed to the peak current limitation block.
VINS
Brown-out Sense Input
VCOMP Voltage Loop Compensation
VSENSE VOUT Sense (Feedback) Input
During power up time, high inrush currents cause high
negative voltage drop at R1, driving currents out of pin
3 which could be beyond the absolute maximum
ratings. Therefore a series resistor (R2) of around
220W is recommended in order to limit this current into
the IC.
VCC
IC Supply Voltage
Gate Drive Output
GATE
VINS (Brown-out Sense Input)
This VINS pin senses a filtered input voltage divider
and detects for the input voltage Brown-out condition.
A Brown-out condition of VINS<0.71V, shuts down the
IC. The IC turns on at VINS>1.5V.
Package PG-DIP-8 / PG-DSO-8
GND
ICOMP
ISENSE
VINS
1
8
7
6
5
GATE
VCC
VSENSE (Voltage Sense/Feedback)
The output bus voltage is sensed at this pin via a
resistive divider. The reference voltage for this pin is
3V.
2
VCOMP (Voltage Loop Compensation)
3
4
VSENSE
This pin provides the compensation of the output
voltage loop with a compensation network to ground
(see Figure 2).
VCOMP
VCC (Power Supply)
The VCC pin is the positive supply of the IC and should
be connected to an external auxiliary supply. The
operating range is between 11V and 26V. The turn-on
threshold is at 11.8V and under voltage occurs at 11V.
There is no internal clamp for a limitation of the power
supply.
Figure 1
Pin Configuration (top view)
GATE
1.2
Pin Functionality
The GATE pin is the output of the internal driver stage,
which has a capability of 1.5A instantaneous source
and 2.0A instantaneous sink current.
GND (Ground)
The ground potential of the IC.
Its gate drive voltage is internally clamped at 15.0V
(typically).
Version 2.0
5
22 March 2010
CCM-PFC
ICE2PCS04/G
Representative Block diagram
2
Representative Block diagram
Figure 2
Representative Block diagram
Version 2.0
6
22 March 2010
CCM-PFC
ICE2PCS04/G
Functional Description
3
Functional Description
If VCC drops below 11V, the IC is off. The IC will then
be consuming typically 300mA, whereas consuming
10mA during normal operation.
The IC can be turned off and forced into standby mode
by pulling down the voltage at pin 6 (VSENSE) to lower
than 0.6V. In this standby mode, the current
consumption is reduced to 300mA. Other condition that
can result in the standby mode is when a Brown-out
condition occurs, ie pin 4 (VINS) <0.71V.
3.1
General
The ICE2PCS04/G is a 8 pin control IC for power factor
correction converters. It comes in both DIP and DSO
packages and is suitable for wide range line input
applications from 85 to 265 VAC. The IC supports
converters in boost topology and it operates in
continuous conduction mode (CCM) with average
current control.
It is a design derivative from the ICE2PCS01/G with the
differences in the supporting functions, namely the
input brown-out detection and internal fixed switching
frequency 133kHz.
3.3
Start-up
Figure 4 shows the operation of voltage loop’s OTA1
during startup. The VCOMP pin is pull internally to
ground via switch S1 during UVLO and other fault
conditions (see later section on “System Protection”).
The IC operates with a cascaded control; the inner
current loop and the outer voltage loop. The inner
current loop of the IC controls the sinusoidal profile for
the average input current. It uses the dependency of
the PWM duty cycle on the line input voltage to
determine the corresponding input current. This means
the average input current follows the input voltage as
long as the device operates in CCM. Under light load
condition, depending on the choke inductance, the
system may enter into discontinuous conduction mode
(DCM) resulting in a higher harmonics but still meeting
the Class D requirement of IEC 1000-3-2.
During power up when VOUT is less than 83% of the
rated level, OTA1 sources an output current, maximum
30mA into the compensation network at pin 5 (VCOMP)
causing the voltage at this pin to rise linearly. This
results in a controlled linear increase of the input
current from 0A thus reducing the stress on the
external component.
The outer voltage loop controls the output bus voltage.
Depending on the load condition, OTA1 establishes an
appropriate voltage at VCOMP pin which controls the
amplitude of the average input current.
VSENSE
R4
x VOUT
)
(
R3 + R4
The IC is equipped with various protection features to
ensure safe operating condition for both the system
and device.
OTA1
3V
VCOMP
3.2
Power Supply
protect
S1
R6
C4
An internal under voltage lockout (UVLO) block
monitors the VCC power supply. As soon as it exceeds
11.8V and both voltages at pin 6 (VSENSE) >0.6V and
pin 4 (VINS) >1.5V, the IC begins operating its gate
drive and performs its Startup as shown in Figure 3.
C5
ICE2PCS04/G
Figure 4
Startup Circuit
.
As VOUT has not reached within 5% from the rated
value, VCOMP voltage is level-shifted by the window
detect block as shown in Figure 5, to ensure there is
fast boost up output voltage.
(VVSENSE > 0.6 V) (VVSENSE < 0.6 V)
(VVSENSE > 0.6 V)
AND (VVINS > 1.5 V) OR (VVINS < 0.8 V) AND (VVINS > 1.5 V)
VCC
When VOUT approaches its rated value, OTA1’s
sourcing current drops and so does the level shift of the
window detect block is removed. The normal voltage
loop then takes control.
11.8 V
11.0 V
OFF
t
IC's
State
Start
Up
Normal
Operation
Normal
Operation
Open loop/
Standby
OFF
Figure 3
State of Operation respect to VCC
Version 2.0
7
22 March 2010
CCM-PFC
ICE2PCS04/G
Functional Description
.
VOUT
VOUT,Rated
108%
100%
Normal Control
VOUT =rated
Window Detect
Max Vcomp current
VOUT
20%
95%rated
83%rated
t
Supply
related
UVLO / IBOP
t
Current
related
PCL / SOC
Level-shifted VCOMP
Output
related
av(IIN)
OLP
OVP
OLP
VCOMP
Figure 6
3.4.1
Protection Features
Input Brown-Out Protection (IBOP)
t
Brown-out occurs when the input voltage VIN falls below
the minimum input voltage of the design (i.e. 85V for
universal input voltage range) and the VCC has not
entered into the VCCUVLO level yet. For a system without
IBOP, the boost converter will increasingly draw a
higher current from the mains at a given output power
which may exceed the maximum design values of the
input current.
Figure 5
Startup with controlled maximum current
ICE2PCS04/G provides a new IBOP feature whereby it
senses directly the input voltage for Input Brown-Out
condition via an external resistor/capacitor/diode
network as shown in Figure 7. This network provides a
filtered value of VIN which turns the IC on when the
voltage at pin 4 (VINS) is more than 1.5V. The IC enters
into the standby mode when VINS goes below 0.71V.
The hysteresis prevents the system to oscillate
between normal and standby mode. Note also that VIN
needs to at least 20% of the rated VOUT in order to
overcome OLP and powerup the system.
3.4
System Protection
The IC provides several protection features in order to
ensure the PFC system in safe operating range:
•
•
•
•
•
•
VCC Undervoltage Lockout (UVLO)
Input Brown-out Detection (IBOP)
Soft Over Current Control (SOC)
Peak Current Limit (PCL)
Open-Loop Detection (OLP)
Output Over-Voltage Protection (OVP)
D2 ... D5
Vin
After the system is supplied with the correct level of
VCC and VIN, the system will enter into its normal mode
of operation. Figure 6 shows situation when these
protections features are active, as a function of the
C1
85 ... 265 VAC
output voltage VOUT
.
Brown-Out Detection
R8
An activation of the UVLO, IBOP and OLP results in the
internal fault signal going high and brings the IC into the
standby mode.
0.71V
D7
C4
VINS
80k
brown-out
S
R
As the function of UVLO has already described in the
earlier “Power Supply” section, the following sections
continue to describe the functionality of these
protection features.
C5
1.5V
C6
R9
3.5V
ICE2PCS04/G
Input Brown-Out Protection (IBOP)
Figure 7
Version 2.0
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22 March 2010
CCM-PFC
ICE2PCS04/G
Functional Description
3.4.2
Soft Over Current Control (SOC)
The IC is designed not to support any output power
that corresponds to a voltage lower than -0.75V at the
ISENSE pin. A further increase in the inductor current,
which results in a lower ISENSE voltage, will activate
the Soft Over Current Control (SOC). This is a soft
control as it does not directly switch off the gate drive.
It acts on the nonlinear gain block to result in a reduced
PWM duty cycle.
Current Limit
1.5V
Full-wave
Rectifier
Deglitcher
300ns
Turn Off
Driver
C2
ISENSE
R2
1.43x
IINDUCTOR
R1
OP1
POUT(rated)
POUT(max)
ICE2PCS04/G
IC’s
Normal
State Operation
Figure 9
3.4.4
Peak Current Limit (PCL)
SOC
PCL
Open Loop Protection (OLP)
Whenever VSENSE voltage falls below 0.6V, or
equivalently VOUT falls below 20% of its rated value, it
indicates an open loop condition (i.e. VSENSE pin not
connected) or an insufficient input voltage VIN for
normal operation. In this case, most of the blocks within
the IC will be shutdown. It is implemented using
comparator C3 with a threshold of 0.6V as shown in the
IC block diagram in Figure 2.
VISENSE
-0.61V -0.75V
-1.04V
0
Figure 8
SOC and PCL Protection as function of
VISENSE
The rated output power with a minimum VIN (VINMIN) is
0.61
POUT(rated) = VINMIN
´
------------------
3.4.5
Over-Voltage Protection (OVP)
R1 ×
2
Whenever VOUT exceeds the rated value by 5%, the
over-voltage protection OVP is active as shown in
Figure 6. This is implemented by sensing the voltage at
pin VSENSE with respect to a reference voltage of
3.15V. A VSENSE voltage higher than 3.15V will
immediately reduce the output duty cycle, bypassing
the normal voltage loop control. This results in a lower
input power to reduce the output voltage VOUT. A
VSENSE voltage higher than 3.25V will immediately
turn off the gate, thereby preventing damage to bus
capacitor.
Due to the internal parameter tolerance, the maximum
power with VINMIN is
0.75
POUT(max) = VINMIN
´
------------------
R1 ×
2
3.4.3
Peak Current Limit (PCL)
The IC provides a cycle by cycle peak current limitation
(PCL). It is active when the voltage at pin 3 (ISENSE)
reaches -1.04V. This voltage is amplified by OP1 by a
factor of -1.43 and connected to comparator C2 with a
reference voltage of 1.5V as shown in Figure 9. A
deglitcher with 300ns after the comparator improves
noise immunity to the activation of this protection.
3.5
Fixed Switching Frequency
ICE2PCS04/G has an internally fixed switching
frequency as opposed to the ICE2PCS01/G which can
be externally set. This frequency is trimmed to 133kHz
with an accuracy ±5% at 25oC.
Version 2.0
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22 March 2010
CCM-PFC
ICE2PCS04/G
Functional Description
From the above equation, DOFF is proportional to VIN.
The objective of the current loop is to regulate the
average inductor current such that it is proportional to
the off duty cycle DOFF, and thus to the input voltage
VIN. Figure 11 shows the scheme to achieve the
objective.
3.6
Average Current Control
3.6.1
Complete Current Loop
The complete system current loop is shown in Figure
10.
Vout
L1
D1
R3
R4
From
Full-wave
Retifier
ave(IIN) at ICOMP
ramp profile
C2
R7
R2
R1
GATE
ISENSE
Current Loop
voltage
proportional to
averaged
Inductor current
Gate
Driver
Current Loop
Compensation
PWM
Comparator
ICOMP
GATE
drive
Q
R
S
C1
OTA2
1.0mS
+/-50uA (linear range)
PWM Logic
t
C3
S2
Input From
Voltage Loop
Nonlinear
Gain
4.2V
Figure 11 Average Current Control in CCM
Fault
The PWM is performed by the intersection of a ramp
signal with the averaged inductor current at pin 5
(ICOMP). The PWM cycle starts with the Gate turn off
for a duration of TOFFMIN (400ns typ.) and the ramp is
kept discharged. The ramp is then allowed to rise after
TOFFMIN expires. The off time of the boost transistor
ends at the intersection of the ramp signal and the
averaged current waveform. This results in the
proportional relationship between the average current
ICE2PCS04/G
Figure 10 Complete System Current Loop
It consists of the current loop block which averages the
voltage at pin ISENSE, resulted from the inductor
current flowing across R1. The averaged waveform is
compared with an internal ramp in the ramp generator
and PWM block. Once the ramp crosses the average
waveform, the comparator C1 turns on the driver stage
through the PWM logic block. The Nonlinear Gain block
defines the amplitude of the inductor current. The
following sections describe the functionality of each
individual blocks.
and the off duty cycle DOFF
.
Figure 12 shows the timing diagrams of TOFFMIN and the
PWM waveforms.
TOFFMIN
400ns
3.6.2
Current Loop Compensation
PWM cycle
The compensation of the current loop is done at the
ICOMP pin. This is the OTA2 output and a capacitor C3
has to be installed at this node to ground (see Figure
10). Under normal mode of operation, this pin gives a
voltage which is proportional to the averaged inductor
current. This pin is internally shorted to 4.2V in the
event of standby mode.
(1)
VCREF
VRAMP
PWM
ramp
released
3.6.3
Pulse Width Modulation (PWM)
t
The IC employs an average current control scheme in
continuous conduction mode (CCM) to achieve the
power factor correction.
Assuming the voltage loop is working and output
voltage is kept constant, the off duty cycle DOFF for a
CCM PFC system is given as
(1)
V
is a function of VICOMP
CREF
Figure 12 Ramp and PWM waveforms
3.6.4 Nonlinear Gain Block
The nonlinear gain block controls the amplitude of the
regulated inductor current. The input of this block is the
VIN
DOFF = -------------
VOUT
Version 2.0
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22 March 2010
CCM-PFC
ICE2PCS04/G
Functional Description
voltage at pin VCOMP. This block has been designed
to support the wide input voltage range (85-265VAC).
Vout
D1
L1
From
Full-wave
Retifier
R3
3.7
PWM Logic
C2
R7
The PWM logic block prioritizes the control input
signals and generates the final logic signal to turn on
the driver stage. The speed of the logic gates in this
R4
block, together with the width of the reset pulse TOFFMIN
are designed to meet a maximum duty cycle DMAX of
95% at the GATE output.
,
Gate Driver
Current Loop
+
PWM Generation
In case of high input currents which result in Peak
Current Limitation, the GATE will be turned off
immediately and maintained in off state for the current
PWM cycle. The signal Toffmin resets (highest priority,
overriding other input signals) both the current limit
latch and the PWM on latch as illustrated in Figure 13.
VIN
GATE
Nonlinear
Gain
OTA1
3V
Av(IIN
)
VSENSE
t
VCOMP
Current
Limit Latch
ICE2PCS04/G
Q
Peak Current
Limit
G1
S
R
HIGH =
turn GATE on
L1
R6
PWM on
Latch
C4
C5
Current Loop
PWM on signal
S
L2
R
Q
Figure 14 Voltage Loop
3.8.2 Enhanced Dynamic Response
Toffmin
385ns
Due to the low frequency bandwidth of the voltage loop,
the dynamic response is slow and in the range of about
several 10ms. This may cause additional stress to the
bus capacitor and the switching transistor of the PFC in
the event of heavy load changes.
Figure 13 PWM Logic
3.8
Voltage Loop
The IC provides therefore a “window detector” for the
feedback voltage VVSENSE at pin
6 (VSENSE).
The voltage loop is the outer loop of the cascaded
control scheme which controls the PFC output bus
voltage VOUT. This loop is closed by the feedback
sensing voltage at VSENSE which is a resistive divider
tapping from VOUT. The pin VSENSE is the input of
OTA1 which has an accurate internal reference of 3V
(±2%). Figure 14 shows the important blocks of this
voltage loop.
Whenever VVSENSE exceeds the reference value (3V)
by +5%, it will act on the nonlinear gain block which in
turn affect the gate drive duty cycle directly. This
change in duty cycle is bypassing the slow changing
VCOMP voltage, thus results in a fast dynamic
response of VOUT
.
3.9
Output Gate Driver
3.8.1
Voltage Loop Compensation
The compensation of the voltage loop is installed at the
VCOMP pin (see Figure 14). This is the output of OTA1
and the compensation must be connected at this pin to
ground. The compensation is also responsible for the
soft start function which controls an increasing AC input
current during start-up.
The output gate driver is a fast totem pole gate drive. It
has an in-built cross conduction currents protection and
a Zener diode Z1 (see Figure 15) to protect the external
transistor switch against undesirable over voltages.
The maximum voltage at pin 8 (GATE) is typically
clamped at 15V.
Version 2.0
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CCM-PFC
ICE2PCS04/G
Functional Description
VCC
Gate Driver
PWM Logic
HIGH to
turn on
LV
Z1
External
MOS
GATE
* LV: Level Shift
ICE2PCS04/G
Figure 15 Gate Driver
The output is active HIGH and at VCC voltages below the under voltage lockout threshold VCCUVLO, the gate drive
is internally pull low to maintain the off state.
Version 2.0
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22 March 2010
CCM-PFC
ICE2PCS04/G
Electrical Characteristics
4
Electrical Characteristics
4.1
Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction
of the integrated circuit.
Parameter
Symbol
Limit Values
Unit
Remarks
min.
max.
25
9.5
35
5
VCC Supply Voltage
VINS Voltage
VCC
-0.3
-0.3
-1
V
3)
VVINS
V
VINS Current
IINS
uA
V
ICOMP Voltage
ISENSE Voltage
ISENSE Current
VSENSE Voltage
VSENSE Current
VCOMP Voltage
GATE Voltage
VICOMP
VISENSE
IISENSE
VVSENSE
IVSENSE
VVCOMP
VGATE
-0.3
-20
-1
2)
5
V
1
mA
V
Recommended R2=220W
-0.3
-1
5
1
mA
V
R3>400kW
-0.3
-0.3
5
17
V
Clamped at 15V(typ)
if driven internally.
Junction Temperature
Storage Temperature
Tj
-40
-55
-
150
150
185
°C
TS
°C
Thermal Resistance
RthJA (DSO)
K/W
PG-DSO-8
Junction-Ambient for PG-DSO-8
Thermal Resistance
Junction-Ambient for PG-DIP-8
RthJA(DIP)
VESD
-
-
90
2
K/W
kV
PG-DIP-8
ESD Protection
Human Body Model1)
1)
According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kW series resistor)
Absolute ISENSE current should not be exceeded
2)
3)
Absolute VINS current should not be exceeded
4.2
Operating Range
Note: Within the operating range the IC operates as described in the functional description.
Parameter
Symbol
Limit Values
min. max.
VCCUVLO 25
Unit
Remarks
VCC Supply Voltage
VCC
V
Junction Temperature
TJCon
-40
125
°C
Version 2.0
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22 March 2010
CCM-PFC
ICE2PCS04/G
Electrical Characteristics
4.3
Characteristics
Note:
The electrical characteristics involve the spread of values within the specified supply voltage and junction
temperature range TJ from – 40 °C to 125°C.Typical values represent the median values, which are
related to 25°C. If not otherwise stated, a supply voltage of VCC =18V is assumed for test condition.
4.3.1
Supply Section
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
VCC Turn-On Threshold
VCCon
11.4
11.8
12.7
11.7
1.4
V
V
V
VCC Turn-Off Threshold/
Under Voltage Lock Out
VCCUVLO
VCChy
ICCstart
ICCHG
10.4
11.0
0.8
VCC Turn-On/Off Hysteresis
0.65
Start Up Current
Before VCCon
-
-
450
10
1100 mA
VVCC=VVCCon -0.1V
Operating Current with active GATE
20
mA CL= 4.7nF
Operating Current during Standby
ICCStdby
-
700
1300 mA
VVSENSE= 0.5V
VICOMP= 4V
4.3.2
PWM Section
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
Fixed Oscillator Frequency
Max. Duty Cycle
Min. Duty Cycle
fSW
118
133
138
98.5
0
kHz
DMAX
DMIN
92
95
%
%
VVCOMP= 0V, VVSENSE= 3V
VICOMP= 4.3V
Min. Off Time
TOFFMIN
150
400
650
ns
VVSENSE= 3V
VISENSE= 0.1V
Version 2.0
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22 March 2010
CCM-PFC
ICE2PCS04/G
Electrical Characteristics
4.3.3
System Protection Section
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
0.65
Open Loop Protection (OLP)
VSENSE Threshold
VOLP
VPCL
0.55
0.6
V
Peak Current Limitation (PCL)
ISENSE Threshold
-1.16 -1.04 -0.95
-0.75 -0.68 -0.61
V
Soft Over Current Control (SOC)
ISENSE Threshold
VSOC
VOVP
VVINSL
VVINSH
IVIN0V
V
Output Over-Voltage Protection (OVP)
3.1
0.64
1.46
-1
3.25
0.71
1.50
-0.2
3.4
0.77
1.57
1
V
Input Brown-out Protection (IBOP)
High to Low Threshold
V
Input Brown-out Protection (IBOP)
Low to High Threshold
V
Input Brown-out Protection (IBOP)
VINS Bias Current
mA VVINS= 0V
4.3.4
Current Loop Section
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
OTA2 Transconductance Gain
OTA2 Output Linear Range1)
ICOMP Voltage during OLP
1)
GmOTA2
IOTA2
0.8
1.0
1.3
mS At Temp = 25°C
-
± 50
4.2
-
-
mA
VICOMPF
3.9
V
VVSENSE= 0.5V
The parameter is not subject to production test - verified by design/characterization
Version 2.0
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22 March 2010
CCM-PFC
ICE2PCS04/G
Electrical Characteristics
4.3.5
Voltage Loop Section
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
OTA1 Reference Voltage
VOTA1
GmOTA1
IOTA1SO
IOTA1SK
2.92
3.00
3.08
V
measured at VSENSE
OTA1 Transconductance Gain
26
18
21
39
30
30
51
mS
OTA1 Max. Source Current
Under Normal Operation
38
mA VVSENSE= 2V
VVCOMP= 3V
OTA1 Max. Sink Current
Under Normal Operation
41
mA VVSENSE= 4V
VVCOMP= 3V
Enhanced Dynamic Response
VSENSE High Threshold
VSENSE Low Threshold
VHi
VLo
3.09
2.76
3.18
2.85
3.26
2.94
V
V
VSENSE Input Bias Current at 3V
VSENSE Input Bias Current at 1V
VCOMP Voltage during OLP
IVSEN5V
0
0
0
-
1.5
mA VVSENSE= 3V
IVSEN1V
-
1
mA VVSENSE= 1V
VVCOMPF
0.2
0.4
V
VVSENSE= 0.5V
IVCOMP= 0.5mA
Version 2.0
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22 March 2010
CCM-PFC
ICE2PCS04/G
Electrical Characteristics
4.3.6
Driver Section
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
GATE Low Voltage
VGATEL
-
-
1.2
V
V
VCC =10V
IGATE = 5 mA
-
1.5
VCC =10V
IGATE =20 mA
-
0.4
-
-
1.0
-
V
V
V
V
IGATE = 0 A
-
-0.2
-
IGATE = 20 mA
IGATE = -20 mA
0
GATE High Voltage
VGATEH
14.8
-
VCC = 25V
CL = 4.7nF
-
7.8
-
14.8
9.2
60
50
-
-
-
V
V
VCC = 19V
CL = 4.7nF
VCC = VVCCoff + 0.2V
CL = 4.7nF
GATE Rise Time
GATE Fall Time
tr
-
ns
VGate = 2V ...12V
CL = 4.7nF
tf
-
-
ns
A
A
VGate = 12V ...2V
CL = 4.7nF
GATE Current, Peak,
Rising Edge
IGATE
IGATE
-1.5
-
CL = 4.7nF1)
GATE Current, Peak,
Falling Edge
-
-
2.0
CL = 4.7nF1)
1)
Design characteristics (not meant for production testing)
Version 2.0
17
22 March 2010
CCM-PFC
ICE2PCS04/G
Outline Dimension
5
Outline Dimension
PG-DIP-8 Outline Dimension
Version 2.0
18
22 March 2010
CCM-PFC
ICE2PCS04/G
Outline Dimension
PG-DSO-8 Outline Dimension
Version 2.0
19
22 March 2010
Total Quality Management
Qualität hat für uns eine umfassende
Bedeutung. Wir wollen allen Ihren
Ansprüchen in der bestmöglichen
Weise gerecht werden. Es geht uns also
nicht nur um die Produktqualität –
unsere Anstrengungen gelten
gleichermaßen der Lieferqualität und
Logistik, dem Service und Support
sowie allen sonstigen Beratungs- und
Betreuungsleistungen.
Quality takes on an allencompassing
significance at Semiconductor Group.
For us it means living up to each and
every one of your demands in the best
possible way. So we are not only
concerned with product quality. We
direct our efforts equally at quality of
supply and logistics, service and
support, as well as all the other ways in
which we advise and attend to you.
Dazu gehört eine bestimmte
Part of this is the very special attitude of
our staff. Total Quality in thought and
deed, towards co-workers, suppliers
and you, our customer. Our guideline is
“do everything with zero defects”, in an
open manner that is demonstrated
beyond your immediate workplace, and
to constantly improve.
Geisteshaltung unserer Mitarbeiter.
Total Quality im Denken und Handeln
gegenüber Kollegen, Lieferanten und
Ihnen, unserem Kunden. Unsere
Leitlinie ist jede Aufgabe mit „Null
Fehlern“ zu lösen – in offener
Sichtweise auch über den eigenen
Arbeitsplatz hinaus – und uns ständig
zu verbessern.
Throughout the corporation we also
think in terms of Time Optimized
Processes (top), greater speed on our
part to give you that decisive
competitive edge.
Unternehmensweit orientieren wir uns
dabei auch an „top“ (Time Optimized
Processes), um Ihnen durch größere
Schnelligkeit den entscheidenden
Wettbewerbsvorsprung zu verschaffen.
Give us the chance to prove the best of
performance through the best of quality
– you will be convinced.
Geben Sie uns die Chance, hohe
Leistung durch umfassende Qualität zu
beweisen.
Wir werden Sie überzeugen.
h t t p : / / w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
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