IFCM15P60GD [INFINEON]
CIPOS™ Mini 600 V, 15 A PFC-integrated three-phase intelligent power module;
| 型号： | IFCM15P60GD |
| 厂家： | 
Infineon |
| 描述： | CIPOS™ Mini 600 V, 15 A PFC-integrated three-phase intelligent power module 功率因数校正 |
| 文件： | 总18页 (文件大小：1074K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Control Integrated POwer System
(CIPOS™)
IFCM15P60GD
Datasheet
Datasheet
Please read the Important Notice and Warnings at the end of this document
page 1 of 18
V 2.2
www.infineon.com
2017-09-06
Control Integrated POwer System (CIPOS™)
IFCM15P60GD
Table of contents
Table of contents...................................................................................................................................................2
CIPOS™ Control Integrated POwer System............................................................................................................3
Features
..................................................................................................................................................................3
Target Applications......................................................................................................................................................3
Description ..................................................................................................................................................................3
System Configuration..................................................................................................................................................3
Pin Configuration...................................................................................................................................................4
Internal Electrical Schematic.................................................................................................................................4
Pin Assignment ......................................................................................................................................................5
Pin Description ......................................................................................................................................................5
HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12)............................................................5
VFO (Fault-output and NTC, Pin 14) ............................................................................................................................6
ITRIP (Over current detection function, Pin 15)..........................................................................................................6
VDD, VSS (Low side control supply and reference, Pin 13, 16)...................................................................................6
VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6) .............................................................................................6
N (Low side emitter, Pin 17).........................................................................................................................................6
W, V, U (High side emitter and low side collector, Pin 18 - 20) ...................................................................................6
P (Positive bus input voltage, Pin 21)..........................................................................................................................6
X, NX, GX (Single boost PFC, Pins 22-24) .....................................................................................................................6
Absolute Maximum Ratings ...................................................................................................................................7
Module Section ............................................................................................................................................................7
Inverter Section............................................................................................................................................................7
Control Section ............................................................................................................................................................7
PFC Section ..................................................................................................................................................................8
Recommended Operation Conditions ...................................................................................................................8
Static Parameters ..................................................................................................................................................9
Inverter Section............................................................................................................................................................9
PFC Section ................................................................................................................................................................10
Bootstrap Parameters .........................................................................................................................................10
Dynamic Parameters ...........................................................................................................................................11
Inverter Section..........................................................................................................................................................11
PFC Section ................................................................................................................................................................12
Thermistor...........................................................................................................................................................13
Mechanical Characteristics and Ratings ..............................................................................................................13
Circuit of a Typical Application ............................................................................................................................14
Switching Times Definition ..................................................................................................................................15
Package Outline...................................................................................................................................................16
Revision history ...................................................................................................................................................17
Datasheet
2 of 18
V 2.2
2017-09-06
Control Integrated POwer System (CIPOS™)
IFCM15P60GD
CIPOS™
Control Integrated POwer System
Dual In-Line PFC integrated Intelligent Power Module
3ɸ-bridge 600V/15A, Single phase PFC 650V/30A
Description
Features
Package
The CIPOS™ module family offers the chance for
Dual In-Line molded module
Lead-free terminal plating; RoHS compliant
Very low thermal resistance due to DCB
integrating various power and control components
to increase reliability, optimize PCB size and system
costs.
It is designed to control three phase AC motors and
permanent magnet motors with single phase PFC in
variable speed drives for applications like an air
conditioning and low power motor drives. The
package concept is specially adapted to power
applications, which need good thermal conduction
and electrical isolation, but also EMI-save control
and overload protection.
Inverter
TRENCHSTOP™ IGBT3
Rugged SOI gate driver technology with stability
against transient and negative voltage
Allowable negative VS potential up to -11V for
signal transmission at VBS=15V
Integrated bootstrap functionality
Over current shutdown
Temperature monitor
Under-voltage lockout at all channels
Low side common emitter
Cross-conduction prevention
All of 6 switches turn off during protection
TRENCHSTOP™ IGBT3 and anti-parallel diodes are
combined with an optimized SOI gate driver for
excellent electrical performance.
System Configuration
3 half bridges with TRENCHSTOP™ IGBT3 and
anti parallel diodes
PFC
3ɸ SOI gate driver
TRENCHSTOP™ 5
Rapid switching emitter controlled diode
Single phase PFC with TRENCHSTOP™ 5 and
Rapid switching emitter controlled diode
Thermistor
Target Applications
Pin-to-heatsink clearance distance typ. 1.6mm
Home appliances
Low power motor drives
Datasheet
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Control Integrated POwer System (CIPOS™)
IFCM15P60GD
Pin Configuration
Bottom View
(24) GX
(23) NX
(22) X
(21) P
(20) U
(19) V
(1) VS(U)
(2) VB(U)
(3) VS(V)
(4) VB(V)
(5) VS(W)
(6) VB(W)
(7) HIN(U)
(8) HIN(V)
(9) HIN(W)
(10) LIN(U)
(11) LIN(V)
(12) LIN(W)
(13) VDD
(14) VFO
(18) W
(17) N
(15) ITRIP
(16) VSS
Figure 1
Pin configuration
Internal Electrical Schematic
GX (24)
NX (23)
(1) VS(U)
(2) VB(U)
VB1
VB2
RBS1
X (22)
P (21)
HO1
VS1
(3) VS(V)
(4) VB(V)
RBS2
HO2
VS2
(5) VS(W)
(6) VB(W)
VB3
HO3
U (20)
RBS3
VS3
LO1
(7) HIN(U)
(8) HIN(V)
HIN1
HIN2
V (19)
W (18)
N (17)
(9) HIN(W)
(10) LIN(U)
HIN3
LIN1
LO2
LO3
(11) LIN(V)
(12) LIN(W)
(13) VDD
(14) VFO
LIN2
LIN3
VDD
VFO
(15) ITRIP
(16) VSS
ITRIP
VSS
Thermistor
Figure 2
Internal schematic
Datasheet
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Control Integrated POwer System (CIPOS™)
IFCM15P60GD
Pin Assignment
Pin Number
Pin Name
Pin Description
U-phase high side floating IC supply offset voltage
U-phase high side floating IC supply voltage
V-phase high side floating IC supply offset voltage
V-phase high side floating IC supply voltage
W-phase high side floating IC supply offset voltage
W-phase high side floating IC supply voltage
U-phase high side gate driver input
V-phase high side gate driver input
W-phase high side gate driver input
U-phase low side gate driver input
V-phase low side gate driver input
W-phase low side gate driver input
Low side control supply
1
VS(U)
2
VB(U)
VS(V)
VB(V)
VS(W)
VB(W)
HIN(U)
HIN(V)
HIN(W)
LIN(U)
LIN(V)
LIN(W)
VDD
VFO
ITRIP
VSS
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Fault output / Temperature monitor
Over current shutdown input
Low side control negative supply
Low side emitter
N
W
Motor W-phase output
V
Motor V-phase output
U
Motor U-phase output
P
Positive output voltage / Positive bus input voltage
PFC IGBT collector
X
NX
PFC IGBT emitter
GX
PFC IGBT gate
Pin Description
HIN(U,V,W) and LIN(U,V,W) (Low side and high side
control pins, Pin 7 - 12)
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility
down to 3.3V controller outputs. Pull-down resistor
of about 5k is internally provided to pre-bias
inputs during supply start-up and a zener clamp is
provided for pin protection purposes. Input
Schmitt-trigger and noise filter provide beneficial
noise rejection to short input pulses.
CIPOS
Schmitt-Trigger
HINx
LINx
INPUT NOISE
FILTER
UZ=10.5V
5k
SWITCH LEVEL
VIH; VIL
VSS
Figure 3
Input pin structure
a)
b)
tFILIN
tFILIN
HIN
LIN
HIN
LIN
high
HO
LO
HO
LO
The noise filter suppresses control pulses which are
below the filter time tFILIN. The filter acts according
to Figure 4.
low
Figure 4
Input filter timing diagram
Datasheet
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Control Integrated POwer System (CIPOS™)
IFCM15P60GD
It is recommended for proper work of this product
not to provide input pulse-width lower than 1.5us.
The under-voltage circuit enables the device to
operate at power on when a supply voltage of at
least a typical voltage of VDDUV+ = 12.1V is present.
The IC shuts down all the gate drivers’ power
outputs, when the VDD supply voltage is below
VDDUV- = 10.4V. This prevents the external power
switches from critically low gate voltage levels
during on-state and therefore from excessive power
dissipation.
The integrated gate drive provides additionally a
shoot through prevention capability which avoids
the simultaneous on-state of two gate drivers of the
same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and
LO3). When two inputs of a same leg are activated,
only former activated one is activated so that the
leg is kept steadily in a safe state.
A minimum deadtime insertion of typically 380ns is
also provided by driver IC, in order to reduce cross-
conduction of the external power switches.
VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 -
6)
VB to VS is the high side supply voltage. The high
side circuit can float with respect to VSS following
the external high side power device emitter voltage.
Due to the low power consumption, the floating
driver stage is supplied by integrated bootstrap
circuit.
VFO (Fault-output and NTC, Pin 14)
The VFO pin indicates a module failure in case of
under voltage at pin VDD or in case of triggered
over current detection at ITRIP. A pull-up resistor is
externally required to bias the NTC.
The under-voltage detection operates with a rising
supply threshold of typical VBSUV+ = 12.1V and a
falling threshold of VBSUV- = 10.4V.
CIPOS
VDD
VFO
RON,FLT
From ITRIP - Latch
VS(U,V,W) provide
a high robustness against
1
negative voltage in respect of VSS of -50V
transiently. This ensures very stable designs even
under rough conditions.
VSS
From UV detection
Thermistor
Figure 5
Internal circuit at pin VFO
N (Low side emitter, Pin 17)
The same pin provides direct access to the NTC,
which is referenced to VSS. An external pull-up
resistor connected to +5V ensures that the resulting
voltage can be directly connected to the
microcontroller.
The low side emitters are available for current
measurements. It is recommended to keep the
connection to pin VSS as short as possible in order
to avoid unnecessary inductive voltage drops.
W, V, U (High side emitter and low side collector,
Pin 18 - 20)
ITRIP (Over current detection function, Pin 15)
CIPOS™ provides an over current detection
These pins are motor U, V, W input pins
function by connecting the ITRIP input with the
motor current feedback. The ITRIP comparator
threshold (typ. 0.47V) is referenced to VSS ground.
An input noise filter (typ: tITRIPMIN = 530ns) prevents
the driver to detect false over-current events.
Over current detection generates a shut down of all
outputs of the gate driver after the shutdown
propagation delay of typically 1000ns.
P (Positive bus input voltage, Pin 21)
The high side IGBTs and PFC diode cathode are
connected to the bus voltage. It is noted that the
bus voltage does not exceed 450V.
X, NX, GX (Single boost PFC, Pins 22-24)
These pins are emitter, collector and gate of IGBT
for single boost PFC.
VDD, VSS (Low side control supply and reference,
Pin 13, 16)
VDD is the low side supply and it provides power
both to input logic and to low side output power
stage. Input logic is referenced to VSS ground.
Datasheet
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Control Integrated POwer System (CIPOS™)
IFCM15P60GD
Absolute Maximum Ratings
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Module Section
Value
Description
Condition
Symbol
Unit
min
-40
max
125
-
Storage temperature range
Isolation test voltage
Tstg
VISOL
TC
°C
V
RMS, f = 60Hz, t =1min
Refer to Figure 6
2000
-40
Operating case temperature range
125
°C
Inverter Section
Value
Description
Condition
Symbol
Unit
min
max
-
Max. blocking voltage
IC = 250µA
VCES
VPN
600
V
V
DC link supply voltage of P-N
DC link supply voltage (surge) of P-N
Output current
Applied between P-N
Applied between P-N
TC = 25°C , TJ < 150°C
less than 1ms
-
-
450
500
15
VPN(surge)
IC
IC(peak)
tSC
V
-15
-30
-
A
Maximum peak output current
Short circuit withstand time1
Power dissipation per IGBT
30
A
VDC ≤ 400V, TJ = 150°C
5
µs
W
Ptot
-
49.8
Operating junction temperature
range
TJ
-40
150
2.51
4.67
°C
Single IGBT thermal resistance,
junction-case
RthJC
RthJCD
-
-
K/W
K/W
Single diode thermal resistance,
junction-case
Control Section
Value
Description
Condition
Symbol
Unit
min
-1
max
20
Module supply voltage
VDD
VBS
V
V
High side floating supply voltage (VB vs. VS)
-1
20
VIN
VITRIP
-1
-1
10
10
Input voltage
LIN, HIN, ITRIP
V
Inverter switching frequency
PFC switching frequency
fPWM
-
-
20
60
kHz
kHz
fPWM(PFC)
1 Allowed number of short circuits: <1000; time between short circuits: > 1s.
Datasheet
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IFCM15P60GD
PFC Section
(VGE = 15V and TJ = 25°C, if not stated otherwise)
Value
Description
Condition
IC = 250µA
Symbol
Unit
min
650
650
-20
-
max
-
Max. blocking voltage
Repetitive peak reverse voltage
Gate-emitter voltage
VCES
VRRM
VGE
Ii
V
V
V
A
IR = 250µA
-
20
30
Input RMS current
TJ ≤ 150°C , TC = 25°C
TJ ≤ 150°C , TC = 25°C
less than 1ms, non-
repetitive
Maximum peak input current
Power dissipation
Ii(peak)
-
60
A
Ptot
TJ
-
85.6
150
W
Operating junction temperature
range
-40
°C
Single IGBT thermal resistance,
junction-case
RthJC
-
-
1.46
2.76
K/W
K/W
Single diode thermal resistance,
junction-case
RthJCD
Recommended Operation Conditions
All voltages are absolute voltages referenced to VSS -potential unless otherwise specified.
Value
Description
DC link supply voltage of P-N
Symbol
Unit
min
0
typ
-
max
450
VPN
VBS
VDD
V
V
V
High side floating supply voltage (VB vs. VS)
Low side supply voltage
13.5
14.5
-
18.5
18.5
16
ΔVBS,
ΔVDD
-1
-1
1
1
Control supply variation
-
-
V/µs
V
VIN
VITRIP
0
0
5
5
Logic input voltages LIN,HIN,ITRIP
Between VSS - N and NX(including surge)
PFC IGBT gate-emitter voltage
VSS
VGE
RG
-5
14
-
-
5
18
-
V
V
-
10
4.7
10
Ω
PFC IGBT external gate parameters
CGE
RGE
-
-
nF
kΩ
-
-
Datasheet
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IFCM15P60GD
Static Parameters
Inverter Section
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Value
typ
Description
Condition
IC = 10A
TJ = 25°C
150°C
Symbol
VCE(sat)
Unit
V
min
max
Collector-Emitter saturation voltage
-
-
1.55
1.8
2.05
-
IF = 10A
Emitter-Collector forward voltage
VF
-
-
1.75
1.8
2.45
-
V
TJ = 25°C
150°C
Collector-Emitter leakage current
Logic "1" input voltage (LIN,HIN)
Logic "0" input voltage (LIN,HIN)
ITRIP positive going threshold
ITRIP input hysteresis
VCE = 600V
ICES
VIH
-
-
1
2.5
-
mA
V
-
2.1
0.9
470
70
VIL
0.7
400
40
V
VIT,TH+
VIT,HYS
540
-
mV
mV
VDD and VBS supply under voltage
positive going threshold
VDDUV+
VBSUV+
10.8
9.5
1.0
-
12.1
10.4
1.7
13.0
11.2
-
V
V
VDD and VBS supply under voltage
negative going threshold
VDDUV-
VBSUV-
VDD and VBS supply under voltage
lockout hysteresis
VDDUVH
VBSUVH
V
Quiescent VBx supply current
(VBx only)
HIN = 0V
IQBS
IQDD
300
370
500
900
µA
µA
Quiescent VDD supply current
(VDD only)
LIN = 0V, HINX=5V
-
Input bias current
VIN = 5V
IIN+
IIN-
-
-
-
-
-
1
2
1.5
mA
µA
µA
µA
V
Input bias current
VIN = 0V
-
ITRIP input bias current
VFO input bias current
VFO output voltage
VITRIP = 5V
IITRIP+
IFO
65
60
0.5
150
VFO = 5V, VITRIP = 0V
IFO = 10mA, VITRIP = 1V
-
-
VFO
Datasheet
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IFCM15P60GD
PFC Section
(VGE = 15V and TJ = 25°C, if not stated otherwise)
Value
typ
Description
Condition
IC = 30A,
TJ = 25°C
150°C
Symbol
VCE(sat)
Unit
V
min
max
Collector-Emitter saturation
voltage
-
-
1.7
2.0
2.3
-
IF = 30A,
Diode forward voltage
VF
-
-
1.75
1.65
2.3
-
V
TJ = 25°C
150°C
Gate-Emitter threshold voltage
Collector-Emitter leakage current
Gate-Emitter leakage current
Diode reverse leakage current
IC = 0.3mA, VGE=VCE
VCE = 650V, VGE = 0V
VCE = 0V, VGE = 20V
VR = 650V
VGE(th)
ICES
IGES
IR
3.2
4.0
4.8
1
V
-
-
-
-
-
-
mA
µA
mA
1
1
Bootstrap Parameters
(TJ = 25°C, if not stated otherwise)
Value
typ
-
Description
Condition
Symbol
Unit
min
600
max
-
Repetitive peak reverse voltage
Bootstrap diode resistance
VRRM
RBSD
V
Between VF=4V and
VF=5V
-
40
-
Reverse recovery time
IF = 0.6A, di/dt=80A/µs
IF = 0.5mA
trr_BSD
VF_BSD
-
-
50
1
-
-
ns
Bootstrap diode forward voltage
V
Datasheet
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IFCM15P60GD
Dynamic Parameters
Inverter Section
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Value
typ
680
30
Description
Condition
Symbol
Unit
min
max
Turn-on propagation delay time
Turn-on rise time
ton
tr
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
VLIN,HIN = 5V,
IC = 10A,
VDC = 300V
Turn-on switching time
Reverse recovery time
Turn-off propagation delay time
Turn-off fall time
tc(on)
trr
220
60
toff
tf
950
55
VLIN,HIN = 0V,
IC = 10A,
VDC = 300V
Turn-off switching time
tc(off)
120
Short circuit propagation delay
time
From VIT,TH+ to 10% ISC
VITRIP = 1V
tSCP
tITRIPmin
tFILIN
-
-
1250
530
290
-
-
-
-
-
-
-
ns
ns
ns
µs
µs
ns
Input filter time ITRIP
Input filter time at LIN, HIN for turn
on and off
VLIN,HIN = 0V & 5V
VITRIP = 1V
-
Fault clear time after ITRIP-fault
tFLTCLR
DTPWM
DTIC
40
1.5
-
Deadtime between low side and
high side
-
Deadtime of gate drive circuit
380
VDC = 300V, IC = 10A
TJ = 25°C
150°C
IGBT turn-on energy (includes
reverse recovery of diode)
Eon
Eoff
Erec
-
-
400
490
-
-
µJ
µJ
µJ
VDC = 300V, IC = 10A
TJ = 25°C
150°C
IGBT turn-off energy
-
-
190
290
-
-
VDC = 300V, IC = 10A
TJ = 25°C
150°C
Diode recovery energy
-
-
55
70
-
-
Datasheet
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IFCM15P60GD
PFC Section
(VGE = 15V and TJ = 25°C, if not stated otherwise)
Value
typ
1800
45
Description
Input capacitance
Condition
Symbol
Unit
min
max
Cies
Coes
Cres
-
-
-
-
-
-
VCE = 25V, VGE = 0V,
f = 1MHz
Output capacitance
pF
nC
Reverse transfer capacitance
7
VDC = 520V, IC = 30A,
VGE = 15V
Gate charge
QG
-
70
-
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
td(on)
tr
td(off)
tf
-
-
-
-
-
20
45
-
-
-
-
-
ns
ns
ns
ns
ns
VDC = 400V, IC = 30A,
RG = 10Ω, CGE = 4.7nF,
RGE = 10kΩ, TJ = 25°C
115
30
Reverse recovery time
trr
80
VDC = 400V, IC = 30A, RG = 10Ω,
CGE = 4.7nF, RGE = 10kΩ
TJ = 25°C
150°C
Turn-on energy
Eon
Eoff
Erec
-
-
835
1025
-
-
µJ
µJ
µJ
VDC = 400V, IC = 30A, RG = 10Ω,
CGE = 4.7nF, RGE = 10kΩ
TJ = 25°C
150°C
Turn-off energy
-
-
315
395
-
-
VDC = 400V, IC = 30A, RG = 10Ω,
CGE = 4.7nF, RGE = 10kΩ
TJ = 25°C
150°C
Diode recovery energy
-
-
95
170
-
-
Figure 6
TC measurement point1
1 Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and
brings wrong or different information.
Datasheet
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IFCM15P60GD
Thermistor
Value
typ
Description
Condition
TNTC = 25°C
Symbol
Unit
min
-
max
-
Resistor
RNTC
85
k
B-constant of NTC
(Negative temperature coefficient)
B(25/100)
-
4092
-
K
3500
35
Min.
Typ.
Max.
3000
2500
2000
1500
1000
500
30
25
20
15
10
5
0
50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130
Thermistor temperature [℃]
0
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130
Thermistor temperature [℃]
Figure 7
Thermistor resistance – temperature curve and table
(For more information, please refer to the application note ‘AN CIPOS™-Mini 1 Technical description’)
Mechanical Characteristics and Ratings
Value
Description
Condition
Unit
min
0.49
-50
-
typ
max
Mounting torque
M3 screw and washer
Refer to Figure 8
-
-
0.78
100
-
Nm
µm
g
Flatness
Weight
6.83
Figure 8
Flatness measurement position
Datasheet
13 of 18
V 2.2
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Control Integrated POwer System (CIPOS™)
IFCM15P60GD
Circuit of a Typical Application
#1
RG
PFC
gate
driver
IC
GX (24)
NX (23)
X (22)
VDD line
RGE
CGE
#4
(1) VS(U)
(2) VB(U)
VB1
#8
#7
RBS1
HO1
VS1
#4
(3) VS(V)
(4) VB(V)
VB2
P (21)
RBS2
HO2
VS2
#4
(5) VS(W)
(6) VB(W)
VB3
~
AC
HO3
VS3
U (20)
RBS3
#1
(7) HIN(U)
HIN1
#5
(8) HIN(V)
Micro
Controller
HIN2
LO1
LO2
(9) HIN(W)
V (19)
W (18)
N (17)
3-ph AC
Motor
HIN3
(10) LIN(U)
LIN1
(11) LIN(V)
LIN2
(12) LIN(W)
LIN3
(13) VDD
VDD
#9
VDD line
(14) VFO
VFO
(15) ITRIP
ITRIP
LO3
(16) VSS
5 or 3.3V line
VSS
#6
#3
#7
<Signal for protection>
#2
Current sensing
Input surge voltage sensing
<Signal for protection>
Figure 9
Application circuit
Because PFC IGBT inside this product has very high speed switching characteristics, considerable large surge voltage
between P and NX terminals and switching noise on signaling path are generated easily. Please pay attention to the below
items for optimized application circuit design.
1.
Input circuit
-
-
To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100Ω, 1nF)
CIN should be placed as close to VSS pin as possible.
2.
3.
Itrip circuit
-
To prevent protection function errors, CITRIP should be placed as close to Itrip and VSS pins as possible.
VFO circuit
-
VFO output is an open drain output. This signal line should be pulled up to the positive side of the 5V/3.3V logic power supply with a proper
resistor RPU. It is recommended that RC filter be placed as close to the controller as possible.
4.
5.
VB-VS circuit
-
Capacitor for high side floating supply voltage should be placed as close to VB and VS pins as possible.
Snubber capacitor
-
The wiring between CIPOS™ Mini and snubber capacitor including shunt resistor should be as short as possible.
6.
7.
Shunt resistor
-
Each shunt resistor of SMD type should be used for reducing its stray inductance.
Ground pattern
-
Each ground pattern should be separated at only one point of shunt resistor as short as possible.
-
Power ground pattern between PFC and Inverter should be connected as short as possible.
8.
9.
Anti parallel diode
-
It’s mandatory to connect anti-parallel diode (2A, voltage rating higher than 650V) to PFC IGBT.
Input surge voltage protection circuit
-
This protection circuit is necessary for PFC IGBT to be protected from excessive surge voltage.
Datasheet
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V 2.2
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Control Integrated POwer System (CIPOS™)
IFCM15P60GD
Switching Times Definition
2.1V
HINx
LINx
0.9V
trr
toff
ton
10%
10%
iCx
90%
90%
tf
tr
10%
10%
10%
vCEx
tc(on)
tc(off)
Figure 10 Switching times definition of inverter
90%
vGE
10%
trr
td(off)
td(on)
10%
iC
90%
90%
tr
10%
10%
vCE
tf
Figure 11 Switching times definition of PFC
Datasheet
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Control Integrated POwer System (CIPOS™)
IFCM15P60GD
Package Outline
Datasheet
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Control Integrated POwer System (CIPOS™)
IFCM15P60GD
Revision history
Document
version
Date of release
Aug. 2017
Description of changes
V 2.1
Package outline update
Fig.9 Application circuit
V 2.2
Sep. 2017
Maximum operating case temperature, Tc= 125°C
Datasheet
17 of 18
V 2.2
2017-09-06
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Edition 2017-09-06
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