IPA040N08NM5S [INFINEON]
英飞凌的 80V OptiMOS™ 5 功率 MOSFET （IPA040N08NM5S）提高了系统效率，降低了系统成本。具有 4.0mOhm 的低导通电阻 RDS(on) 和低电压过冲。新型 TO-220 FullPAK 封装针对电视电源、适配器、台式机和游戏等应用进行了优化。OptiMOS™ 功率 MOSFET 功率密度和效率提高，因此是同步整流的理想解决方案。;
| 型号： | IPA040N08NM5S |
| 厂家： | 
Infineon |
| 描述： | 英飞凌的 80V OptiMOS™ 5 功率 MOSFET （IPA040N08NM5S）提高了系统效率，降低了系统成本。具有 4.0mOhm 的低导通电阻 RDS(on) 和低电压过冲。新型 TO-220 FullPAK 封装针对电视电源、适配器、台式机和游戏等应用进行了优化。OptiMOS™ 功率 MOSFET 功率密度和效率提高，因此是同步整流的理想解决方案。 游戏 电视 |
| 文件： | 总10页 (文件大小：1069K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IPA040N08NM5S
MOSFET
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
PG-TOꢀ220ꢀFP
Features
•ꢀIdealꢀforꢀhighꢀfrequencyꢀswitchingꢀandꢀsync.ꢀrec.
•ꢀExcellentꢀgateꢀchargeꢀxꢀRDS(on)ꢀproductꢀ(FOM)
•ꢀVeryꢀlowꢀon-resistanceꢀꢀRDS(on)
•ꢀN-channel,ꢀnormalꢀlevel
•ꢀ100%ꢀavalancheꢀtested
•ꢀPb-freeꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
Productꢀvalidation
QualifiedꢀaccordingꢀtoꢀJEDECꢀStandard
Drain
Pin 2
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Gate
Pin 1
Parameter
Value
Unit
Source
Pin 3
VDS
80
V
RDS(on),max
ID
4.0
75
mΩ
A
Qoss
83
nC
nC
QG(0V..10V)
70
Typeꢀ/ꢀOrderingꢀCode
Package
PG-TO 220 FullPAK
Marking
RelatedꢀLinks
IPA040N08NM5S
040N085S
-
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
-
-
-
-
75
53
VGS=10ꢀV,ꢀTC=25ꢀ°C
VGS=10ꢀV,ꢀTC=100ꢀ°C
Continuous drain current
ID
A
Pulsed drain current1)
Avalanche energy, single pulse2)
Gate source voltage
ID,pulse
EAS
-
-
-
-
-
300
186
20
A
TC=25ꢀ°C
-
mJ
V
ID=75ꢀA,ꢀRGS=25ꢀΩ
VGS
Ptot
-20
-
-
Power dissipation
39
W
TC=25ꢀ°C
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
RthJC
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case
-
3.8
°C/W -
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
80
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
2.2
3.0
3.8
VDS=VGS,ꢀID=109ꢀµA
-
-
0.1
10
1
100
VDS=80ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=80ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
IDSS
µA
nA
IGSS
-
1
100
VGS=20ꢀV,ꢀVDS=0ꢀV
-
-
3.4
4.2
4.0
-
VGS=10ꢀV,ꢀID=38ꢀA
VGS=6ꢀV,ꢀID=19ꢀA
RDS(on)
mΩ
Gate resistance3)
Transconductance
RG
gfs
-
-
1.5
93
-
-
Ω
-
S
|VDS|≥2|ID|RDS(on)max,ꢀID=38ꢀA
1) See Diagram 3 for more detailed information
2) See Diagram 13 for more detailed information
3) Defined by design. Not subject to production test.
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Ciss
Coss
Crss
-
-
-
4900 6400 pF
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz
Output capacitance
790
36
-
-
pF
pF
Reverse transfer capacitance
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=38ꢀA,
RG,ext=1.6ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
18
12
37
12
-
-
-
-
ns
ns
ns
ns
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=38ꢀA,
RG,ext=1.6ꢀΩ
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=38ꢀA,
RG,ext=1.6ꢀΩ
Turn-off delay time
Fall time
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=38ꢀA,
RG,ext=1.6ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
22
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge
Switching charge
Qgs
-
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
V
VDD=40ꢀV,ꢀID=38ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=38ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=38ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=38ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=38ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=38ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ10ꢀV
Qg(th)
Qgd
15
-
15
-
Qsw
22
-
Gate charge total1)
Qg
70
93
-
Gate plateau voltage
Gate charge total, sync. FET
Output charge
Vplateau
Qg(sync)
Qoss
4.5
60
-
nC
nC
83
-
VDD=40ꢀV,ꢀVGS=0ꢀV
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
33
300
1.2
-
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
A
TC=25ꢀ°C
Diode forward voltage
0.87
73
V
VGS=0ꢀV,ꢀIF=38ꢀA,ꢀTj=25ꢀ°C
VR=40ꢀV,ꢀIF=38ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=40ꢀV,ꢀIF=38ꢀA,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
ns
nC
Qrr
166
-
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
40
80
35
30
25
20
15
10
5
70
60
50
40
30
20
10
0
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
103
101
single pulse
0.01
0.02
1 µs
102
101
0.05
0.1
0.2
0.5
10 µs
100 µs
1 ms
10 ms
100
10-1
10-2
100
DC
10-1
10-2
10-3
10-1
100
101
102
10-5
10-4
10-3
10-2
10-1
100
101
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
300
10 V
8 V
12
7 V
6 V
4.5 V
250
200
150
100
50
10
5 V
8
6
6 V
7 V
4
2
0
8 V
10 V
5 V
4.5 V
0
0
1
2
3
4
5
0
25
50
75
100
125
150
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
300
12
250
200
150
100
10
8
175 °C
6
4
25 °C
50
2
175 °C
25 °C
0
0
0
1
2
3
4
5
6
7
0
2
4
6
8
10
VGSꢀ[V]
VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=38ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.6
1.2
0.8
0.4
0.0
1090 µA
109 µA
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=38ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
103
25 °C
25 °C, max
175 °C
Ciss
175 °C, max
103
102
101
102
101
100
Coss
Crss
0
10
20
30
40
50
60
70
80
0.00
0.25
0.50
0.75
1.00
1.25
1.50
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
102
10
16 V
40 V
64 V
25 °C
8
6
4
2
0
101
100 °C
150 °C
100
10-1
100
101
102
103
0
10
20
30
40
50
60
70
80
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=38ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
88
86
84
82
80
78
76
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
5ꢀꢀꢀꢀꢀPackageꢀOutlines
1
2
3
MILLIMETERS
MIN.
DIMENSIONS
MAX.
4.90
2.80
2.86
0.90
1.38
1.50
1.38
1.50
0.63
16.15
9.83
10.65
DOCUMENT NO.
Z8B00181328
A
A1
A2
b
4.50
2.34
2.42
0.65
0.95
1.20
0.65
1.20
0.40
15.67
8.97
10.00
REVISION
03
b1
b2
b3
b4
c
ISSUE DATE
23.07.2018
SCALE 5:1
0
1
2
3
4
5mm
D
D1
E
e
2.54
EUROPEAN PROJECTION
H
28.70
12.78
2.83
29.75
13.75
3.45
L
L1
øP
Q
3.00
3.38
3.15
3.50
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TOꢀ220ꢀFullPAK,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2019-09-02
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV
IPA040N08NM5S
RevisionꢀHistory
IPA040N08NM5S
Revision:ꢀ2019-09-02,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.0
2.1
Release of final version
Update package outline
2019-07-23
2019-09-02
Trademarks
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technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
TechnologiesꢀOfficeꢀ(www.infineon.com).
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2019-09-02
相关型号：
IPA041N04N G
英飞凌的 40V 和 60V 产品系列不仅具有行业内极低的 R DS(on)，同时还具有快速开关应用的完美开关行为。通过先进的薄晶圆技术，与其他器件相比，实现了 R DS(on) 减低 15%，品质因数 (R DS(on) x Q g) 降低 31%。
INFINEON
IPA045N10N3 G
英飞凌的 100V OptiMOS™ 功率 MOSFET 可以为高效率、高功率密度的 SMPS 提供卓越的解决方案。与下一代出色技术相比，该系列在 R Ds（on）和 FOM（品质因数）方面均降低了30％。
INFINEON
IPA057N06N3G
Power Field-Effect Transistor, 60A I(D), 60V, 0.0057ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, GREEN, PLASTIC, TO-220, 3 PIN
INFINEON
IPA057N06N3GXKSA1
Power Field-Effect Transistor, 60A I(D), 60V, 0.0057ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, GREEN, PLASTIC, TO-220, 3 PIN
INFINEON
IPA057N08N3GXKSA1
Power Field-Effect Transistor, 60A I(D), 80V, 0.0057ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, GREEN, PLASTIC, TO-220FP, 3 PIN
INFINEON
IPA060N06NXKSA1
Power Field-Effect Transistor, 45A I(D), 60V, 0.006ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, GREEN, PLASTIC, TO-220FP, 3 PIN
INFINEON
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