IPAN60R650CE_技术文档

IPAN60R650CE

MOSFET

PG-TOꢀ220ꢀFP

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

CoolMOS™ꢀisꢀaꢀrevolutionaryꢀtechnologyꢀforꢀhighꢀvoltageꢀpower

MOSFETs,ꢀdesignedꢀaccordingꢀtoꢀtheꢀsuperjunctionꢀ(SJ)ꢀprincipleꢀand

pioneeredꢀbyꢀInfineonꢀTechnologies.ꢀCoolMOS™ꢀCEꢀisꢀa

price-performanceꢀoptimizedꢀplatformꢀenablingꢀtoꢀtargetꢀcostꢀsensitive

applicationsꢀinꢀConsumerꢀandꢀLightingꢀmarketsꢀbyꢀstillꢀmeetingꢀhighest

efficiencyꢀstandards.ꢀTheꢀnewꢀseriesꢀprovidesꢀallꢀbenefitsꢀofꢀaꢀfast

switchingꢀSuperjunctionꢀMOSFETꢀwhileꢀnotꢀsacrificingꢀeaseꢀofꢀuseꢀand

offeringꢀtheꢀbestꢀcostꢀdownꢀperformanceꢀratioꢀavailableꢀonꢀtheꢀmarket.

Features

•ꢀExtremelyꢀlowꢀlossesꢀdueꢀtoꢀveryꢀlowꢀFOMꢀRdson*QgꢀandꢀEoss

•ꢀVeryꢀhighꢀcommutationꢀruggedness

•ꢀEasyꢀtoꢀuse/drive

Drain

Pin 2, Tab

•ꢀPb-freeꢀplating,ꢀHalogenꢀfreeꢀmoldꢀcompound

•ꢀQualifiedꢀforꢀstandardꢀgradeꢀapplications

Gate

Pin 1

Applications

Source

Pin 3

PFCꢀstages,ꢀhardꢀswitchingꢀPWMꢀstagesꢀandꢀresonantꢀswitchingꢀstages

forꢀe.g.ꢀPCꢀSilverbox,ꢀAdapter,ꢀLCDꢀ&ꢀPDPꢀTVꢀandꢀindoorꢀlighting.

Pleaseꢀnote:ꢀForꢀMOSFETꢀparallelingꢀtheꢀuseꢀofꢀferriteꢀbeadsꢀonꢀtheꢀgate

orꢀseparateꢀtotemꢀpolesꢀisꢀgenerallyꢀrecommended.

Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters

Parameter

V_DS@ T_j,max

R_DS(on),max

I_d.

Value

650

9.9

Unit

V

mΩ

A

Q_g.typ

20.5

19

nC

A

I_D,pulse

E_oss@400V

1.9

µJ

Typeꢀ/ꢀOrderingꢀCode

Package

Marking

RelatedꢀLinks

PG-TO 220 FullPAK -

Narrow Lead

IPAN60R650CE

60S650CE

see Appendix A

Final Data Sheet

1

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

TableꢀofꢀContents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Final Data Sheet

2

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

1ꢀꢀꢀꢀꢀMaximumꢀratings

atꢀT_jꢀ=ꢀ25°C,ꢀunlessꢀotherwiseꢀspecified

Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings

Values

Typ.

Parameter

Symbol

Unit Noteꢀ/ꢀTestꢀCondition

Min.

Max.

-

9.9

6.2

T_C=25°C

A

Continuous drain current¹⁾

I_D

T_C=100°C

Pulsed drain current²⁾

I_D,pulse

E_AS

-

19

A

T_C=25°C

Avalanche energy, single pulse

Avalanche energy, repetitive

Avalanche current, repetitive

MOSFET dv/dt ruggedness

Gate source voltage (static)

Gate source voltage (dynamic)

-

133

0.20

1.3

50

mJ

A

I_D=1.3A; V_DD=50V; see table 11

E_AR

-

I_D=1.3A; V_DD=50V; see table 11

-

I_AR

-

dv/dt

V_GS

-

V/ns V_DS=0...480V

-20

-30

20

V

static;

30

AC (f>1 Hz)

Power dissipation (Non FullPAK)

TO-251

P_tot

-

82

W

T_C=25°C

Storage temperature

T_stg

T_j

-40

-

150

7

°C

A

-

Operating junction temperature

Continuous diode forward current

Diode pulse current²⁾

-

I_S

T_C=25°C

I_S,pulse

-

19

A

V_DS=0...400V,ꢀI_SD<=I_S,ꢀT_j=25°Cꢀꢀꢀꢀꢀꢀꢀꢀ

see table 9

Reverse diode dv/dt³⁾

dv/dt

di_f/dt

P_tot

-

15

V/ns

A/µs

W

V_DS=0...400V,ꢀI_SD<=I_S,ꢀT_j=25°Cꢀꢀꢀꢀꢀꢀꢀꢀ

see table 9

Maximum diode commutation speed

500

28

Power dissipation (FullPAK)

TO-220FP

T_C=25°C

Mounting torque (FullPAK)

TO-220FP

-

50

Ncm M2.5 screws

Insulation withstand voltage for

TO-220FP

V_ISO

2500

V

V_rms,ꢀT_C=25°C,ꢀt=1min

2ꢀꢀꢀꢀꢀThermalꢀcharacteristics

Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristicsꢀ(FullPAK)ꢀTO-220FP

Values

Parameter

Symbol

Unit Noteꢀ/ꢀTestꢀCondition

Min.

Typ.

Max.

4.5

Thermal resistance, junction - case

R_thJC

-

°C/W -

Thermal resistance, junction - ambient R_thJA

80

°C/W leaded

Soldering temperature, wavesoldering

only allowed at leads

T_sold

-

260

°C

1.6mm (0.063 in.) from case for 10s

¹⁾Limited by T_{j max}. TO220 equivalent, Maximum duty cycle D=0.50

²⁾Pulse width t_plimited by T_j,max

³⁾ꢀIdenticalꢀlowꢀsideꢀandꢀhighꢀsideꢀswitchꢀwithꢀidenticalꢀR_G

Final Data Sheet

3

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics

atꢀT_j=25°C,ꢀunlessꢀotherwiseꢀspecified

Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics

Values

Typ.

-

Parameter

Symbol

Unit Noteꢀ/ꢀTestꢀCondition

Min.

600

2.5

Max.

-

Drain-source breakdown voltage

Gate threshold voltage

V_(BR)DSS

V_(GS)th

V

V_GS=0V,ꢀI_D=0.25mA

V_DS=V_GS,ꢀI_D=0.2mA

3.0

3.5

-

10

1

-

V_DS=600,ꢀV_GS=0V,ꢀT_j=25°C

V_DS=600,ꢀV_GS=0V,ꢀT_j=150°C

Zero gate voltage drain current

Gate-source leakage current

Drain-source on-state resistance

Gate resistance

I_DSS

µA

nA

Ω

I_GSS

-

100

V_GS=20V,ꢀV_DS=0V

-

0.54

1.40

0.65

-

V_GS=10V,ꢀI_D=2.4A,ꢀT_j=25°C

V_GS=10V,ꢀI_D=2.4A,ꢀT_j=150°C

R_DS(on)

R_G

-

10

-

Ω

f=1MHz,ꢀopenꢀdrain

Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics

Values

Typ.

440

Parameter

Symbol

Unit Noteꢀ/ꢀTestꢀCondition

Min.

Max.

Input capacitance

Output capacitance

C_iss

-

pF

V_GS=0V,ꢀV_DS=100V,ꢀf=1MHz

C_oss

30

Effective output capacitance,

energy related¹⁾

C_o(er)

C_o(tr)

t_d(on)

t_r

-

21

88

10

8

-

pF

ns

V_GS=0V,ꢀV_DS=0...480V

Effective output capacitance,

time related²⁾

I_D=constant,ꢀV_GS=0V,ꢀV_DS=0...480V

V_DD=400V,ꢀV_GS=13V,ꢀI_D=3A,

R_G=6.8Ω;ꢀseeꢀtableꢀ10

Turn-on delay time

Rise time

V_DD=400V,ꢀV_GS=13V,ꢀI_D=3A,

R_G=6.8Ω;ꢀseeꢀtableꢀ10

V_DD=400V,ꢀV_GS=13V,ꢀI_D=3A,

R_G=6.8Ω;ꢀseeꢀtableꢀ10

Turn-off delay time

Fall time

t_d(off)

t_f

58

11

V_DD=400V,ꢀV_GS=13ꢀV,ꢀI_D=3A,

R_G=6.8Ω;ꢀseeꢀtableꢀ10

Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics

Values

Typ.

2.5

Parameter

Symbol

Unit Noteꢀ/ꢀTestꢀCondition

Min.

Max.

Gate to source charge

Gate to drain charge

Gate charge total

Q_gs

-

nC

V

V_DD=480V,ꢀI_D=3A,ꢀV_GS=0ꢀtoꢀ10V

Q_gd

10.5

20.5

5.4

Q_g

Gate plateau voltage

V_plateau

¹⁾ꢀC_o(er)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀC_ossꢀwhileꢀV_DSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ80%ꢀV_o(BR)DSS

²⁾ꢀC_o(tr)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀC_ossꢀwhileꢀV_DSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ80%ꢀV_o(BR)DSS

Final Data Sheet

4

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiodeꢀcharacteristics

Values

Typ.

0.9

Parameter

Symbol

Unit Noteꢀ/ꢀTestꢀCondition

Min.

Max.

Diode forward voltage

Reverse recovery time

V_SD

t_rr

-

V

V_GS=0V,ꢀI_F=3A,ꢀT_j=25°C

V_R=400V,ꢀI_F=3A,ꢀdi_F/dt=100A/µs;

see table 9

-

250

2.1

16

-

ns

V_R=400V,ꢀI_F=3A,ꢀdi_F/dt=100A/µs;

see table 9

Reverse recovery charge

Q_rr

I_rrm

µC

A

V_R=400V,ꢀI_F=3A,ꢀdi_F/dt=100A/µs;

see table 9

Peak reverse recovery current

Final Data Sheet

5

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams

Diagramꢀ2:ꢀPowerꢀdissipationꢀ(FullPAK)

Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedanceꢀ(FullPAK)

30

10¹

25

20

15

10

5

0.5

0.2

10⁰

0.1

0.05

0.02

10^-1

0.01

single pulse

0

10^-2

0

25

50

75

100

125

150

10^-5

10^-4

10^-3

10^-2

10^-1

10⁰

10¹

T_Cꢀ[°C]

t_pꢀ[s]

P_tot=f(T_C)

Z_thJCꢀ=f(t_P);ꢀparameter:ꢀD=t_p/T

Diagramꢀ6:ꢀSafeꢀoperatingꢀareaꢀ(FullPAK)

Diagramꢀ8:ꢀSafeꢀoperatingꢀareaꢀ(FullPAK)

10²

1 µs

10¹

10⁰

10 µs

10¹

10 µs

100 µs

1 ms

100 µs

1 ms

10 ms

10⁰

10^-1

10^-2

10^-3

10^-4

10 ms

DC

10^-1

10^-2

10^-3

10^-4

10⁰

10¹

10²

10³

10⁰

10¹

10²

10³

V_DSꢀ[V]

I_D=f(V_DS);ꢀT_C=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀt_p

I_D=f(V_DS);ꢀT_C=80ꢀ°C;ꢀD=0;ꢀparameter:ꢀt_p

Final Data Sheet

6

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

Diagramꢀ9:ꢀTyp.ꢀoutputꢀcharacteristics

Diagramꢀ10:ꢀTyp.ꢀoutputꢀcharacteristics

20

12

20 V

10 V

7 V

10 V

8 V

16

9

6

3

0

8 V

12

6 V

7 V

8

5.5 V

6 V

5 V

5.5 V

4

4.5 V

5 V

4.5 V

0

5

10

15

20

0

5

10

15

20

V_DSꢀ[V]

I_D=f(V_DS);ꢀT_j=25ꢀ°C;ꢀparameter:ꢀV_GS

I_D=f(V_DS);ꢀT_j=125ꢀ°C;ꢀparameter:ꢀV_GS

Diagramꢀ11:ꢀTyp.ꢀdrain-sourceꢀon-stateꢀresistance

Diagramꢀ12:ꢀDrain-sourceꢀon-stateꢀresistance

2.0

1.60

1.50

1.40

1.30

1.20

1.10

1.00

1.9

1.8

1.7

10 V

5.5 V

7 V

6 V

6.5 V

1.6

1.5

1.4

1.3

1.2

1.1

1.0

20 V

0.90

0.80

0.70

0.60

0.50

0.40

0.30

0.20

98%

typ

0

5

10

15

-50

-25

0

25

50

75

100

125

150

I_Dꢀ[A]

T_jꢀ[°C]

R_DS(on)=f(I_D);ꢀT_j=125ꢀ°C;ꢀparameter:ꢀV_GS

R_DS(on)=f(T_j);ꢀI_D=2.4ꢀA;ꢀV_GS=10ꢀV

Final Data Sheet

7

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

Diagramꢀ13:ꢀTyp.ꢀtransferꢀcharacteristics

Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge

20

10

25 °C

18

16

14

12

10

8

9

8

7

6

5

4

3

2

1

0

120 V

480 V

150 °C

6

4

2

0

2

4

6

8

10

12

0

5

10

15

20

25

V_GSꢀ[V]

Q_gateꢀ[nC]

I_D=f(V_GS);ꢀV_DS=20V;ꢀparameter:ꢀT_j

V_GS=f(Q_gate);ꢀI_D=3.0ꢀAꢀpulsed;ꢀparameter:ꢀV_DD

Diagramꢀ15:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode

Diagramꢀ16:ꢀAvalancheꢀenergy

10²

150

25 °C

125 °C

125

100

75

50

25

0

10¹

10⁰

10^-1

0.0

0.5

1.0

1.5

2.0

25

50

75

100

125

150

V_SDꢀ[V]

T_jꢀ[°C]

I_F=f(V_SD);ꢀparameter:ꢀT_j

E_AS=f(T_j);ꢀI_D=1.3ꢀA;ꢀV_DD=50ꢀV

Final Data Sheet

8

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

Diagramꢀ17:ꢀDrain-sourceꢀbreakdownꢀvoltage

Diagramꢀ18:ꢀTyp.ꢀcapacitances

700

10⁴

680

660

640

620

600

580

560

540

520

10³

Ciss

10²

Coss

10¹

Crss

10⁰

-75 -50 -25

0

25

50

75 100 125 150 175

0

100

200

300

400

500

T_jꢀ[°C]

V_DSꢀ[V]

V_BR(DSS)=f(T_j);ꢀI_D=0.25ꢀmA

C=f(V_DS);ꢀV_GS=0ꢀV;ꢀf=1ꢀMHz

Diagramꢀ19:ꢀTyp.ꢀCossꢀstoredꢀenergy

2.5

2.0

1.5

1.0

0.5

0.0

0

100

200

300

400

500

V_DSꢀ[V]

E_oss=f(V_DS

)

Final Data Sheet

9

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

5ꢀꢀꢀꢀꢀTestꢀCircuits

Tableꢀ8ꢀꢀꢀꢀꢀDiodeꢀcharacteristics

Test circuit for diode characteristics

Diode recovery waveform

V,I

V_DS

R_g1

V_DS(peak)

V_DS

t_rr

V_DS

I_F

t_F

t_S

dI_F/ dt

R_g2

I_F

t

10%I_rrm

Q

F

Q

S

I_F

dI / dt

rr

t_rr=t_F+t_S

rr

I_rrm

Q =Q_F+Q

S

R_g1 = R_g2

Tableꢀ9ꢀꢀꢀꢀꢀSwitchingꢀtimes

Switching times test circuit for inductive load

Switching times waveform

V_DS

90%

10%

V_DS

V_GS

t_d(off)

t_f

t_d(on)

t_on

t_r

t_off

Tableꢀ10ꢀꢀꢀꢀꢀUnclampedꢀinductiveꢀload

Unclamped inductive load test circuit

Unclamped inductive waveform

V_(BR)DS

I_D

V_DS

I_D

Final Data Sheet

10

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOS™ꢀCEꢀPowerꢀTransistor

IPAN60R650CE

6ꢀꢀꢀꢀꢀPackageꢀOutlines

DOCUMENT NO.

Z8B00188573

REVISION

01

SCALE 5:1

5mm

0

1

2

3

4

EUROPEAN PROJECTION

ISSUE DATE

22.03.2018

MILLIMETERS

MAX.

4.80

DIMENSIONS

MIN.

4.60

2.60

2.47

0.56

1.01

0.46

15.90

9.58

10.40

A

A1

A2

b

2.80

2.67

0.69

b1

c

1.15

0.59

D

16.10

9.78

D1

E

10.60

2.54

e

N

3

L

13.45

1.70

3.00

3.25

13.75

1.91

L1

øP

Q

3.20

3.45

Figure 1 Outline PG-TO 220 FullPAK - Narrow Lead, dimensions in mm

Final Data Sheet

11

Rev.ꢀ2.1,ꢀꢀ2016-11-28

Rev. 2.2, 2018-04-25

600V CoolMOS™ CE Power Transistor

IPAN60R650CE

7

Appendix A

Table 11 Related Links

• IFX CoolMOS^TMCE Webpage: www.infineon.com

• IFX CoolMOS^TMCE application note: www.infineon.com

• IFX CoolMOS^TMCE simulation model: www.infineon.com

• IFX Design tools: www.infineon.com

Final Data Sheet

12

Rev. 2.1, 2016-11-28

Rev. 2.2, 2018-04-25

600VꢀCoolMOSªꢀCEꢀPowerꢀTransistor

IPAN60R650CE

RevisionꢀHistory

IPAN60R650CE

Revision:ꢀ2018-04-30,ꢀRev.ꢀ2.2

Previous Revision

Revision Date

Subjects (major changes since last revision)

2.1

2.2

Revised package drawing on page 11

Revised package drawing

2016-11-28

2018-04-30

TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG

AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,

EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,

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13

Rev.ꢀ2.2,ꢀꢀ2018-04-30


型号：	IPAN60R650CE
厂家：	Infineon
描述：
文件：	总13页 (文件大小：727K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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