IPB240N04S4-1R0 [INFINEON]

Power Field-Effect Transistor, 240A I(D), 40V, 0.001ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263-7-3, 7/6 PIN;
IPB240N04S4-1R0
型号: IPB240N04S4-1R0
厂家: Infineon    Infineon
描述:

Power Field-Effect Transistor, 240A I(D), 40V, 0.001ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263-7-3, 7/6 PIN

脉冲 晶体管
文件: 总9页 (文件大小:183K)
中文:  中文翻译
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IPB240N04S4-1R0  
OptiMOS-T2 Power-Transistor  
Product Summary  
V DS  
R DS(on)  
I D  
40  
1.0  
240  
V
mW  
A
Features  
• N-channel - Enhancement mode  
PG-TO263-7-3  
• AEC qualified  
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
• Green product (RoHS compliant)  
• Ultra low Rds(on)  
• 100% Avalanche tested  
Type  
Package  
Marking  
IPB240N04S4-1R0  
PG-TO263-7-3  
4N041R0  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol  
Conditions  
Unit  
T C=25°C, V GS=10V1)  
I D  
Continuous drain current  
240  
240  
A
T C=100 °C,  
V GS=10 V2)  
Pulsed drain current2)  
I D,pulse  
E AS  
I AS  
T C=25 °C  
960  
750  
Avalanche energy, single pulse2)  
Avalanche current, single pulse  
Gate source voltage  
I D=120 A  
mJ  
A
-
190  
V GS  
P tot  
-
±20  
V
T C=25 °C  
Power dissipation  
231  
W
°C  
T j, T stg  
-
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-
-
-55 ... +175  
55/175/56  
Rev. 1.0  
page 1  
2013-08-22  
IPB240N04S4-1R0  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Thermal characteristics2)  
R thJC  
R thJA  
Thermal resistance, junction - case  
SMD version, device on PCB  
-
-
-
-
-
-
-
0.65 K/W  
minimal footprint  
62  
40  
6 cm2 cooling area3)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS V GS=0 V, I D= 1 mA  
V GS(th) V DS=V GS, I D=180 µA  
Drain-source breakdown voltage  
Gate threshold voltage  
40  
-
-
V
2.0  
3.0  
4.0  
V DS=40 V, V GS=0 V,  
T j=25 °C  
I DSS  
Zero gate voltage drain current  
-
-
0.1  
1
1
µA  
V DS=18 V, V GS=0 V,  
T j=85 °C2)  
20  
I GSS  
V GS=20 V, V DS=0 V  
Gate-source leakage current  
-
-
100 nA  
RDS(on) V GS=10 V, I D=100 A  
Drain-source on-state resistance  
-
0.85  
1.00 mΩ  
Rev. 1.0  
page 2  
2013-08-22  
IPB240N04S4-1R0  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Dynamic characteristics2)  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
C oss  
Crss  
t d(on)  
t r  
-
-
-
-
-
-
-
13601  
2969  
104  
42  
17682 pF  
3860  
V GS=0 V, V DS=25 V,  
f =1 MHz  
238  
-
-
-
-
ns  
28  
V DD=20 V, V GS=10 V,  
I D=240 A, R G=3.5 W  
t d(off)  
t f  
Turn-off delay time  
Fall time  
44  
47  
Gate Charge Characteristics2)  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
77  
24  
100 nC  
54  
Q gd  
V DD=32 V, I D=240 A,  
V GS=0 to 10 V  
Q g  
170  
5.5  
221  
V plateau  
Gate plateau voltage  
-
V
A
Reverse Diode  
Diode continous forward current2)  
Diode pulse current2)  
I S  
-
-
-
-
240  
960  
T C=25 °C  
I S,pulse  
V GS=0 V, I F=100 A,  
T j=25 °C  
V SD  
Diode forward voltage  
-
0.9  
1.3  
V
Reverse recovery time2)  
t rr  
-
-
80  
-
-
ns  
V R=20 V, I F=50A,  
di F/dt =100 A/µs  
Reverse recovery charge2)  
Q rr  
130  
nC  
1) Current is limited by bondwire; with an R thJC = 0.65 K/W the chip is able to carry 367A at 25°C.  
2) Defined by design. Not subject to production test.  
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.0  
page 3  
2013-08-22  
IPB240N04S4-1R0  
1 Power dissipation  
2 Drain current  
P tot = f(T C); V GS ≥ 6 V  
I D = f(T C); V GS ≥ 6 V  
250  
200  
150  
100  
50  
260  
240  
220  
200  
180  
160  
140  
120  
100  
80  
60  
40  
20  
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T C [°C]  
T C [°C]  
3 Safe operating area  
4 Max. transient thermal impedance  
Z thJC = f(t p)  
I D = f(V DS); T C = 25 °C; D = 0  
parameter: t p  
parameter: D =t p/T  
100  
1000  
10 µs  
1 µs  
100 µs  
0.5  
1 ms  
10-1  
100  
0.1  
0.05  
0.01  
10-2  
10  
single pulse  
10-3  
1
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
0.1  
1
10  
100  
t p [s]  
V DS [V]  
Rev. 1.0  
page 4  
2013-08-22  
IPB240N04S4-1R0  
5 Typ. output characteristics  
I D = f(V DS); T j = 25 °C  
parameter: V GS  
6 Typ. drain-source on-state resistance  
R DS(on) = (I D); T j = 25 °C  
parameter: V GS  
6
700  
6.5 V  
5 V  
10 V  
7 V  
600  
500  
400  
300  
200  
100  
0
5
4
3
2
1
6 V  
5.5 V  
5.5 V  
6 V  
6.5 V  
7 V  
10 V  
5 V  
0
0
100  
I D [A]  
200  
0
2
4
6
V DS [V]  
7 Typ. transfer characteristics  
I D = f(V GS); V DS = 6V  
parameter: T j  
8 Typ. drain-source on-state resistance  
R DS(on) = f(T j); I D = 100 A; V GS = 10 V  
1000  
900  
800  
700  
600  
500  
400  
300  
1.5  
1.25  
1
0.75  
0.5  
200  
175 °C  
25 °C  
100  
0
-55 °C  
-60  
-20  
20  
60  
100  
140  
180  
2
3
4
5
6
7
8
T j [°C]  
V GS [V]  
Rev. 1.0  
page 5  
2013-08-22  
IPB240N04S4-1R0  
9 Typ. gate threshold voltage  
V GS(th) = f(T j); V GS = V DS  
parameter: I D  
10 Typ. capacitances  
C = f(V DS); V GS = 0 V; f = 1 MHz  
105  
104  
103  
102  
4
3.5  
3
Ciss  
1800 µA  
Coss  
180 µA  
2.5  
2
1.5  
1
Crss  
0
5
10  
15  
20  
25  
30  
35  
40  
-60  
-20  
20  
60  
T j [°C]  
100  
140  
180  
V DS [V]  
11 Typical forward diode characteristicis  
IF = f(VSD  
12 Typ. avalanche characteristics  
I AS = f(t AV  
)
)
parameter: T j  
parameter: Tj(start)  
103  
1000  
102  
100  
25 °C  
100 °C  
150 °C  
25 °C  
175 °C  
101  
10  
100  
0
1
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
0.1  
1
10  
100  
1000  
V SD [V]  
t AV [µs]  
Rev. 1.0  
page 6  
2013-08-22  
IPB240N04S4-1R0  
13 Typical avalanche energy  
E AS = f(T j)  
14 Drain-source breakdown voltage  
V BR(DSS) = f(T j); I D = 1 mA  
parameter: I D  
44  
1750  
1500  
60 A  
1250  
1000  
42  
40  
38  
750  
120 A  
190 A  
500  
250  
0
-60  
-20  
20  
60  
100  
140  
180  
25  
75  
125  
175  
T j [°C]  
T j [°C]  
15 Typ. gate charge  
16 Gate charge waveforms  
V GS = f(Q gate); I D = 180 A pulsed  
parameter: V DD  
10  
9
8
7
6
5
4
3
2
1
0
VGS  
8 V  
32 V  
Q g  
Qgate  
Qgd  
Q gs  
0
40  
80  
120  
160  
Q gate [nC]  
Rev. 1.0  
page 7  
2013-08-22  
IPB240N04S4-1R0  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© Infineon Technologies AG 2013  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of conditions  
or characteristics. With respect to any examples or hints given herein, any typical values stated  
herein and/or any information regarding the application of the device, Infineon Technologies hereby  
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties  
of non-infringement of intellectual property rights of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact  
the nearest Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with the  
express written approval of Infineon Technologies, if a failure of such components can reasonably be  
expected to cause the failure of that life-support device or system or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body or to support and/or maintain and sustain and/or protect human life.  
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.0  
page 8  
2013-08-22  
IPB240N04S4-1R0  
Revision History  
Version  
Date  
Changes  
22.08.2013 Final Data Sheet  
1.0  
Rev. 1.0  
page 9  
2013-08-22  

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