IPP77N06S2-12 [INFINEON]

OptiMOS Power-Transistor; 的OptiMOS功率三极管
IPP77N06S2-12
型号: IPP77N06S2-12
厂家: Infineon    Infineon
描述:

OptiMOS Power-Transistor
的OptiMOS功率三极管

文件: 总8页 (文件大小:161K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IPB77N06S2-12  
IPP77N06S2-12  
OptiMOS® Power-Transistor  
Product Summary  
Features  
VDS  
55  
11.7  
77  
V
• N-channel - Enhancement mode  
R
DS(on),max (SMD version)  
m  
A
• Automotive AEC Q101 qualified  
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
Green package (lead free)  
• Ultra low Rds(on)  
I D  
PG-TO263-3-2  
PG-TO220-3-1  
• 100% Avalanche tested  
Type  
Package  
Ordering Code Marking  
IPB77N06S2-12  
IPP77N06S2-12  
PG-TO263-3-2  
PG-TO220-3-1  
SP0002-18173  
SP0002-18172  
2N0612  
2N0612  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol  
Conditions  
Unit  
Continuous drain current1)  
I D  
T C=25 °C, VGS=10 V  
T C=100 °C,  
77  
56  
A
V
GS=10 V2)  
Pulsed drain current2)  
Avalanche energy, single pulse2)  
Gate source voltage4)  
I D,pulse  
EAS  
T C=25 °C  
I D= 77 A  
308  
280  
mJ  
V
VGS  
±20  
Ptot  
T C=25 °C  
Power dissipation  
158  
W
°C  
T j, T stg  
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-55 ... +175  
55/175/56  
Rev. 1.0  
page 1  
2005-12-27  
IPB77N06S2-12  
IPP77N06S2-12  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Thermal characteristics2)  
R thJC  
R thJA  
R thJA  
Thermal resistance, junction - case  
-
-
-
-
0.95 K/W  
62  
Thermal resistance, junction -  
ambient, leaded  
SMD version, device on PCB  
minimal footprint  
-
-
-
-
62  
40  
6 cm2 cooling area5)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V(BR)DSS  
VGS(th)  
V
V
GS=0 V, I D= 1 mA  
DS=VGS, I D=93 µA  
Drain-source breakdown voltage  
Gate threshold voltage  
55  
-
-
V
2.1  
3.0  
4.0  
V
DS=55 V, VGS=0 V,  
I DSS  
Zero gate voltage drain current  
-
-
0.01  
1
1
µA  
T j=25 °C  
V
DS=55 V, VGS=0 V,  
100  
T j=125 °C2)  
I GSS  
V
V
GS=20 V, VDS=0 V  
GS=10 V, I D=38 A,  
Gate-source leakage current  
-
-
1
100 nA  
RDS(on)  
Drain-source on-state resistance  
9.8  
12.0 m  
V
GS=10 V, I D=38 A,  
-
9.5  
11.7  
SMD version  
Rev. 1.0  
page 2  
2005-12-27  
IPB77N06S2-12  
IPP77N06S2-12  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Dynamic characteristics2)  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
C oss  
Crss  
t d(on)  
t r  
-
-
-
-
-
-
-
1770  
460  
120  
14  
-
-
-
-
-
-
-
pF  
ns  
V
GS=0 V, VDS=25 V,  
f =1 MHz  
27  
V
DD=30 V, VGS=10 V,  
I D=77 A, R G=6.2 Ω  
t d(off)  
t f  
Turn-off delay time  
Fall time  
34  
26  
Gate Charge Characteristics2)  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
9
12  
28  
60  
-
nC  
Q gd  
18  
45  
5.6  
V
V
DD=44 V, I D=77 A,  
GS=0 to 10 V  
Q g  
Vplateau  
Gate plateau voltage  
V
A
Reverse Diode  
Diode continous forward current2)  
Diode pulse current2)  
I S  
-
-
-
-
77  
T C=25 °C  
I S,pulse  
308  
V
GS=0 V, I F=77 A,  
VSD  
Diode forward voltage  
Reverse recovery time2)  
Reverse recovery charge2)  
-
-
-
0.9  
45  
64  
1.3  
60  
80  
V
T j=25 °C  
VR=30 V, I F=I S,  
diF/dt =100 A/µs  
t rr  
ns  
nC  
Q rr  
1) Current is limited by die area; with an R thJC = 0.95 K/W the chip is able to carry 77 A at 25°C. For detailed  
information see Application Note ANPS071E at www.infineon.com/optimos  
2) Defined by design. Not subject to production test.  
3) See diagram 13.  
4) Qualified at -20V and +20V.  
5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.0  
page 3  
2005-12-27  
IPB77N06S2-12  
IPP77N06S2-12  
1 Power dissipation  
2 Drain current  
P
tot = f(T C); VGS 6 V  
I D = f(T C); VGS 10 V  
180  
160  
140  
120  
100  
80  
100  
80  
60  
40  
20  
0
60  
40  
20  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
C [°C]  
T
C [°C]  
3 Safe operating area  
4 Max. transient thermal impedance  
thJC = f(t p)  
I D = f(VDS); T C = 25 °C; D = 0  
parameter: t p  
Z
parameter: D =t p/T  
100  
1000  
100  
10  
0.5  
1 µs  
10 µs  
0.1  
10-1  
100 µs  
1 ms  
0.05  
0.01  
10-2  
single pulse  
10-3  
1
10-7  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
0.1  
1
10  
100  
t
p [s]  
V
DS [V]  
Rev. 1.0  
page 4  
2005-12-27  
IPB77N06S2-12  
IPP77N06S2-12  
5 Typ. output characteristics  
I D = f(VDS); T j = 25 °C  
parameter: VGS  
6 Typ. drain-source on-state resistance  
DS(on) = (I D); T j = 25 °C  
R
parameter: VGS  
300  
20  
10 V  
6 V  
5.5 V  
5 V  
18  
16  
14  
12  
10  
8
250  
200  
150  
100  
50  
7 V  
8 V  
6 V  
5.5 V  
10 V  
5 V  
4.5 V  
0
6
0
2
4
6
8
10  
0
20  
40  
60  
80  
100  
120  
I
D [A]  
V
DS [V]  
7 Typ. transfer characteristics  
I D = f(VGS); VDS = 6V  
parameter: T j  
8 Typ. Forward transconductance  
g fs = f(I D); T j = 25°C  
parameter: g fs  
120  
100  
80  
150  
125  
100  
75  
60  
40  
50  
20  
175 °C  
25  
25 °C  
-55 °C  
0
0
2
3
4
5
6
0
50  
100  
150  
200  
I
D [A]  
V
GS [V]  
Rev. 1.0  
page 5  
2005-12-27  
IPB77N06S2-12  
IPP77N06S2-12  
9 Typ. Drain-source on-state resistance  
DS(ON) = f(T j)  
10 Typ. gate threshold voltage  
GS(th) = f(T j); VGS = VDS  
R
V
parameter: I D = 80 A; VGS = 10 V  
parameter: I D  
20  
4
18  
16  
14  
12  
10  
8
3.5  
3
465 µA  
93 µA  
2.5  
2
1.5  
6
4
1
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
T j [°C]  
100  
140  
180  
T j [°C]  
11 Typ. capacitances  
12 Typical forward diode characteristicis  
C = f(VDS); VGS = 0 V; f = 1 MHz  
IF = f(VSD)  
parameter: T j  
104  
103  
102  
Ciss  
103  
Coss  
25 °C  
175 °C  
101  
Crss  
102  
100  
0
5
10  
15  
20  
25  
30  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
V
DS [V]  
V
SD [V]  
Rev. 1.0  
page 6  
2005-12-27  
IPB77N06S2-12  
IPP77N06S2-12  
13 Typical avalanche energy  
AS = f(T j)  
14 Typ. gate charge  
E
V
GS = f(Q gate); I D = 80 A pulsed  
parameter: I D  
600  
12  
10  
8
40 A  
44 V  
11 V  
500  
50 A  
400  
300  
6
77 A  
200  
100  
4
2
0
0
0
50  
100  
150  
200  
0
20  
40  
60  
T j [°C]  
Q gate [nC]  
15 Typ. drain-source breakdown voltage  
16 Gate charge waveforms  
V
BR(DSS) = f(T j); I D = 1 mA  
66  
64  
62  
60  
58  
56  
54  
52  
50  
48  
46  
VGS  
Qg  
Qgate  
Qgd  
Qgs  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
Rev. 1.0  
page 7  
2005-12-27  
IPB77N06S2-12  
IPP77N06S2-12  
Published by  
Infineon Technologies AG  
St.-Martin-Straße 53  
D-81541 München  
© Infineon Technologies AG 2004  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain components and shall not be considered as  
a guarantee of characteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,  
regarding circuits, descriptions and charts stated herein.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact your  
nearest Infineon Technologies Office (www.infineon.com)  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact your nearest Infineon Technologies Office.  
Infineon Technologies' components may only be used in life-support devices or systems with the  
expressed written approval of Infineon Technologies, if a failure of such components can reasonably  
be expected to cause the failure of that life-support device or system, or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,  
it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.0  
page 8  
2005-12-27  

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