IR21593 [INFINEON]
DIMMING BALLAST CONTROL IC; 调光镇流器控制IC
| 型号： | IR21593 |
| 厂家： | 
Infineon |
| 描述： | DIMMING BALLAST CONTROL IC |
| 文件： | 总25页 (文件大小：258K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60194_A
( )
( )
S
S
IR21592
IR21593
DIMMING BALLAST CONTROL IC
Features
Full lamp fault protection
Brown-out protection
Automatic restart
Micro-power startup
Zener clamped Vcc
Over-temperature protection
16-pin DIP and SOIC package types
•
Ballast control and half-bridge driver in one IC
•
•
Transformer-less lamp power sensing
Closed-loop lamp power control
Closed-loop preheat current control
Programmable preheat time
Programmable preheat current
Lamp ignition detection
Programmable ignition-to-dim time
0.5 to 5VDC dimming control input
•
•
•
•
•
•
•
•
•
•
•
•
Parameter
Deadtime
IR21592
1.8us
IR21593
1.0us
•
Min and max lamp power adjustments
Programmable minimum frequency
•
Frequency
Range
See
Graph 11
See
Graph 12
•
Internal current sense blanking
•
Packages
Description
Description: The IR21592/IR21593 are complete dimming ballast controllers and 600V
half-bridge drivers all in one IC. The architecture includes phase control for trans-
former-less lamp power sensing and regulation which minimizes changes needed to
adapt non-dimming ballasts for dimming. Externally programmable features such as
preheat time and current, ignition-to-dim time, and a complete dimming interface with
minimum and maximum settings provide a high degree of flexibility for the ballast
design engineer. Protection from failure of a lamp to strike, filament failures, thermal
overload, or lamp failure during normal operation, as well as an automatic restart
function, have been included in the design. The heart of this control IC is a voltage-
controlled oscillator with externally programmable minimum frequency. The IR21592/
IR21593 are available in both 16 pin DIP and 16 pin narrow body SOIC packages.
16 Lead SOIC
(narrow body)
16 Lead PDIP
Typical Connection
+ Rectified AC Line
Single Lamp Dimmable
+ DC Bus
RVAC
RPULL-UP
RVDC
CVDC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDC
VCO
CPH
DIM
HO
VS
CVCO
CPH
VB
RDIM
RMAX
RMIN
RFMIN
RIPH
VCC
COM
LO
0.5 to 5VDC
MAX
MIN
FMIN
IPH
CS
SD
RCS
- DC Bus
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IR21592/IR21593
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
V
High side floating supply voltage
High side floating supply offset voltage
High side floating output voltage
Low side output voltage
-0.3
625
B
V
S
V
- 25
V
+ 25
B
B
V
V
HO
V
- 0.3
V
+ 0.3
S
B
V
LO
-0.3
V
+ 0.3
CC
I
Maximum allowable output current (either output)
due to external power transistor miller effect
Voltage controlled oscillator input voltage
CPH current
-500
500
OMAX
mA
V
-0.3
-5
6.0
5
V
VCO
I
mA
CPH
V
IPH voltage
-0.3
-0.3
-0.3
-0.3
-0.3
-5
5.5
5.5
5.5
5.5
5.5
5
IPH
V
DIM
Dimming control pin input voltage
Maximum lamp power setting pin input voltage
Minimum lamp power setting pin input voltage
Current sense input voltage
V
MAX
V
V
MIN
V
CS
I
Shutdown pin current
SD
mA
I
Supply current (note 1)
—
25
CC
dV/dt
Allowable offset voltage slew rate
-50
—
50
V/ns
P
Package power dissipation @ T ≤ +25°C
(16 pin DIP)
(16 pin SOIC)
(16 pin DIP)
1.60
1.25
75
D
A
W
P
= (T
-T )/Rth
JA
—
D
JMAX
A
Rth
Thermal resistance, junction to ambient
—
JA
oC/W
(16 pin SOIC)
—
115
150
150
300
T
Junction temperature
-55
-55
—
J
T
Storage temperature
S
L
oC
T
Lead temperature (soldering, 10 seconds)
Note 1:
This IC contains a zener clamp structure between the chip V
and COM which has a nominal breakdown
CC
voltage of 15.6V (V
). Please note that this supply pin should not be driven by a DC, low impedance
CLAMP
power source greater than the diode clamp voltage (V
section.
) as specified in the Electrical Characteristics
CLAMP
2
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IR21592/IR21593
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
Definition
Min.
Max.
Units
V
High side floating supply voltage
Steady state high side floating supply offset voltage
Supply voltage
V
- 0.7
V
BS
CC
CLAMP
600
V
V
-1
S
V
V
V
CC
CC
CCUV+
CLAMP (15.6)
10
I
Supply current
note 2
mA
V
V
0
5
5.0
0
VCO
VCO pin voltage
DIM pin voltage
V
0.5
DIM
V
MAX pin current (note 3)
MIN pin voltage
-750
MAX
µA
V
1
3
MIN
V
—
10
V
Minimum required VBS voltage for proper HO functionality
Minimum frequency setting resistance
5
100
BSMIN
R
FMIN
kΩ
I
Shutdown pin current
Current sensing pin current
Junction temperature
-1
-1
1
1
SD
mA
I
CS
T
-40
125
oC
J
Note 2: Enough current should be supplied into the VCC lead to keep the internal 15.6V zener clamp diode on this lead
regulating its voltage, V
.
CLAMP
Note 3: The MAX lead is a voltage-controlled current source. For optimum dim interface current mirror performance,
this current should be kept between 0 and 750µA.
Electrical Characteristics
V
CC
= V = V
BS
= 14V +/- 0.25V, V = 0.5V, V = 0.0V, R
= 40k, C
= 10 nF, V
= 0.0V, R
= 33k,
BIAS
CS
SD
FMIN
VCO
DIM
MAX
R
MIN
= 56k, V
= 0.0V, C
= 1000pF, T = 25oC unless otherwise specified.
LO,HO
A
CPH
Symbol Definition
Min. Typ.
Max.
Units Test Conditions
Supply Characteristics
V
V
supply undervoltage positive going
12.0
12.5
13.0
CCUV+
CC
V
threshold
supply undervoltage lockout hysteresis 1.5
V
V
1.6
200
240
1.7
330
—
CCHYS
CC
I
UVLO mode quiescent current
Fault-mode quiescent current
70
—
V
= 10V
CC
QCCUV
µA
I
SD=5V, CS=2V, or
Tj > TSD
QCCFLT
I
V
V
V
V
supply current @ FMIN (IR21592)
supply current @ FMAX (IR21592)
supply current @ FMIN (IR21593)
supply current @ FMAX (IR21593)
—
—
—
—
5.6
6.0
5.4
6.8
—
—
—
—
V
V
V
V
= 0V
= 5V
= 0V
= 5V
CCFMIN
CC
CC
CC
CC
VCO
VCO
VCO
VCO
I
mA
V
CCFMAX
I
I
CCFMIN
CCFMAX
V
V
CC
zener shunt clamp voltage
14.5
15.6
16.5
I
= 10mA
CLAMP
CC
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IR21592/IR21593
Electrical Characteristics (cont.)
V
= V = V
BS
= 14V +/- 0.25V, V = 0.5V, V = 0.0V, R
= 40k, C
= 10 nF, V
= 0.0V, R
= 33k,
CC
BIAS
CS
SD
FMIN
VCO
DIM
MAX
R
MIN
= 56k, V
= 0.0V, C
= 1000pF, T = 25oC unless otherwise specified.
LO,HO
A
TPH
Symbol Definition
Min. Typ.
Max. Units Test Conditions
Floating Supply Characteristics
I
V
V
supply current (low freq.)
supply current (high freq.)
—
—
—
0
—
—
50
V
V
V
= 0V
= 5V
BSFMIN
BS
VCO
VCO
µA
I
30
—
BSFMAX
BS
I
LK
Offset supply leakage current
= V = 600V
B S
Oscillator I/O Characteristics
f
VCO frequency range (IR21592)
(See graph 11)
15
18
22
V
V
=0V, RFMIN=40KΩ
=5V, RFMIN=40KΩ
vco
VCO
V
73
—
—
—
—
95
30
108
—
—
—
—
VCO
kHz
f
VCO frequency range (IR21593)
(See graph 12)
=0V, RFMIN=40KΩ
VCO
=5V, RFMIN=40KΩ
VCO
vco
V
230
50
5
d
Gate drive outputs duty cycle
Fault-mode VCO pin voltage (UVLO,
shutdown, over-current/temp.)
Preheat mode VCO pin discharge current
Dim mode VCO pin discharge current
%
V
V
VCO
= 2.5V
V
VCOFLT
—
—
1.0
—
—
IVCOPH
VCPH=2.5V, VIPH=0.5V
V =2.5V, VCPH=5.5V,
VCO
16.0
IVCODIM
µA
µA
VIPH=0.5V, 1V Pulse at
CS
Amplitude control VCO pin charging current
—
60
—
IVCOPK
V =0V, V =1V,
CPH CS
V =0.5V, V =2.5V
IPH VCO
—
—
—
—
1.8
1.8
1.0
1.0
—
—
—
—
t
LO output deadtime (IR21592)
HO output deadtime (IR21592)
LO output deadtime (IR21593)
HO output deadtime (IR21593)
DTLO
µs
t
t
V
=0V, V
=1.5V,
MIN
DTHO
VCO
V
=0.5V
DTLO
IPH
t
DTHO
Gate Driver Output Characteristics
tr
Turn-on rise time
48.5
120
65
180
145
ns
tf
Turn-off fall time
24.25
4
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IR21592/IR21593
Electrical Characteristics (cont.)
V
= V = V
BS
= 14V +/- 0.25V, V = 0.5V, V = 0.0V, R
= 40k, C
= 10 nF, V
= 0.0V, R
= 33k,
CC
BIAS
CS
SD
FMIN
VCO
DIM
MAX
R
MIN
= 56k, V
= 0.0V, C
= 1000pF, T = 25oC unless otherwise specified.
LO,HO
A
TPH
Symbol Definition
Min.
Typ.
Max. Units Test Conditions
Preheat Characteristics
ICPH
CPH pin charging current
0.8
1.3
2.1
µA
VCPH=VDIM=4.7V,
VCS=1.0V
VCPHIGN
CPH pin ignition mode threshold voltage
4.3
—
5.0
10
5.7
—
VCS=2.0V
VCS=VDIM=VIPH=0V
VCPH=VDIM=4.7V,
V
VCPHCLMP CPH pin clamp voltage
IIPH
IPH pin DC source current
µA
—
25
—
IIPH=1/RFMIN
VCSTHPH
Peak preheat current regulation threshold
V
V
RIPH=27K, VMIN=0V,
—
0.7
—
VCPH=0V, VCSTH =
(IIPH) x (RIPH)
VCPHFLT
CPH pin voltage during UVLO or fault
—
0.0
—
SD = 5V, or CS = 2V,
> TSD
or Tj
Ignition Detection
I
30
IPH source current (Vcs rising)
—
—
—
—
IPHIGN+
VCS=0V, RIPH=18K,
VCPH>5.1V
µA
I
IPH source current (Vcs falling)
27.5
IPHIGN-
VCS =1.0V,
VCPH>5.1V
Protection Characteristics
V
Rising shutdown pin threshold voltage
1.6
2.0
1.6
5.1
150
2.1
7.6
165
2.6
VCPH =VIPH=0V
VCPH < 5V
VCPH=VCS=VSD=0V
SDTH+
V
CSTH
Peak over current threshold
Rising VDC pin threshold voltage
SD threshold hysteresis
1.2
—
—
—
—
—
1.9
—
—
—
—
V
V
VDCTH+
V
mV
V
VCPH =VIPH=0V
VCPH=VCS=VSD=0V
ISD = 100mA
SDHYS
V
VDC threshold hysteresis
VDCHYS
V
SD pin clamp voltage
SDCLMP
—
oC
T
SD
Thermal shutdown junction temperature
Phase Control
VCPH =5.5V,VIPH=0.5V
V
Zero-crossing threshold voltage
—
0.0
—
V
CSTHZX
t
Zero-crossing internal blank time
291
400
1030
ns VCPH =5.5V,VIPH=0.5V
Blank
Dimming Interface
V
DIM pin offset voltage
—
—
—
0.5
1.0
3.0
—
—
—
DIMOFF
V
DIM minimum reference voltage (MIN pin)
DIM maximum reference voltage (MIN pin)
VCPH=5.5V,VIPH=0.5V
VCPH =0.5V,VIPH=0.5V
MINMIN
V
V
MINMAX
Minimum Frequency Setting
V
FMIN
FMIN pin voltage during normal operation
FMIN pin voltage during fault mode
4.6
—
5.1
0.0
6.25
—
V
VMIN=1.5V,VIPH=0.5V
SD = 5V, or CS = 2V,
V
V
FMINFLT
> TSD
or Tj
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IR21592/IR21593
Block Diagram
VCC
60uA
ICT
RFB
2
VCO
V
15uA
14
16
15
VB
HO
VS
1uA
PULSE
FILTER &
LATCH
LEVEL
SHIFT
ERR
1
3
VDC
CPH
DIM
S
R
Q
Q
1.0uA
13
11
VCC
LO
CT
S
Q
Q
T
Q
Q
REF
5.1V
1.0V
R1
R2
10V
R
ICT
15.6V
IDT
+
12
COM
S
R
Q
Q
ICT
5.1V
4
400ns
DELAY
CT
IDIM
FB
5
6
MAX
MIN
10
CS
0.1/R FMIN
Q
Q
S
R
4/RFMIN
IDIM/5
IGN
DET
0.1/R FMIN
OVER-
TEMP
DETECT
3V
S
Q
Q
IFMIN
R
UNDER-
VOLTAGE
DETECT
1/RFMIN
7
8
FMIN
IPH
9
5.1V
SD
5.1V
1
1.6V
2.0V
7.6V
0
Lead Assignments & Definitions
Pin # Symbol
Description
Pin Assignments
1
2
3
VDC
VCO
CPH
DIM
Line input voltage detection
Voltage controlled oscillator Input
Preheat timing input
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDC
VCO
CPH
DIM
HO
VS
4
0.5 to 5VDC dimming control input
Maximum lamp power setting
Minimum lamp power setting
Minimum frequency setting
Peak preheat current reference
MAX
MIN
FMIN
IPH
5
VB
6
7
8
9
VCC
COM
LO
SD
CS
LO
Shutdown input
Current sensing input
Low-side gate driver output
IC power & signal ground
Logic & low-side gate driver supply
High-side gate driver floating supply
MAX
MIN
10
11
12
13
14
15
16
COM
VCC
VB
FMIN
IPH
CS
SD
VS
High voltage floating return
High-side gate driver output
HO
6
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IR21592/IR21593
State Diagram
Power Turned On
UVLO Mode
1/2-Bridge Off
IQCC=200mA
CPH=0V
Oscillator Off
(UV+)
VCC < 10.9V
VCC > 12.5V
and
SD > 2.0V
(VCC Fault or Power Down)
(Lamp Removal)
or
VDC > 5.1V
and
(Bus OK)
or
VDC < 3.0V
VCC < 10.9V
(Power Turned Off)
(dc Bus/ac Line Fault or Power Down)
SD < 1.7V
and
(Lamp OK)
or
SD > 2.0V
T
< 165C
(T
)
J
jmax
(Lamp Fault or Lamp Removal)
T
> 165C
FAULT Mode
J
PREHEAT Mode
(Over-Temperature)
Fault Latch Set
1/2-Bridge Off
IQCC=240µA
CPH=0V
VCC=15.6V
Oscillator Off
1/2-BridgeOscillator On
V
CSPK+VIPH (Peak Current Control)
CPH Charging@IPH+1µA
DIM+Open Circuit
Over-Current Disabled
CPH > 5.1V
CS > V CSTH (1.6V)
(End of PREHEAT Mode)
(Failure to Strike Lamp
or Hard Switching)
or
TJ > 165C
IGNITION Mode
fPH ramps to fMIN
CPH Charging@IPH+1µA
DIM=Open Circuit
(Over-Temperature)
CS > VCSTH (1.6V)
Over-Current Enabled
(Over-Current or Hard Switching)
or
T
> 165C
J
VCS>VIPH(enable ignition detection)
then
(Over-Temperature)
VCS<VIPH(ignition detected)
DIM Mode
PhaseCS=PhaseREF
DIM=CPH
Over-Current Enabled
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IR21592/IR21593
Timing Diagram
Non-strike fault condition with lamp exchange
VCC
15.6V
UVLO+
UVLO-
VDC
VDCTH+
VDCTH-
CPH
5.1V
VDIM
VCO
5V
f
SD
5V
HO
LO
CS
1.6V
VIPH
UVLO
PH
FLT SD
PH
DIM
UVLO
8
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IR21592/IR21593
External Components Selection Procedure
(Note:
BEGIN
Please refer to
"Typical Connection"
diagram, page 1)
Calculate RPULL-UP
VACTURN −ON
RPULL−UP
=
IQCCUV
Calculate RVDC
5.1
Set RVAC and RVDC such that the voltage
on pin VDC will exceed 5.1 volts at the
desired line turn-on voltage.
RVAC
RVDC
VACTURN-ON
VACTURN −ON
=
1−
RVDC
5.1
VACTURN −ON
The minimum operating frequency must
be lower than f100% of fIGN (whichever is
lower). RFMIN also programs IMIN and
Select RFMIN
RFMIN
fMIN
Use Graph 5 or Graph 6
I
IPH, so RFMIN must be set first.
Calculate RCS
RCS sets the maximum ignition current
which corresponds to the maximum
ignition voltage across the lamp.
RCS
VIGN
IIGN
1.6
=
RCS
I
IGNPK
Select & Calculate RIPH
Use Graph 8 to find IIPH
then calculate RIPH
RCS
,
The voltage at pin IPH is the reference
for amplitude current control during
preheat mode. RIPH must be set after
:
RIPH
IPH
VPH
I
PH PK
RFMIN
.
=
RIPH
IIPH
During preheat, an internal 1.3 µA
current source at pin CPH charges
external capacitor CCPH. Preheat mode
ends when VCPH exceeds 5.1 volts.
Calculate CCPH
CCPH 2.6e − 7 tPH
CCPH
tPH
=
(
)
Calculate RMIN
Find IMIN (Graph 7)
RMIN sets the lower phase boundary
corresponding to minimum lamp
power when VDIM = 0 volts. RMIN must
Calculate ϕMIN (Equations 8 & 9)
RMIN
ϕMIN PLAMP
Find VMIN (Graph 9)
be set after RFMIN
.
VMIN
RMIN
=
IMIN
RMAX sets the upper phase boundary
corresponding to maximum lamp power
when VDIM = 5 volts. RMAX must be set
Calculate RMAX
RMAX
ϕMAX PLAMP
Use Equation 15
after RFMIN and RMIN
.
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IR21592/IR21593
Characteristic Curves
200
160
120
80
120
100
VVCO=5V
VVCO=5V
80
60
40
20
0
VVCO=2V
VVCO=0V
VVCO=2V
VVCO=0V
50
40
0
10
20
30
40
RFMIN (K )
60
70
10
20
30
40
RFMIN (K )
50
60
70
Ω
Ω
Graph 2. Frequency vs RFMIN (IR21593)
Graph 1. Frequency vs RFMIN (IR21592)
450
400
350
300
250
200
150
100
50
110
100
90
80
70
60
50
40
30
20
10
10
20
30
40
(K )
50
60
70
10
20
30
40
(K )
50
60
70
R
Ω
R
Ω
FMIN
FMIN
Graph 4. IIPH vs RFMIN (IR21592/IR21593)
Graph 3. IMIN vs RFMIN (IR21592/IR21593)
10
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IR21592/IR21593
0
-15
-30
-45
-60
-75
-90
30
25
20
15
10
5
1
1.25 1.5 1.75
2
2.25 2.5 2.75
3
2
2.2
2.4
2.6
2.8
3
VMIN (V)
VMIN (V)
Graph 5. ϕ II /V I vs V
(IR21592/IR21593)
Graph 6. R vs V
MIN MIN
VS VS
MIN
3
2.5
2
150
140
130
120
110
100
90
1.5
1
0.5
0
-25
0
25
50
75
100
125
-25
0
25
Temperature °C
vs Temperature (IR21592/IR21593)
50
75
100
125
Temperature °C
Graph 7. I
Graph 8. I
vs Temperature (IR21592/IR21593)
CPH
MIN
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IR21592/IR21593
40
36
32
28
24
20
6
5.6
5.2
4.8
4.4
4
-25
0
25
50
75
100
12
-25
0
25
50
75
100
125
Temperature °C
Temperature °C
Graph 9. I vs Temperature
Graph 10. VFMIN vs Temperature
(IR21592/IR21593)
PH
(IR21592/IR21593)
160
100
V
VCO=5V
V
VCO=5V
80
60
40
20
0
120
80
40
0
VVCO=3V
VVCO=3V
V
VCO=0V
VVCO=0V
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature °C
Temperature °C
Graph 11. Frequency vs Temperature (IR21592)
RFMIN=39K
Graph 12. Frequency vs Temperature (IR21593)
RFMIN=39K
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IR21592/IR21593
6
5.6
5.2
4.8
4.4
4
40
36
32
28
24
20
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature °C
Temperature °C
Graph 13. I
vs Temperature (IR21592/
IR21593)
Graph 14. V
vs Temperature (IR21592/
IR21593)
IPH
FMIN
2
1.6
1.2
0.8
0.4
0
3
2.6
2.2
1.8
1.4
1
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature °C
Temperature °C
Graph 15. TDEAD vs Temperature (IR21592)
Graph 16. TDEAD vs Temperature (IR21593)
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IR21592/IR21593
Functional Description
400
350
300
250
200
150
100
50
PH/IGN
20
10
Phase Control
10%
50%
To understand phase control, a simplified model
for the ballast output stage is used (Figure 1). The
lamp and filaments are replaced with resistors,
with the lamp inserted between the filament
resistors (R1, R2, R3 and R4).
0
100%
-10
-20
-30
PH/IGN
10%
0
50%
-50
-100
100%
R1
R2
5
10
15
20
25
30
35
40
45
50
L
Frequency [kHz]
Rlamp
Vin
C
Figure 2, Typical output stage transfer function for
different lamp power levels.
R3
R4
In the time domain (Figure 3), the input current is
shifted -90 degrees from the input half-bridge
voltage during preheat and ignition, and
somewhere between 0 and -90 degrees after
ignition during running. Zero phase-shift
corresponds to maximum power.
Figure 1, Dimming ballast output stage.
During preheat and ignition (Figure 2), the circuit
is a high-Q series LC with a strong input current to
input voltage phase inversion from +90 to -90
degrees at the resonance frequency. For operating
frequencies slightly above resonance and higher,
the phase is fixed at -90 degrees for the duration
of preheat and ignition. During dimming, the circuit
is an L in series with a parallel R and C, with a
weak phase inversion at high lamp power and a
strong phase inversion at low lamp power.
Vin
Iin
ph/ign
Iin
run
0
t
n
run
n
ph/ign
Figure 3, Typical ballast output stage waveforms.
When the phase is calculated and plotted versus
lamp power (Figure 4), the result is a linear dimming
curve, even down to ultra-low light levels where
the resistance of the lamp can change by orders
of magnitude.
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IR21592/IR21593
The start-up capacitor (C1) is charged by current
through resistor (R1) minus the start-up current
drawn by the IC. This resistor is typically chosen
to provide 2X the maximum start-up current at
low line to guarantee start-up under the worst case
condition. Once the capacitor voltage reaches the
start-up threshold, and, the voltage on pin VDC is
above 5.1V (see Brown-out Protection), the IC
turns on and HO and LO begin to oscillate. The
capacitor begins to discharge due to the increase
in IC operating current (Figure 6).
-60.0
-65.0
-70.0
-75.0
-80.0
-85.0
-90.0
VC1
0
5
10
15
20
25
30
C1
INTERNAL
CLAMP VOLTAGE
DISCHARGE
Lamp Power [Watts]
VUVLO+
Figure 4, Lamp power vs. phase of output stage.
VHYST
VUVLO-
DISCHARGE
TIME
Under-voltage Lock-Out (UVLO)
CHARGE PUMP
OUTPUT
The IR21592/IR21593 undervoltage lock-out is
designed to maintain an ultra low quiescent
current of less than 200uA, while guaranteeing
the IC is fully functional before the high and low
side output drivers are activated. Figure 5 shows
an efficient supply voltage using the start-up
current of the IR21592/IR21593 together with a
charge pump from the ballast output stage (R1,
C1, C2, D1 and D2).
R1 & C1 TIME
CONSTANT
t
Figure 6, Start-up capacitor (C1) voltage.
During the discharge cycle, the rectified current
from the charge pump charges the capacitor above
the minimum operating voltage of the device and
the charge pump and internal 15.6V zener clamp
of the IC take over as the supply voltage. The
start-up capacitor and snubber capacitor must be
selected such that worst case IC conditions are
satisfied. A bootstrap diode (D3) and supply
capacitor (C3) comprise the supply voltage for
the high side driver circuitry. To guarantee that
the high-side supply is charged up before the first
pulse on pin HO, the first pulse from the output
drivers comes from the LO pin. During UVLO,
the high and low side driver outputs are low, pin
VCO is pulled-up internally to 5V resetting the
starting frequency to the maximum, and pin CPH
is short-circuited internally to COM resetting the
preheat time.
VBUS(+)
Rectified
AC Line
R3
R1
VDC
HO
Q1
16
15
14
13
12
11
1
Half-Bridge
Output
VS
VB
C3
D3
C2
D1
VCC
C1
COM
LO
Q2
RVDC
CVDC
D2
RCS
VBUS(-)
Figure 5, Typical application of start-up circuitry.
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IR21592/IR21593
Brown-out Protection
VBUS(+)
In addition to the voltage on VCC being above
the start-up threshold, pin VDC must also be
above 5.1V for HO and LO to begin oscillating. A
voltage divider (R3,RVDC) from the rectified AC
line connected to pin VDC measures the rectified
AC line input voltage to the ballast and programs
the turn-on and turn-off line voltages. A filter
capacitor (CVDC) is also connected to pin VDC
that must be chosen such that the ripple is low
enough and the lower turn-off threshold of 3V is
not crossed during normal line conditions. This
detection is necessary due to the possibility of
the lamp extinguishing during low-line conditions
before the IC is properly reset. Should a brown-
out occur, the DC bus can drop to a level below
the minimum required for the tank circuit to
maintain the necessary lamp voltage. This
detection will insure a clean turn-off before the
DC bus drops too low and properly resets the
IC to the preheat mode when the line returns.
60uA
HO
VCO
Q2
16
2
VCO
CVCO
Half
Bridge
Output
1uA
Half
Bridge
Driver
VS
LO
15
11
ILOAD
1uA
CPH
PH
LOGIC
3
7
Q2
CCPH
7.6V
IFMIN
FMIN
RFMIN
5.1V
CS
10
12
RCS
1/RFMIN
COM
IPH
8
IR21592/IR21593
RIPH
Load
Return
VBUS(-)
Figure 7, IR21592/IR21593 preheat circuitry.
An internal 1uA current source slowly discharges
the external capacitor on pin VCO and the voltage
on pin VCO begins to decrease. This decreases
the frequency, which, for operating frequencies
above resonance, increases the load current.
When the peak voltage measured on pin CS,
produced by a portion of the load current flowing
Preheat (PH)
The IR21592/IR21593 enters preheat mode
when VCC exceeds the UVLO+ threshold and
VDC exceeds 5.1V. HO and LO begin to
oscillate at the maximum operating frequency through an external sense resistor (RCS), exceeds
with 50% duty cycle and at the internally set
dead-time of 2us (IR21592) or 1µs (IR21593). Pin
CPH is disconnected from COM and an internal
1uA current source (Figure 7) charges the external
timing capacitor on CPH linearly.
the voltage level on pin IPH, a 60uA internal
current source is connected to pin VCO and the
capacitor charges (Figure 8). This forces the
frequency to increase and the load current to
decrease. When the voltage on pin CS decreases
below the voltge on pin IPH, the 60uA current
source is disconnected and the frequency
decreases again.
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IR21592/IR21593
HO
LO
VS
VBUS(+)
HO
VCO
Q2
16
2
VCO
CVCO
Half
1uA
Bridge
Output
Half
Bridge
Driver
VS
LO
15
11
t
t
ILOAD
VRCS
PH
LOGIC
1uA
CPH
DIM
3
4
VIPH
Q2
CCPH
7.6V
DIM
INTERFACE
0.5 to 5V
RDIM
FAULT
LOGIC
1.6V
CS
10
12
RCS
COM
PHASE
CONTROL
ICVCO
IR21592/IR21593
Load
Return
60uA
VBUS(-)
t
t
-1uA
Figure 9, IR21592/IR21593 ignition circuitry.
VCVCO
The ignition ramp is then initiated as the
capacitor on pin VCO discharges linearly
through an internal 1uA current source. The
frequency decreases linearly towards the
resonance frequency of the high-Q ballast output
stage, causing the lamp voltage and load current
to increase (Figure 10). The frequency
continues to decrease until the lamp ignites or
the current limit of the IR21592/IR21593 is
reached. If the current limit is reached, the
IR21592/IR21593 enters FAULT mode. The 1.6V
threshold together with the external current
sensing resistor on pin CS determine the
maximum allowable peak ignition current (and
therefore peak ignition voltage) of the ballast
output stage. The peak ignition current must not
exceed the maximum allowable current ratings
of the output stage MOSFETs or IGBTs, and,
the resonant inductor must not saturate at
any time.
Figure 8, Peak load current regulation timing diagram.
This feedback keeps the peak preheat current
regulated to the user-programmable setting on pin
IPH for the duration of the preheat time. An
internal current source connected to an external
resistor on pin IPH sets a voltage reference for
the peak pre-heat current. The pre-heat time
continues until the voltage on pin CPH exceeds
5V.
Ignition (IGN)
The IR21592/IR21593 enters ignition mode when
the voltage on pin CPH exceeds 5V. The peak
current regulation reference voltage is
disconnected from the user-programmable
setting on pin IPH and is connected to a higher
internal threshold of 1.6V (Figure 9).
To prevent a "flash" across the lamp during
ignition at low dim settings, an ignition detection
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IR21592/IR21593
load current is regulated against the user control
input on pin DIM. To control the rate at which the
dim setting changes from maximum brightness
to the user setting (IGN-TO-DIM time, Figure 11),
circuit measures the voltage at the CS pin and
compares it against the voltage at the IPH pin.
During the rising ignition ramp, the voltage at
the IPH pin is increased to 20% above its value
VCPH
CS
5.1V
VIPH+ 20%
RDIM & CTPH
TIME CONSTANT
VIPH+ 10%
VIPH
VDIM
t
VVCO
IGN-TO-DIM
TIME
t
PH
IGN
DIM
PH
DIM
IGN
Figure 10, IR21592/IR21593 ignition detection.
Figure 11, IR21592/IR21593 ignition timing diagram.
pin DIM is connected internally to pin CPH when
the IR21592/IR21593 enters DIM mode. The
resistor on pin DIM (RDIM) discharges the
capacitor on pin CPH down to the user dim
setting. The resistor can be selected for a fast
time constant to minimize the amount of flash
visible over the lamp just after ignition, or, a
long time constant such that the brightness
ramps down smoothly to the user setting. Should
the ignition-to-dim time be too fast, however, the
loop can respond faster than the ionization
constant of the lamp (milliseconds) causing the
VCO to over-shoot. This can result in a
frequency that is higher than the minimum
brightness frequency and can extinguish the
lamp. The capacitor on pin CPH serves multiple
functions by setting the preheat time, the travel
rate just after ignition (together with resistor
RDIM), and, serving as a filter capacitor on pin
during preheat mode. When the voltage on the
CS pin exceeds this voltage, the voltage on the
IPH pin is decreased to VIPH Pre-Heat +10% and
the ignition detection circuit is then active (See
Figure 10). When the lamp ignites, the voltage on
the CS pin will then fall below the voltage on the
IPH pin and the IC enters DIM Mode and the phase
control loop is closed. In order for the ignition
detection circuit to function properly and for the IC
to enter DIM mode, the voltage on the CS pin must
first rise above VIPH Pre-Heat + 20% during the
ignition ramp to activate the circuit, and then
decreasebelowVIPHPre-Heat+10%whenthelamp
ignites.
Ignition-to-Dim (IGN-to-DIM)
When the IR21592/IR21593 enters dim mode, the
phase control loop is closed and the phase of the
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IR21592/IR21593
DIM during dimming to increase high-frequency
noise immunity and minimize component count.
VCS
Dimming (DIM)
t
To regulate lamp power, the error between the
reference phase and the phase of the output stage
current forces the VCO to steer the frequency in
the proper direction, as determined by the transfer
function of the output stage, such that the error is
forced to zero. An internal 15uA current source is
connected to pin VCO during dimming mode
(Figure 12) to discharge the VCO capacitor and
decrease the frequency towards lock.
LO
ν
REF
ν FB
ν
ERR
VVCO
VBUS(+)
IR2159
VCC
t
RFB
HO
VCO
Q2
16
2
VCO
Figure 13, Phase control timing diagram.
Half
16uA
Bridge
Output
CVCO
Half
Bridge
Driver
VS
LO
15
11
ILOAD
The IR21592/IR21593 includes a dimming
interface for analog lamp power control. The
DIM pin input requires a voltage in the range of
0.5 to 5VDC, with 5V corresponding to minimum
phase shift (maximum lamp power). The output
of the dim interface is the voltage on pin MIN,
which is compared with the internal timing
capacitor (CT) voltage to produce a frequency-
independent digital reference phase (Figure 14).
CPH
3
4
DIM
INTERFACE
Q2
CCPH
7.6V
DIM
0.5 to 5V
RDIM
FAULT
LOGIC
1.6V
MAX
CS
5
6
10
12
RMAX
RMIN
MIN
RCS
PHASE
CONTROL
COM
Load
Return
VBUS(-)
Figure 12, IR21592/IR21593 dimming circuitry.
Once lock is achieved, the phase detector (PDET)
outputs short pulses to an open-drain PMOS that
charges the VCO capacitor through an internal
resistor (RFB) each time an error pulse occurs
(Figure 13). This action "nudges" the integrator at
the input of the VCO to keep the phase of the
output stage current exactly locked in phase with
the reference.
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IR21592/IR21593
detection comparator for 400ns after LO goes 'high'
(Figure 16).
VMIN
5V
VCT
RMIN
VBUS(+)
RMAX
3V
IR2159
HO
Q2
16
1V
DIM
RANGE
Half
0
Bridge
Output
USER
SETTING
Half
Bridge
Driver
0.5V
5V
LO
VS
LO
15
11
VDIM
ILOAD
ν
Q2
REF
Ε
0
Ε
-90
Ε
-180
ν
FAULT
LOGIC
1.6V
CS
R1
10
12
RCS
Figure 14, Dimming interface
PHASE
CONTROL
400ns
BLANK
COM
The charging time of CT from 1V to 5.1V
determines the on-time of output gate drivers HO
and LO and corresponds to -180 degrees of
possible phase shift in load current (minus
deadtime). For the 0 to -90 degree dim range, the
voltage on pin MIN is bounded between 1V and
3V using pins MIN and MAX. An external resistor
on pin MAX programs the minimum phase shift
reference (maximum lamp power) corresponding
to 5V on pin DIM, and an external resistor on pin
MIN sets the maximum phase shift (minimum
lamp power) corresponding to 0.5V on pin DIM.
Load
Return
VBUS(-)
Figure 15, Current sensing circuitry.
The internal blank time reduces the dimming range
slightly (Figure 16) when operating at minimum
phase shift (maximum lamp power). The external
programming resistor on pin MAX must be
selected such that the minimum phase shift is
set a safe margin away from the blank time. A
series resistor (R1) is required to limit the amount
of current flowing out of pin CS when the voltage
across RCS goes below -0.7V. A filter capacitor
at pin CS may be required due to other possible
asynchronous noise sources present in the ballast
system.
Current Sensing
During dimming, the current sensing circuitry
(Figure 15) detects over-current which can occur
during hard-switching (see Fault section), and
zero-crossing to measure the phase of the total
load current. To reject any switching noise which
can occur at the turn-on of the low-side MOSFET
or IGBT, a digital current sense blanking circuit
blanks out the signal from the zero-crossing
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IR21592/IR21593
Should the peak voltage on pin CS exceed 1.6V
at any time during dimming, the IR21592/IR21593
enters FAULT mode and the high and low-side
driver outputs, HO and LO, are both turned off.
Cycling the supply voltage on VCC below UVLO-
or the voltage on pin SD above and below SD+
and SD- will reset the IR21592/IR21593 to preheat
(PH) mode (see STATE DIAGRAM).
VCS
Switching
Noise
t
LO
ϑ
BLANK
Ballast Design
Dimming
Range
Lamp Requirements
Figure 16, Current sense timing diagram.
Before selecting component values for the ballast
output stage and the programmable inputs of
the IR21592/IR21593, the following lamp
requirements must first be defined:
Fault Mode (FAULT)
During dimming, the peak current regulation circuit
active during preheat and ignition is disabled.
Should non-zero voltage switching at the output
of the half-bridge occur (Figure 17), high current
spikes will result. A lamp filament failure, lamp
end-of-life, lamp removal, or a deadtime shorter
than what is required for commutation, can all
cause hard-switching.
Variable
Description
Filament pre-heat current
Units
Arms
I ph
Filament pre-heat time
s
tph
Maximum lamp pre-heat voltage
Lamp ignition voltage
Vpp
Vpp
Vph
max
V
ign
Lamp power at 100% brightness
Lamp voltage at 100% brightness
W
LOAD
REMOVAL
P
100%
Vpp
HO
V
100%
LO
VS
Lamp power at 1% brightness
Lamp voltage at 1% brightness
W
P
1%
Vpp
V
1%
t
Minimum cathode heating current
Arms
VCS
ICath
min
1.6V
t
Table I, Typical lamp requirements
NORMAL
OPERATION
HARD
SWITCHING
FAULT
Figure 17, hard-switching with latch off
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IR21592/IR21593
Ballast Output Stage
The operating frequency [Hz] at maximum lamp
power is given as:
The components comprising the output stage are
selected using a set of equations. Different ballast
operating frequencies and their respective
voltages and currents are calculated.
The inductor and capacitor values are obtained
using equations (2) through (7). The results of
these equations reveal the location of each
operating frequency and the corresponding
voltages and currents. For a given L, C, DC bus
voltage, and pre-heat current, the resulting voltage
over the lamp during pre-heat is given as:
2
4VDC
1−
2
1
1
32P2
1
32P2
100%
V
100%π
(6)
100%
f100%
=
−
+
−
−
2
2π LC C2V4
LC C2V4
LC2
100%
100%
The cathode heating current at minimum lamp
power is given as:
V1% f1%πC
ICath
=
(7)
1%
2
1
2
2
Design Constraints
2VDC
2VDC
8L
I p2h
−
(2)
Vph =
+
π
C
π
The inductor and capacitor values should be
iterated until the following design constraints have
been fulfilled (Table II).
The resulting operating frequency during pre-heat
is given as:
Design Constraint
Reason
Ignition during pre-
heat
Production tolerances
V
< V
phmax
ph
2Iph
fph =
[Hz] (3)
f
− f > 5kHz
ign
ph
πCVph
Iign < Iign
Inductor saturation
max
Lamp extinguishing
during dimming
ICath ≥ ICath
1%
min
The resulting operating frequency during ignition
is given as:
Table II, Ballast design constraints
π4 VDC
1+
IR21592/IR21593 Programmable Inputs
Vign
LC
1
[Hz] (4)
fign
=
2π
In order to program the MIN and MAX settings of
the dimming interface, the phase of the output
stage current at minimum and maximum lamp
power must be calculated. This is obtained using
the following equations:
The total load current during ignition is given as:
I
= f CV 2π
ign ign
[App] (5)
ign
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IR21592/IR21593
2
4VDC
V%π
LC2
1−
2
1
1
32P2
1
32P2
%
%
(8)
(9)
f% =
−
+
−
−
2
2π LC C2V%4
LC C2V%4
180
ϕ% = tan [( C− % L)2πf% −4 % LCπ f%]
2P
V%2
V2
2P
V2
−1
2 3 3
%
π
P
%
%
With the lamp requirements defined, the L and C
of the ballast output stage selected, and the
minimum and maximum phase calculated, the
component values for setting the programmable
inputs of the IR21592/IR21593 are obtained with
the following equations:
(25e − 6) − ( fMIN −10000) (1e −10)
RFMIN
=
( fMIN −10000) (2e −14)
[Ohms]
(10)
(11)
2 (1.6)
RCS
=
[Ohms]
[Ohms]
Iign
(12)
(13)
RIPH = RFMIN RCS Iph
2
[Farads]
[Ohms]
CCPH = (2.6E − 7)(tPH )
RFMIN
ϕ1%
(14)
RMIN
=
=
1−
4
45
0.86 RFMIN RMIN
RMAX
ϕ100%
4 RMIN − RFMIN 1−
45
[Ohms]
(15)
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IR21592/IR21593
This ballast design procedure has been summarized into the following 3 steps:
Define
Lamp
Requirements
Iterate L and C
to fulfill
constraints
Calculate
IR21592/IR21593
Programmable
Inputs
Figure 19, Simplified Ballast Design Procedure
Case outline
01-6015
01-3065 00 (MS-001A)
16 Lead PDIP
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IR21592/IR21593
01-6018
01-3064 00 (MS-012AC)
16 -Lead SOIC (narrow body)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice.
This product has been designed and qualfied for the industrial market.
11/13/2003
www.irf.com
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