IR2159PBF [INFINEON]
Fluorescent Light Controller, 0.5A, 95kHz Switching Freq-Max, PDIP16, PLASTIC, MS-001A, DIP-16;
| 型号： | IR2159PBF |
| 厂家： | 
Infineon |
| 描述： | Fluorescent Light Controller, 0.5A, 95kHz Switching Freq-Max, PDIP16, PLASTIC, MS-001A, DIP-16 光电二极管 |
| 文件： | 总25页 (文件大小：260K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Data Sheet No. PD60169-E
( )
( )
S
S
IR2159
IR21591
DIMMING BALLAST CONTROL IC
Features
Brown-out protection
Automatic restart
Micro-power startup
Zener clampedVcc
Over-temperature protection
16-pin DIP and SOIC package types
•
Ballast control and half-bridge driver in one IC
•
•
Transformer-less lamp power sensing
Closed-loop lamp power control
Closed-loop preheat current control
Programmable preheat time
Programmable preheat current
Programmable ignition-to-dim time
0.5 to 5VDC dimming control input
Min and max lamp power adjustments
•
•
•
•
•
•
•
•
•
•
Parameter
Deadtime
Frequency
Range
IR2159
1.8us
See
IR21591
1.0us
See
•
•
Programmable minimum frequency
Internal current sense blanking
•
•
Graph 3
Graph 4
Full lamp fault protection
•
Packages
Description
Description:The IR2159/IR21591 are complete dimming ballast controllers and 600V
half-bridge drivers all in one IC.The architecture includes phase control for trans-
former-less lamp power sensing and regulation which minimizes changes needed to
adapt non-dimming ballasts for dimming. Externally programmable features such as
preheat time and current, ignition-to-dim time, and a complete dimming interface with
minimum and maximum settings provide a high degree of flexibility for the ballast
design engineer. Protection from failure of a lamp to strike, filament failures, thermal
overload, or lamp failure during normal operation, as well as an automatic restart
function, have been included in the design. The heart of this control IC is a voltage-
controlled oscillator with externally programmable minimum frequency.The IR2159/
IR21591 are available in both 16 pin DIP and 16 pin narrow body SOIC packages.
16 Lead SOIC
(narrow body)
16 Lead PDIP
Typical Connection
+ Rectified AC Line
Single Lamp Dimmable
+ DC Bus
RVAC
RPULL-UP
RVDC
CVDC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDC
VCO
CPH
DIM
HO
VS
CVCO
CPH
VB
RDIM
RMAX
RMIN
RFMIN
RIPH
VCC
COM
LO
0.5 to 5VDC
MAX
MIN
FMIN
IPH
CS
SD
RCS
- DC Bus
www.irf.com
1
( )
S
IR2159/IR21591
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol Definition
Min.
Max.
Units
V
High side floating supply voltage
High side floating supply offset voltage
High side floating output voltage
Low side output voltage
-0.3
625
B
S
V
V
- 25
V
+ 25
B
S
B
B
V
V
HO
V
- 0.3
V
+ 0.3
V
LO
-0.3
V
+ 0.3
CC
I
Maximum allowable output current (either output)
due to external power transistor miller effect
Voltage controlled oscillator input voltage
CPH current
-500
500
OMAX
mA
V
-0.3
-5
6.0
5
V
VCO
I
mA
CPH
V
IPH voltage
-0.3
-0.3
-0.3
-0.3
-0.3
-5
5.5
5.5
5.5
5.5
5.5
5
IPH
V
DIM
Dimming control pin input voltage
Maximum lamp power setting pin input voltage
Minimum lamp power setting pin input voltage
Current sense input voltage
V
MAX
V
V
MIN
V
CS
I
Shutdown pin current
SD
mA
I
Supply current (note 1)
—
25
CC
dV/dt
Allowable offset voltage slew rate
-50
—
50
V/ns
P
Package power dissipation @ T ≤ +25°C
(16 pin DIP)
(16 pin SOIC)
(16 pin DIP)
1.60
1.25
75
D
A
W
P
D
= (T
-T )/Rth
A JA
—
JMAX
Rth
Thermal resistance, junction to ambient
—
JA
oC/W
(16 pin SOIC)
—
115
150
150
300
T
Junction temperature
-55
-55
—
J
T
S
Storage temperature
oC
T
Lead temperature (soldering, 10 seconds)
L
Note 1:
This IC contains a zener clamp structure between the chip V
and COM which has a nominal breakdown
CC
voltage of 15.6V (V
). Please note that this supply pin should not be driven by a DC, low impedance
CLAMP
power source greater than the diode clamp voltage (V
section.
) as specified in the Electrical Characteristics
CLAMP
2
www.irf.com
( )
S
IR2159/IR21591
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
Definition
Min.
Max.
Units
V
High side floating supply voltage
Steady state high side floating supply offset voltage
Supply voltage
V
- 0.7
V
BS
CC
CLAMP
600
V
V
-1
S
V
V
V
CC
CCUV+
CLAMP (15.6)
I
Supply current
note 2
10
mA
V
CC
V
0
0
5
5
VCO
VCO pin voltage
DIM pin voltage
V
V
DIM
MAX pin current (note 3)
MIN pin voltage
-750
1
0
MAX
µA
V
V
3
MIN
R
Minimum frequency setting resistance
Shutdown pin current
10
-1
100
1
FMIN
kΩ
I
SD
CS
mA
I
Current sensing pin current
Junction temperature
-1
1
T
-40
125
oC
J
Note 2: Enough current should be supplied into the VCC lead to keep the internal 15.6V zener clamp diode on this lead
regulating its voltage, V
.
CLAMP
Note 3: The MAX lead is a voltage-controlled current source. For optimum dim interface current mirror performance,
this current should be kept between 0 and 750µA.
Electrical Characteristics
V
CC
R
= V = V
BS
= 14V +/- 0.25V, V = 0.5V, V = 0.0V, R
= 40k, C
= 10 nF, V
= 0.0V, R
= 33k,
BIAS
CPH
CS
SD
FMIN
VCO
DIM
MAX
= 56k, V
= 0.0V, C
= 1000pF, T = 25oC unless otherwise specified.
LO,HO
A
MIN
Symbol Definition
Min. Typ.
Max.
Units Test Conditions
Supply Characteristics
V
V
supply undervoltage positive going
CC
12.0
12.5
13.0
CCUV+
V
threshold
supply undervoltage lockout hysteresis 1.5
V
V
1.6
200
240
1.7
—
—
CCHYS
QCCUV
QCCFLT
CC
I
I
UVLO mode quiescent current
Fault-mode quiescent current
—
—
V
CC
= 10V
µA
SD=5V, CS=2V, or
Tj > TSD
I
I
V
V
V
V
supply current @ FMIN (IR2159)
supply current @ FMAX (IR2159)
supply current @ FMIN (IR21591)
supply current @ FMAX (IR21591)
—
—
—
—
5.6
6.6
5.4
6.8
—
—
—
—
V
V
V
V
= 0V
= 5V
= 0V
= 5V
QCCFMIN
CC
CC
CC
CC
VCO
VCO
VCO
VCO
mA
V
QCCFMAX
I
I
QCCFMIN
QCCFMAX
V
V
zener shunt clamp voltage
14.5
15.6
16.5
I
= 10mA
CLAMP
CC
CC
www.irf.com
3
( )
S
IR2159/IR21591
Electrical Characteristics (cont.)
V
CC
= V = V
BS
= 14V +/- 0.25V, V = 0.5V, V = 0.0V, R
= 40k, C
= 10 nF, V
= 0.0V, R
= 33k,
BIAS
CS
SD
FMIN
VCO
DIM
MAX
R
MIN
= 56k, V
= 0.0V, C
= 1000pF, T = 25oC unless otherwise specified.
LO,HO
A
TPH
Symbol Definition
Min. Typ.
Max. Units Test Conditions
Floating Supply Characteristics
I
I
Quiescent V supply current
BS
Quiescent V supply current
BS
—
—
—
0
—
—
5
V
V
= V
= V
QBS0
QBS1
HO
S
µA
30
4
HO
B
V
Minimum requiredVBS voltage for proper
HO functionality
V
BSMIN
µA
I
Offset supply leakage current
—
—
50
V = V = 600V
B S
LK
Oscillator I/O Characteristics
f
VCO frequency range (IR2159)
(See graph 3)
—
—
—
—
—
—
25
—
—
—
—
—
V
V
=0V, RFMIN=39KΩ
=5V, RFMIN=10KΩ
=0V, RFMIN=68KΩ
=5V, RFMIN=10KΩ
vco
VCO
95
30
VCO
VCO
kHz
f
VCO frequency range (IR21591)
(See graph 4)
V
vco
V
VCO
230
50
5
d
Gate drive outputs duty cycle
Fault-modeVCO pin voltage (UVLO,
shutdown, over-current/temp.)
Preheat modeVCO pin discharge current
%
V
V
= 0V
VCO
V
VCOFLT
—
—
—
—
IVCOPH
1.0
16.0
VCPH < 5V
µA
IVCODIM Dim modeVCO pin discharge current
Amplitude control VCO pin charging current
LO output deadtime (IR2159)
—
—
—
—
—
60.0
—
—
—
—
—
>
V
CS IPH
IVCOPK
µA
µs
V
CPH
< 5V, V
1.8
1.8
1.0
1.0
t
t
t
t
DTLO
DTHO
DTLO
DTHO
HO output deadtime (IR2159)
LO output deadtime (IR21591)
HO output deadtime (IR21591)
Gate Driver Output Characteristics
VOL
VOH
tr
Low-level output voltage
High-level output voltage
Turn-on rise time
—
—
—
—
—
—
—
—
100
100
150
mV
ns
V
- Vo
BIAS
tf
Turn-off fall time
100
4
www.irf.com
( )
S
IR2159/IR21591
Electrical Characteristics (cont.)
V
CC
= V = V
BS
= 14V +/- 0.25V, V = 0.5V, V = 0.0V, R
= 40k, C
= 10 nF, V
= 0.0V, R
= 33k,
BIAS
CS
SD
FMIN
VCO
DIM
MAX
R
MIN
= 56k, V
= 0.0V, C
= 1000pF, T = 25oC unless otherwise specified.
LO,HO
A
TPH
Symbol Definition
Min.
Typ.
Max. Units Test Conditions
Preheat Characteristics
—
—
—
—
—
—
—
—
—
—
—
—
ICPH
CPH pin charging current
1.3
5.0
10
µA
VCPHIGN CPH pin ignition mode threshold voltage
VCPHCLMP CPH pin clamp voltage
V
IIPH
IPH pin DC source current
25.0
µA
IIPH = 1/RFMIN
VCSTH
VCPHFLT
Peak preheat current regulation threshold
CPH pin voltage during UVLO or fault
0.7
0.0
V
VCSTH =(IIPH) x (RIPH)
V
SD = 5V, or CS = 2V,
> TSD
or Tj
Ignition Characteristics
V
Peak over current threshold
—
1.6
—
V
VCPH < 5V
CSTH
Protection Characteristics
V
Rising shutdown pin threshold voltage
—
—
—
—
—
—
—
2.0
5.1
150
2.1
7.6
1.6
165
—
—
—
—
—
—
—
SDTH+
V
V
V
V
V
V
T
Rising VDC pin threshold voltage
SD threshold hysteresis
VDCTH+
SDHYS
VDCHYS
SDCLMP
CSTH
mV
VDC threshold hysteresis
V
SD pin clamp voltage
Peak over-current latch threshold voltage
Thermal shutdown junction temperature
ISD = 100mA
>
5.1V
V
CPH
oC
SD
Phase Control
V
R
Zero-crossing threshold voltage
Phase control FB resistor (Internal)
Zero-crossing internal blank time
—
—
—
0.0
5.7
—
—
—
V
kΩ
ns
CSTHZX
FB
t
400
Blank
Dimming Interface
V
DIM pin offset voltage
DIM pin input voltage range
—
0.0
—
—
—
—
0.5
—
—
DIMOFF
V
V
V
V
V
5.0
—
—
—
—
DIM
V
= 5V
= 0V
DIM minimum reference voltage (MIN pin)
DIM maximum reference voltage (MIN pin)
DIM modeVCOThreshold (IR2159)
DIM mode VCOThreshold (IR21591)
1.0
3.0
0.5
1.1
MINMIN
MINMAX
DIMTH
DIMTH
DIM
V
V
DIM
Minimum Frequency Setting
V
V
FMIN pin voltage during normal operation
FMIN pin voltage during fault mode
—
—
5.1
0.0
—
—
V
V
FMIN
FMINFLT
SD = 5V, or CS = 2V,
> TSD
or Tj
www.irf.com
5
( )
S
IR2159/IR21591
Block Diagram
VCC
60uA
ICT
VDIMTH
RFB
2
VCO
15uA
14 VB
16 HO
15 VS
1uA
PULSE
FILTER &
LATCH
LEVEL
SHIFT
10 CYCLES
IGNITION
COUNTER
ERR
VDC
CPH
DIM
1
3
S
R
Q
Q
1.3uA
13
VCC
CT
T
S
Q
Q
Q
Q
REF
5.1V
1.0V
11 LO
R1
R2
10V
R
ICT
15.6V
12 COM
S
R
Q
IDT+ICT
5.1V
4
400ns
DELAY
CT
Q
IDIM
FB
5
6
MAX
MIN
10 CS
4/RFMIN
Q
Q
S
R
I
DIM/5
3V
S
R
Q
Q
OVER-
TEMP
DETECT
IFMIN
UNDER-
VOLTAGE
DETECT
9
SD
FMIN
IPH
7
8
2.0V
5.1V
7.6V
5.1V
1
0
1/RFMIN
1.6V
Lead Assignments & Definitions
Pin # Symbol
Description
Pin Assignments
1
2
3
4
VDC
VCO
CPH
DIM
Line input voltage detection
Voltage controlled oscillator Input
Preheat timing input
0.5 to 5VDC dimming control input
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDC
VCO
CPH
DIM
HO
VS
MAX
5
6
7
Maximum lamp power setting
Minimum lamp power setting
Minimum frequency setting
Peak preheat current reference
VB
MIN
FMIN
IPH
VCC
COM
LO
8
9
SD
CS
Shutdown input
Current sensing input
MAX
MIN
10
11
12
13
14
15
LO
Low-side gate driver output
IC power & signal ground
Logic & low-side gate driver supply
High-side gate driver floating supply
COM
VCC
VB
FMIN
IPH
CS
SD
VS
High voltage floating return
High-side gate driver output
16
HO
6
www.irf.com
( )
S
IR2159/IR21591
State Diagram
Power Turned On
UVLO Mode
1/2-Bridge Off
IQCC=200mA
CPH=0V
Oscillator Off
(UV+)
VCC < 10.9V
VCC > 12.5V
and
SD > 2.0V
(VCC Fault or Power Down)
(Lamp Removal)
or
VDC > 5.1V (Bus OK)
or
and
SD < 1.7V
and
VDC < 3.0V
VCC < 10.9V
(Power Turned Off)
(dc Bus/ac Line Fault or Power Down)
(Lamp OK)
(T
or
T
< 165C
)
SD > 2.0V
jmax
J
(Lamp Fault or Lamp Removal)
T
> 165C
FAULT Mode
Fault Latch Set
1/2-Bridge Off
J
PREHEAT Mode
(Over-Temperature)
1/2-BridgeOscillator On
VCSPK+VIPH (Peak Current Control)
IQCC=240 A
µ
CPH Charging@IPH+1 A
µ
CPH=0V
VCC=15.6V
Oscillator Off
DIM+Open Circuit
Over-Current Disabled
CPH > 5.1V
CS > V CSTH (1.6V)
(End of PREHEAT Mode)
(Failure to Strike Lamp
or Hard Switching)
or
TJ > 165C
IGNITION Mode
fPH ramps to fMIN
CPH Charging@IPH+1µA
DIM=Open Circuit
(Over-Temperature)
Over-Current Enabled
VCO < V
DIMTH
CS > VCSTH (1.6V)
(Over-Current or Hard Switching)
(End of IGNITION Mode)
or
T
> 165C
J
(Over-Temperature)
DIM Mode
PhaseCS=PhaseREF
DIM=CPH
Over-Current Enabled
www.irf.com
7
( )
S
IR2159/IR21591
Timing Diagram
Non-strike fault condition with lamp exchange
VCC
15.6V
UVLO+
UVLO-
VDC
VDCTH+
VDCTH-
CPH
5.1V
VDIM
VCO
5V
f
SD
5V
HO
LO
CS
1.6V
VIPH
UVLO
PH
FLT SD
PH
DIM
UVLO
8
www.irf.com
( )
S
IR2159/IR21591
External Components Selection Procedure
(Note:
BEGIN
Please refer to
"Typical Connection"
diagram, page 1)
Calculate RPULL-UP
VACTURN
−
ON
RPULL
=
−
UP
IQCCUV
Calculate RVDC
5.1
Set RVAC and RVDC such that the voltage
on pin VDC will exceed 5.1 volts at the
desired line turn-on voltage.
RVAC
RVDC
VACTURN-ON
VACTURN
−
−
ON
ON
=
1−
RVDC
5.1
VACTURN
The minimun operating frequency must
be lower than f100% of fIGN (whichever is
lower). RFMIN also programs IMIN and
Select RFMIN
RFMIN
fMIN
Use Graph 5 or Graph 6
IIPH, so RFMIN must be set first.
Calculate RCS
RCS sets the maximum ignition current
which corresponds to the maximum
ignition voltage across the lamp.
RCS
VIGN
IIGN
1.6
=
RCS
I
IGNPK
Select & Calculate R IPH
Use Graph 8 to find I
,
The voltage at pin IPH is the reference
for amplitude current control during
preheat mode. RIPH must be set after
IPH
then calculate R IPH
:
RIPH
IPH
VPH
I
PH PK
RCS
RFMIN
.
=
RIPH
IIPH
µ
During preheat, an internal 1.3
A
Calculate CCPH
2.6e − 7
CCPH tPH
current source at pin CPH charges
external capacitor CCPH. Preheat mode
ends when VCPH exceeds 5.1 volts.
CCPH
tPH
(
)
=
Calculate RMIN
Find IMIN (Graph 7)
RMIN sets the lower phase boundary
corresponding to minimum lamp
power when VDIM = 0 volts. RMIN must
Calculate ϕMIN (Equations 8 & 9)
Find VMIN (Graph 9)
VMIN
RMIN
ϕMIN PLAMP
be set after RFMIN
.
RMIN
=
IMIN
RMAX sets the upper phase boundary
corresponding to maximum lamp power
when VDIM = 5 volts. RMAX must be set
Calculate RMAX
RMAX
ϕMAX PLAMP
Use Equation 15
after RFMIN and RMIN
.
www.irf.com
9
( )
S
IR2159/IR21591
Characteristic Curves
230
190
150
110
70
125
105
85
65
45
25
RFMIN=10K
RFMIN=16K
RFMIN=20K
RFMIN=27K
RFMIN=39K
RFMIN=68K
30
0
1
2
3
4
5
0
1
2
3
4
5
VVCO (V)
Graph 1.Frequency vs VVCO (IR2159)
Graph 2.Frequency vsVVCO (IR21591)
230
190
150
110
70
125
105
85
V
=5V
VCO
V
=5V
VCO
65
V
VCO
=1.1V
V
V
=0.5V
VCO
45
V
VCO
=0V
=0V
VCO
25
30
10
14
18
22
RFMIN
26
30
34
38
10
20
30
RFMIN
40
K
Ω
50
60
70
K
Ω
Graph 3.Frequency vs RFMIN (IR2159)
Graph 4.Frequency vs RFMIN (IR21591)
10
www.irf.com
( )
S
IR2159/IR21591
90
85
80
75
70
65
60
55
50
45
40
35
170
160
150
140
130
120
110
100
90
V =1.1V
VCO
V =0.5V
VCO
80
10
14
18
22
26
30
34
38
10
14
18
22
26
30
34
38
RFMIN
K
Ω
RFMIN
K
Ω
Graph 5. Frequency vs RFMIN (IR2159)
Graph 6.Frequency vs RFMIN (IR21591)
110
100
90
80
70
60
50
40
30
20
10
450
400
350
300
250
200
150
100
50
10
20
30
40
50
60
70
10
20
30
40
50
60
70
RFMIN (K
)
Ω
RFMIN (K
)
Ω
Graph 7. IMIN vs RFMIN (IR2159/IR21591)
Graph 8. IIPH vs RFMIN (IR2159/IR21591)
www.irf.com
11
( )
S
IR2159/IR21591
0
-15
-30
-45
-60
-75
-90
30
25
20
15
10
5
1
1.25 1.5 1.75
2
2.25 2.5 2.75
3
2
2.2
2.4
2.6
2.8
3
VMIN (V)
VMIN (V)
Graph 9. ϕ II /V I vs V
(IR2159/IR21591)
Graph 10. R
vs V
MIN MIN
VS VS
MIN
150
140
130
120
110
100
90
3
2.5
2
1.5
1
0.5
0
-25
0
25
Temperature °C
vs Temperature (IR2159/IR21591)
50
75
100
125
-25
0
25
Temperature °C
vsTemperature (IR2159/IR21591)
50
75
100
125
Graph 11.I
Graph 12.I
MIN
CPH
12
www.irf.com
( )
S
IR2159/IR21591
6
5.6
5.2
4.8
4.4
4
40
36
32
28
24
20
-25
0
25
Temperature °C
vsTemperature (IR2159/IR21591)
50
75
100
125
-25
0
25
50
75
100
125
Temperature °C
Graph 13.I
Graph 14.V
vsTemperature (IR2159/IR21591)
IPH
FMIN
55
50
45
40
35
30
25
110
105
100
95
90
85
80
75
70
65
60
55
IR21591
IR21591
IR2159
IR2159
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature °C
Temperature °C
Graph 15.Frequency vs Temperature
= 0V (IR2159/IR21591)
Graph 16.Frequency vs Temperature
= 2V (IR2159/IR21591)
V
V
VCO
VCO
www.irf.com
13
( )
S
IR2159/IR21591
3
2.5
2
IR2159
1.5
1
IR21591
0.5
0
-25
0
25
50
75
100
125
Temperature °C
Graph 17.DeadTime vsTemperature
(IR2159/IR21591)
14
www.irf.com
( )
S
IR2159/IR21591
Functional Description
400
PH/IGN
20
10
350
Phase Control
10%
300
250
50%
To understand phase control, a simplified model
for the ballast output stage is used (Figure 1). The
lamp and filaments are replaced with resistors,
with the lamp inserted between the filament
resistors (R1, R2, R3 and R4).
200
0
100%
150
100
50
-10
-20
-30
PH/IGN
10%
50%
0
-50
-100
100%
R1
R2
5
10
15
20
25
30
35
40
45
50
L
Frequency [kHz]
Rlamp
Vin
C
Figure 2, Typical output stage transfer function for
different lamp power levels.
R3
R4
In the time domain (Figure 3), the input current is
shifted -90 degrees from the input half-bridge
voltage during preheat and ignition, and
somewhere between 0 and -90 degrees after
ignition during running. Zero phase-shift
corresponds to maximum power
Figure 1, Dimming ballast output stage.
During preheat and ignition (Figure 2), the circuit
is a high-Q series LC with a strong input current to
input voltage phase inversion from +90 to -90
degrees at the resonance frequency. For operating
frequencies slightly above resonance and higher,
the phase is fixed at -90 degrees for the duration
of preheat and ignition. During dimming, the circuit
is an L in series with a parallel R and C, with a
weak phase inversion at high lamp power and a
strong phase inversion at low lamp power.
Vin
in
I
ph/ign
Iin
run
0
t
n
run
nph/ign
Figure 3, Typical ballast output stage waveforms.
When the phase is calculated and plotted versus
lamp power (Figure 4), the result is a linear dimming
curve, even down to ultra-low light levels where
the resistance of the lamp can change by orders
of magnitude.
www.irf.com
15
( )
S
IR2159/IR21591
The start-up capacitor (C1) is charged by current
through resistor (R1) minus the start-up current
drawn by the IC. This resistor is typically chosen
to provide 2X the maximum start-up current at
low line to guarantee start-up under the worst case
condition. Once the capacitor voltage reaches the
start-up threshold, and, the voltage on pinVDC is
above 5.1V (see Brown-out Protection), the IC
turns on and HO and LO begin to oscillate. The
capacitor begins to discharge due to the increase
in IC operating current (Figure 6).
-60.0
-65.0
-70.0
-75.0
-80.0
-85.0
-90.0
VC1
0
5
10
15
Lamp Power [Watts]
20
25
30
C1
INTERNAL
CLAMP VOLTAGE
DISCHARGE
VUVLO+
Figure 4, Lamp power vs. phase of output stage.
VHYST
VUVLO-
DISCHARGE
TIME
Under-voltage Lock-Out (UVLO)
CHARGE PUMP
OUTPUT
The IR2159 undervoltage lock-out is designed to
maintain an ultra low quiescent current of less
than 200uA, while guaranteeing the IC is fully
functional before the high and low side output
drivers are activated. Figure 5 shows an efficient
supply voltage using the start-up current of the
IR2159 together with a charge pump from the
ballast output stage (R1, C1, C2, D1 and D2).
R1
& C1 TIME
CONSTANT
t
Figure 6, Start-up capacitor (C1) voltage.
During the discharge cycle, the rectified current
from the charge pump charges the capacitor above
the minimum operating voltage of the device and
the charge pump and internal 15.6V zener clamp
of the IC take over as the supply voltage. The
start-up capacitor and snubber capacitor must be
selected such that worst case IC conditions are
satisfied. A bootstrap diode (D3) and supply
capacitor (C3) comprise the supply voltage for
the high side driver circuitry. To guarantee that
the high-side supply is charged up before the first
pulse on pin HO, the first pulse from the output
drivers comes from the LO pin. During UVLO,
the high and low side driver outputs are low, pin
VCO is pulled-up internally to 5V resetting the
starting frequency to the maximum, and pin CPH
is short-circuited internally to COM resetting the
preheat time.
VBUS(+)
Rectified
AC Line
R3
R1
VDC
HO
Q1
16
15
14
13
12
11
1
Half-Bridge
Output
VS
VB
C3
D3
C2
D1
VCC
C1
COM
LO
Q2
RVDC
CVDC
D2
RCS
VBUS(-)
Figure 5, Typical application of start-up circuitry.
16
www.irf.com
( )
S
IR2159/IR21591
Brown-out Protection
VBUS(+)
In addition to the voltage on VCC being above
the start-up threshold, pin VDC must also be
above 5.1V for HO and LO to begin oscillating. A
voltage divider (R3,RVDC) from the rectified AC
line connected to pinVDC measures the rectified
AC line input voltage to the ballast and programs
the turn-on and turn-off line voltages. A filter
capacitor (CVDC) is also connected to pin VDC
that must be chosen such that the ripple is low
enough and the lower turn-off threshold of 3V is
not crossed during normal line conditions. This
detection is necessary due to the possibility of
the lamp extinguishing during low-line conditions
before the IC is properly reset. Should a brown-
out occur, the DC bus can drop to a level below
the minimum required for the tank circuit to
maintain the necessary lamp voltage. This
detection will insure a clean turn-off before the
DC bus drops too low and properly resets the
IC to the preheat mode when the line returns.
60uA
HO
VCO
Q2
16
2
VCO
CVCO
Half
Bridge
Output
1uA
Half
Bridge
Driver
VS
LO
15
11
ILOAD
1uA
CPH
PH
LOGIC
3
7
Q2
CCPH
7.6V
IFMIN
FMIN
RFMIN
5.1V
CS
10
12
RCS
1/RFMIN
COM
IPH
8
IR2159
RIPH
Load
Return
VBUS(-)
Figure 7, IR2159 preheat circuitry.
An internal 1uA current source slowly discharges
the external capacitor on pinVCO and the voltage
on pin VCO begins to decrease. This decreases
the frequency, which, for operating frequencies
above resonance, increases the load current.
When the peak voltage measured on pin CS,
produced by a portion of the load current flowing
through an external sense resistor (RCS), exceeds
the voltage level on pin IPH, a 60uA internal
current source is connected to pin VCO and the
capacitor charges (Figure 8). This forces the
frequency to increase and the load current to
decrease. When the voltage on pin CS decreases
below IPH, the 60uA current source is
disconnected and the frequency decreases again.
Preheat (PH)
The IR2159 enters preheat mode when VCC
exceeds the UVLO+ threshold andVDC exceeds
5.1V. HO and LO begin to oscillate at the
maximum operating frequency with 50% duty
cycle and at the internally set dead-time of 2us.
Pin CPH is disconnected from COM and an
internal 1uA current source (Figure 7) charges
the external timing capacitor on CPH linearly.
www.irf.com
17
( )
S
IR2159/IR21591
HO
LO
VS
VBUS(+)
HO
VCO
Q2
16
2
VCO
CVCO
Half
1uA
Bridge
Output
Half
Bridge
Driver
VS
LO
15
11
t
t
ILOAD
VRCS
1uA
PH
LOGIC
CPH
DIM
3
4
VIPH
Q2
CCPH
7.6V
DIM
INTERFACE
0.5 to 5V
RDIM
FAULT
LOGIC
1.6V
CS
10
12
RCS
COM
PHASE
CONTROL
ICVCO
IR2159
Load
Return
60uA
VBUS(-)
t
t
-1uA
Figure 9, IR2159 ignition circuitry.
VCVCO
The ignition ramp is then initiated as the capacitor
on pinVCO discharges linearly through an internal
1uA current source. The frequency decreases
linearly towards the resonance frequency of the
high-Q ballast output stage, causing the lamp
voltage and load current to increase (Figure 10).
The frequency continues to decrease until the lamp
ignites or the current limit of the IR2159 is reached.
If the current limit is reached, the IR2159 enters
FAULT mode. The 1.6V threshold together with
the external current sensing resistor on pin CS
determine the maximum allowable peak ignition
current (and therefore peak ignition voltage) of the
ballast output stage. The peak ignition current
must not exceed the maximum allowable current
ratings of the output stage MOSFETs or IGBTs,
and, the resonant inductor must not saturate
at any time.
Figure 8, Peak load current regulation timing diagram.
This feedback keeps the peak preheat current
regulated to the user-programmable setting on pin
IPH for the duration of the preheat time. An
internal current source connected to an external
resistor on pin IPH sets a voltage reference for
the peak pre-heat current. The pre-heat time
continues until the voltage on pin CPH exceeds
5V.
Ignition (IGN)
The IR2159 enters ignition mode when the voltage
on pin CPH exceeds 5V. The peak current
regulation reference voltage is disconnected from
the user-programmable setting on pin IPH and is
connected to a higher internal threshold of 1.6V
(Figure 9).
Should the lamp ignite, the frequency continues
to decrease until the voltage on pinVCO reaches
VDIMTH, corresponding to the minimum operating
frequency set by the external resistor on pin FMIN,
18
www.irf.com
( )
S
IR2159/IR21591
and the IR2159 enters DIM mode and the phase
control loop is closed.
down smoothly to the user setting. Should the
ignition-to-dim time be too fast, however, the loop
can respond faster than the ionization constant
of the lamp (milliseconds) causing the VCO to
over-shoot. This can result in a frequency that is
higher than the minimum brightness frequency and
can extinguish the lamp. The capacitor on pin
CPH serves multiple functions by setting the
preheat time, the travel rate just after ignition
(together with resistor RDIM), and, serving as a
filter capacitor on pin DIM during dimming to
increase high-frequency noise immunity and
minimize component count.
VCPH
5.1V
RDIM & CTPH
TIME CONSTANT
VDIM
t
VVCO
IGN-TO-DIM
TIME
Dimming (DIM)
t
To regulate lamp power, the error between the
reference phase and the phase of the output stage
current forces the VCO to steer the frequency in
the proper direction, as determined by the transfer
function of the output stage, such that the error is
forced to zero.An internal 15uA current source is
connected to pin VCO during dimming mode
(Figure 11) to discharge the VCO capacitor and
decrease the frequency towards lock.
PH
DIM
IGN
Figure 10, IR2159 ignition timing diagram.
For a reliable ignition with minimal start-up flash,
the resistor on FMIN should be set to 5kHz lower
than the ignition frequency or the 100% brightness
dimming frequency, whichever is lower.
VBUS(+)
Ignition-to-Dim (IGN-to-DIM)
IR2159
VCC
When the VCO decreases below VDIMTH, the
IR2159 enters dim mode.The phase control loop
is closed and the phase of the load current is
regulated against the user control input on pin DIM.
To control the rate at which the dim setting
changes from maximum brightness to the user
setting (IGN-TO-DIM time, Figure 10), pin DIM is
connected internally to pin CPH when the IR2159
enters DIM mode. The resistor on pin DIM (RDIM)
discharges the capacitor on pin CPH down to the
user dim setting. The resistor can be selected for
a fast time constant to minimize the amount of
flash visible over the lamp just after ignition, or, a
long time constant such that the brightness ramps
RFB
HO
VCO
Q2
16
2
VCO
Half
Bridge
Output
16uA
CVCO
Half
Bridge
Driver
VS
LO
15
11
ILOAD
CPH
3
4
DIM
INTERFACE
Q2
CCPH
7.6V
DIM
0.5 to 5V
RDIM
FAULT
LOGIC
1.6V
MAX
CS
5
6
10
12
RMAX
RMIN
MIN
RCS
PHASE
CONTROL
COM
Load
Return
V
BUS(-)
Figure 11, IR2159 dimming circuitry.
www.irf.com
19
( )
S
IR2159/IR21591
Once lock is achieved, the phase detector (PDET)
outputs short pulses to an open-drain PMOS that
charges the VCO capacitor through an internal
resistor (RFB) each time an error pulse occurs
(Figure 12).This action "nudges" the integrator at
the input of the VCO to keep the phase of the
output stage current exactly locked in phase with
the reference.
VMIN
5V
V CT
RMIN
R M A X
3V
1V
0
DIM
RANGE
USER
SETTING
0.5V
5V
LO
VCS
VDIM
nREF
E
0
E
-90
E
-180
t
n
Figure 13, Dimming interface
LO
The charging time of CT from 1V to 5.1V
determines the on-time of output gate drivers HO
and LO and corresponds to -180 degrees of
possible phase shift in load current (minus
deadtime). For the 0 to -90 degree dim range, the
voltage on pin MIN is bounded between 1V and
3V using pins MIN and MAX. An external resistor
on pin MAX programs the minimum phase shift
reference (maximum lamp power) corresponding
to 5V on pin DIM, and an external resistor on pin
MIN sets the maximum phase shift (minimum
lamp power) corresponding to 0.5V on pin DIM.
nREF
nFB
nERR
VVCO
t
Figure 12, Phase control timing diagram.
The IR2159 includes a dimming interface for
analog lamp power control. The DIM pin input
requires a voltage in the range of 0.5 to 5VDC,
with 5V corresponding to minimum phase shift
(maximum lamp power). The output of the dim
interface is the voltage on pin MIN, which is
compared with the internal timing capacitor (CT)
voltage to produce a frequency-independent digital
reference phase (Figure 13).
Current Sensing
During dimming, the current sensing circuitry
(Figure 14) detects over-current which can occur
during hard-switching (see Fault section), and
zero-crossing to measure the phase of the total
load current. To reject any switching noise which
can occur at the turn-on of the low-side MOSFET
or IGBT, a digital current sense blanking circuit
blanks out the signal from the zero-crossing
20
www.irf.com
( )
S
IR2159/IR21591
detection comparator for 400ns after LO goes 'high'
(Figure 15).
VCS
Switching
Noise
VBUS (+)
t
IR2159
HO
Q2
16
L O
Half
Bridge
Output
JBLANK
Half
Bridge
Driver
VS
LO
15
11
ILOAD
Dimming
Range
Q2
FAULT
LOGIC
Figure 15, Current sense timing diagram.
1.6V
CS
R1
10
12
RCS
PHASE
CONTROL
400ns
BLANK
COM
Fault Mode (FAULT)
Load
Return
During dimming, the peak current regulation circuit
active during preheat and ignition is disabled.
Should non-zero voltage switching at the output
of the half-bridge occur (Figure 16), high current
spikes will result. A lamp filament failure, lamp
end-of-life, lamp removal, or a deadtime shorter
than what is required for commutation, can all
cause hard-switching.
VBUS (-)
Figure 14, Current sensing circuitry.
The internal blank time reduces the dimming range
slightly (Figure 15) when operating at minimum
phase shift (maximum lamp power). The external
programming resistor on pin MAX must be
selected such that the minimum phase shift is
set a safe margin away from the blank time. A
series resistor (R1) is required to limit the amount
of current flowing out of pin CS when the voltage
across RCS goes below -0.7V. A filter capacitor
at pin CS may be required due to other possible
asynchronous noise sources present in the ballast
system.
L O A D
R E M O V A L
HO
LO
VS
t
VCS
1.6V
t
N
O
R
M
A
L
H A R D
S W I T C H I N G
F A U L T
O P E R A T I O N
Figure 16, hard-switching with latch off
www.irf.com
21
( )
S
IR2159/IR21591
Should the peak voltage on pin CS exceed 1.6V Ballast Output Stage
at any time during dimming, the IR2159 enters
FAULT mode and the high and low-side driver The components comprising the output stage are
outputs, HO and LO, are both turned off . Cycling selected using a set of equations. Different ballast
the supply voltage on VCC below or the voltage operating frequencies and their respective
on pin SD will reset the IR2159 to preheat (PH) voltages and currents are calculated.
mode (see STATE DIAGRAM).
The inductor and capacitor values are obtained
using equations (2) through (7). The results of
these equations reveal the location of each
operating frequency and the corresponding
voltages and currents. For a given L, C, DC bus
voltage, and pre-heat current, the resulting voltage
over the lamp during pre-heat is given as:
Ballast Design
Lamp Requirements
Before selecting component values for the ballast
output stage and the programmable inputs of the
IR2159, the following lamp requirements must first
be defined:
1
2
2
2
2
VDC
VDC
8
L
I 2ph
(2)
=
+
−
Vph
π
π
C
Variable
Description
Filament pre-heat current
Units
Arms
I ph
The resulting operating frequency during pre-heat
is given as:
Filament pre-heat time
s
tph
Maximum lamp pre-heat voltage
Lamp ignition voltage
Vpp
Vpp
2
Iph
Vph
max
=
fph
[Hz] (3)
π
CVph
V
ign
Lamp power at 100% brightness
Lamp voltage at 100% brightness
W
P
100%
Vpp
V
100%
The resulting operating frequency during ignition
is given as:
Lamp power at 1% brightness
Lamp voltage at 1% brightness
W
P
1%
Vpp
V
1%
4
VDC
1+ π
Minimum cathode heating current
Arms
ICath
min
Vign
1
[Hz] (4)
=
fign
Table I, Typical lamp requirements
2
π
LC
The total load current during ignition is given as:
Iign = fignCVign 2π
[App] (5)
22
www.irf.com
( )
S
IR2159/IR21591
The operating frequency [Hz] at maximum lamp
power is given as:
2
V
4
DC
−
1
2
P2
32 %
P2
32 %
V%π
LC2
1
1
1
(8)
(9)
f% =
−
+
−
−
2
LC C2V%4
LC C2V%4
π
2
2
4
VDC
1
−
2
2
2
V
100%π
32
32
P
100%
1
1
1
P
(6)
100%
f100%
=
−
+
−
−
180
V%2
2P
V2
2
LC C2V4
LC C2V4
LC2
1
2 3 3
−
2
π
100%
100%
ϕ% =
tan [( C− % L)2πf% −4 % LCπ f%]
π
2P
V%2
P
%
%
The cathode heating current at minimum lamp
power is given as:
With the lamp requirements defined, the L and C
of the ballast output stage selected, and the
minimum and maximum phase calculated, the
component values for setting the programmable
inputs of the IR2159 are obtained with the following
equations:
V f1%πC
1%
ICath
=
(7)
1%
2
Design Constraints
(25e − 6) − ( fMIN −10000) (1e −10)
RFMIN
=
The inductor and capacitor values should be
iterated until the following design constraints have
been fulfilled (Table II).
( fMIN −10000) (2e −14)
[Ohms]
(10)
(11)
2 (1.6)
=
RCS
Design Constraint
Reason
[Ohms]
Iign
Ignition during pre-
heat
V
< V
phmax
ph
f
− f > 5kHz
Production tolerances
ph
I
ign
[Ohms]
[Farads]
(12)
(13)
=
2
)
RIPH RFMIN RCS Iph
< I
Inductor saturation
ign
ignmax
Lamp extinguishing
during dimming
ICath ≥ ICath
1%
min
= (2.6 − 7)(
tPH
CCPH
E
Table II, Ballast design constraints
RFMIN
ϕ1%
[Ohms]
(14)
=
=
1−
RMIN
IR2159 Programmable Inputs
4
45
In order to program the MIN and MAX settings of
the dimming interface, the phase of the output
stage current at minimum and maximum lamp
power must be calculated. This is obtained using
the following equations:
0.86
RFMIN RMIN
ϕ100%
RMAX
4
−
1−
RMIN RFMIN
45
[Ohms]
(15)
www.irf.com
23
( )
S
IR2159/IR21591
This ballast design procedure has been summarized into the following 3 steps:
Define
Lamp
Requirements
Iterate L and C
to fulfill
constraints
Calculate
IR2159
Programmable
Inputs
Figure 19, Simplified Ballast Design Procedure
Case outline
01-6015
01-3065 00 (MS-001A)
16 Lead PDIP
24
www.irf.com
( )
S
IR2159/IR21591
01-6018
01-3064 00 (MS-012AC)
16 -Lead SOIC (narrow body)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 10/8/2001
www.irf.com
25
相关型号：
©2020 ICPDF网 联系我们和版权申明