IR2184 [INFINEON]
HALF-BRIDGE DRIVER; 半桥驱动器
| 型号： | IR2184 |
| 厂家： | 
Infineon |
| 描述： | HALF-BRIDGE DRIVER |
| 文件： | 总8页 (文件大小：184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60174-D
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S
IR2184 4
HALF-BRIDGE DRIVER
Features
Packages
Floating channel designed for bootstrap operation
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
14-Lead PDIP
IR21844
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V and 5V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5V offset.
Lower di/dt gate driver for better noise immunity
Output source/sink current capability 1.4A/1.8A
•
8-Lead SOIC
IR2184S
•
•
•
•
8-Lead PDIP
IR2184
•
14-Lead SOIC
IR21844S
•
Description
The IR2184(4)(S) are high voltage,
high speed power MOSFET and IGBT
drivers with dependent high and low
side referenced output channels. Pro-
prietary HVIC and latch immune
CMOS technologies enable rugge-
dized monolithic construction. The
logic input is compatible with standard
CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a high
pulse current buffer stage designed for
IR2181/IR2183/IR2184 Feature Comparison
Cross-
Input
logic
conduction
prevention
logic
Part
Dead-Time
Ground Pins
Ton/Toff
2181
21814
2183
COM
VSS/COM
COM
HIN/LIN
HIN/LIN
IN/SD
no
none
180/220 ns
180/220 ns
680/270 ns
Internal 500ns
Program 0.4 ~ 5 us
Internal 500ns
yes
yes
21834
2184
VSS/COM
COM
21844
Program 0.4 ~ 5 us
VSS/COM
minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or
IGBT in the high side configuration which operates up to 600 volts.
Typical Connection
up to 600V
VCC
VCC
IN
VB
HO
VS
IN
TO
LOAD
SD
SD
COM
LO
up to 600V
IR2184
HO
VB
VS
IR21844
VCC
VCC
IN
IN
TO
LOAD
SD
DT
VSS
SD
(Refer to Lead Assignments for correct
configuration).This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
COM
LO
VSS
RDT
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IR2184 4
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM.The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Min.
Max.
Units
V
-0.3
625
B
S
V
V
B
- 25
V
+ 0.3
+ 0.3
25
B
V
HO
V
CC
V
S
- 0.3
V
B
Low side and logic fixed supply voltage
Low side output voltage
-0.3
-0.3
V
V
LO
V
V
+ 0.3
+ 0.3
+ 10
CC
CC
DT
Programmable dead-time pin voltage (IR21844 only)
Logic input voltage (IN & SD)
V
- 0.3
SS
SS
CC
V
IN
V
V
- 0.3
- 25
V
SS
CC
V
SS
Logic ground (IR21844 only)
V
+ 0.3
dV /dt
Allowable offset supply voltage transient
—
50
V/ns
W
S
P
D
Package power dissipation @ T ≤ +25°C
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
—
—
—
—
—
—
—
—
—
-50
—
1.0
0.625
1.6
A
1.0
Rth
Thermal resistance, junction to ambient
125
200
75
JA
°C/W
°C
120
150
150
300
T
T
Junction temperature
J
Storage temperature
S
T
Lead temperature (soldering, 10 seconds)
L
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V and V offset rating are tested with all supplies biased at 15V differential.
S
SS
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
V
+ 10
V + 20
S
S
V
Note 1
600
S
V
HO
V
V
B
S
V
Low side and logic fixed supply voltage
Low side output voltage
10
0
20
CC
V
V
V
CC
LO
V
Logic input voltage (IN & SD)
V
V
+ 5
IN
SS
SS
SS
DT
Programmable dead-time pin voltage (IR21844 only)
Logic ground (IR21844 only)
V
V
CC
V
-5
5
SS
T
A
Ambient temperature
-40
125
°C
Note 1: Logic operational for V of -5 to +600V. Logic state held for V of -5V to -V . (Please refer to the Design Tip
S
S
BS
DT97-3 for more details).
Note 2: IN and SD are internally clamped with a 5.2V zener diode.
2
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IR2184 4
Dynamic Electrical Characteristics
V
(V , V ) = 15V, V = COM, C = 1000 pF, T = 25°C, DT = VSS unless otherwise specified.
BIAS CC BS
L
A
SS
Symbol
Definition
Min. Typ. Max. Units Test Conditions
t
t
t
Turn-on propagation delay
—
—
—
—
—
—
—
680
270
180
0
900
400
270
90
V = 0V
S
on
off
sd
Turn-off propagation delay
V
S
= 0V or 600V
Shut-down propagation delay
MTon
MToff
Delay matching, HS & LS turn-on
nsec
Delay matching, HS & LS turn-off
Turn-on rise time
0
40
t
t
40
20
60
V
V
= 0V
= 0V
r
S
Turn-off fall time
35
f
S
DT
Deadtime: LO turn-off to HO turn-on(DT
280
4
400
5
520
6
RDT= 0
RDT = 200k
RDT=0
LO-HO) &
HO turn-off to LO turn-on (DT
µsec
HO-LO)
HO-LO
MDT
Deadtime matching = DT
- DT
—
0
50
LO - HO
nsec
—
0
600
RDT = 200k
Static Electrical Characteristics
V
(V , V ) = 15V, V
CC BS
= COM, DT= V
and T = 25°C unless otherwise specified. The V , V and I
SS A IL IH IN
BIAS
SS
parameters are referenced to V /COM and are applicable to the respective input leads: IN and SD. The V , I and Ron
SS
O O
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “1” input voltage for HO & logic “0” for LO
2.7
—
—
—
—
—
—
—
60
1.0
5
—
0.8
—
V
V
V
V
= 10V to 20V
= 10V to 20V
= 10V to 20V
= 10V to 20V
IH
CC
CC
CC
CC
V
Logic “0” input voltage for HO & logic “1” for LO
—
IL
SD,TH+
V
SD input positive going threshold
SD input negative going threshold
2.7
—
V
V
0.8
1.2
0.1
50
SD,TH-
V
OH
High level output voltage, V
- V
O
—
—
I
I
= 0A
= 0A
BIAS
O
V
Low level output voltage, V
O
OL
LK
O
I
Offset supply leakage current
Quiescent V supply current
—
V = V = 600V
B S
µA
mA
µA
I
20
0.4
—
150
1.6
20
V
= 0V or 5V
= 0V or 5V
QBS
QCC
BS
IN
IN
I
Quiescent V
supply current
V
CC
I
Logic “1” input bias current
Logic “0” input bias current
IN = 5V, SD = 0V
IN = 0V, SD = 5V
IN+
I
—
1
2
IN-
V
V
CC
and V supply undervoltage positive going
8.0
8.9
9.8
CCUV+
BS
V
threshold
BSUV+
V
V
V
and V dupply undervoltage negative going
7.4
0.3
8.2
0.7
9.0
—
CCUV-
CC
BS
threshold
BSUV-
V
A
V
Hysteresis
CCUVH
V
BSUVH
I
Output high short circuit pulsed vurrent
Output low short circuit pulsed current
1.4
1.8
1.9
2.3
—
—
V = 0V,
O
O+
PW ≤ 10 µs
= 15V,
I
V
O
O-
PW ≤ 10 µs
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IR2184 4
Functional Block Diagrams
VB
UV
DETECT
2184
HO
R
R
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
S
VSS/COM
LEVEL
SHIFT
IN
VS
PULSE
GENERATOR
VCC
LO
DEADTIME
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
COM
VB
UV
21844
DETECT
HO
R
Q
R
S
PULSE
FILTER
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFT
IN
VS
PULSE
GENERATOR
VCC
LO
DEADTIME
D T
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
COM
VSS
4
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IR2184 4
Lead Definitions
Symbol Description
IN
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM
for IR2184 and VSS for IR21844)
Logic input for shutdown (referenced to COM for IR2184 and VSS for IR21844)
Programmable dead-time lead, referenced to VSS. (IR21844 only)
Logic Ground (21844 only)
SD
DT
VSS
V
High side floating supply
B
HO
High side gate drive output
V
V
High side floating supply return
S
Low side and logic fixed supply
CC
LO
Low side gate drive output
COM
Low side return
Lead Assignments
V
V
1
2
3
4
IN
1
2
3
4
IN
B
8
7
B
8
7
HO
HO
SD
COM
LO
SD
COM
LO
V
S
V
S
6
5
6
5
V
V
CC
CC
8-Lead PDIP
8-Lead SOIC
IR2184
IR2184S
14
13
12
11
10
9
14
13
12
11
10
9
1
IN
1
2
3
4
5
6
7
IN
V
V
2
3
4
5
6
7
SD
VSS
DT
B
SD
B
HO
HO
VSS
DT
V
S
V
S
COM
LO
COM
LO
8
8
V
V
CC
CC
14-Lead PDIP
14-Lead SOIC
IR21844
IR21844S
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IR2184 4
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
INCHES
MILLIMETERS
DIM
A
D
B
MIN
.0532
MAX
.0688
.0098
.020
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
FOOTPRINT
8X 0.72 [.028]
5
5
4
A
E
A1 .0040
b
c
.013
.0075
.189
.0098
.1968
.1574
8
1
7
2
6
3
6
D
E
e
H
.1497
0.25 [.010]
A
.050 BASIC
1.27 BASIC
6.46 [.255]
e 1 .025 BASIC
0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
3X 1.27 [.050]
e
6X
8X 1.78 [.070]
e1
K x 45°
A
C
y
0.10 [.004]
8X c
8X L
A1
8X b
0.25 [.010]
7
C
A B
NOT ES :
5
6
7
DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENS IONS ARE S HOWN IN MILLIME TE RS [INCHES ].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
6
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IR2184 4
01-6010
01-3002 03 (MS-001AC)
14-Lead PDIP
01-6019
01-3063 00 (MS-012AB)
14-Lead SOIC (narrow body)
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IR2184 4
IN
IN(LO)
50%
50%
t
SD
IN(HO)
t
t
t
f
on
off
r
90%
90%
HO
LO
LO
HO
10%
10%
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
SD
50%
50%
50%
IN
t
sd
HO
LO
90%
90%
DT
10%
HO
LO
LO-HO
DT
Figure 3. Shutdown Waveform Definitions
HO-LO
10%
90%
IN(LO)
MDT=
DT
- DT
LO-HO
HO-LO
50%
50%
IN(HO)
Figure 4. Deadtime Waveform Definitions
LO
HO
10%
MT
MT
90%
LO
HO
Figure 5. Delay Matching Waveform Definitions
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 7/24/2001
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