IR2184STRPBF [INFINEON]
HALF-BRIDGE DRIVER; 半桥驱动器
| 型号： | IR2184STRPBF |
| 厂家： | 
Infineon |
| 描述： | HALF-BRIDGE DRIVER |
| 文件： | 总24页 (文件大小：294K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60174 revG
( )( )&(PbF)
S
IR2184 4
HALF-BRIDGE DRIVER
Features
Packages
Floating channel designed for bootstrap operation
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
14-Lead PDIP
IR21844
Gate drive supply range from 10 to 20V
•
Undervoltage lockout for both channels
•
8-Lead PDIP
IR2184
3.3V and 5V input logic compatible
•
Matched propagation delay for both channels
•
Logic and power ground +/- 5V offset.
•
Lower di/dt gate driver for better noise immunity
•
Output source/sink current capability 1.4A/1.8A
•
8-Lead SOIC
IR2184S
14-Lead SOIC
IR21844S
Also available LEAD-FREE (PbF)
•
Description
IR2181/IR2183/IR2184 Feature Comparison
The IR2184(4)(S) are high voltage,
high speed power MOSFET and IGBT
drivers with dependent high and low
side referenced output channels. Pro-
prietary HVIC and latch immune
CMOS technologies enable rugge-
dized monolithic construction. The
logic input is compatible with standard
CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a
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ꢌꢗꢟꢠꢟꢘꢎꢛꢏꢘꢍ
ꢙꢏꢚꢛꢜꢍ
ꢕꢖꢗꢎꢍ
ꢊꢟꢖ!ꢞꢒꢛꢡꢟꢍ
%ꢗꢏꢋꢘ!ꢍꢕꢛꢘꢝꢍ
ꢒꢏꢘ&ꢒꢏꢢꢢꢍ
*797ꢍ
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ꢁꢅꢇꢍ
ꢀꢃꢃ&ꢁꢅꢇꢍ
ꢁꢅꢇꢍ
ꢄꢈꢉ&ꢆꢈꢉꢍ
ꢄꢈꢉ&ꢆꢈꢉꢍ
ꢈꢉ&ꢃꢊꢍ
ꢘꢏꢍ
ꢣꢟꢝꢍ
ꢣꢟꢝꢍ
ꢘꢏꢘꢟꢍ
79ꢑ&**ꢑꢍꢘꢝꢍ
79ꢑ&**ꢑꢍꢘꢝꢍ
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ꢈꢘꢎꢟꢗꢘꢖꢙꢍ<ꢑꢑꢘꢝꢍ
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ꢀꢃꢃ&ꢁꢅꢇꢍ
high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600
volts.
Typical Connection
ꢋꢌꢍꢎꢏꢍꢐꢑꢑꢀ
ꢀ
ꢁꢁ
ꢀ
ꢀ
ꢂ
ꢁꢁ
ꢈꢉ
ꢈꢉ
ꢄꢅ
ꢒꢅ
ꢃꢊ
ꢃꢊ
ꢀ
ꢃ
ꢆꢅꢓꢊ
ꢁꢅꢇ
ꢆꢅ
ꢋꢌꢍꢎꢏꢍꢐꢑꢑꢀ
IR2184
ꢄꢅ
IR21844
ꢀ
ꢀ
ꢀ
ꢁꢁ
ꢁꢁ
ꢂ
ꢈꢉ
ꢀ
ꢈꢉ
ꢃ
ꢒꢅ
ꢆꢅꢓꢊ
ꢃꢊ
ꢊꢒ
ꢃꢊ
(Refer to Lead Assignments for correct
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
ꢀ
ꢁꢅꢇ
ꢆꢅ
ꢀ
ꢃꢃ
ꢃꢃ
ꢔ
ꢊꢒ
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1
( )(S)&(PbF)
IR2184 4
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Min.
Max.
Units
V
B
-0.3
625
V
S
V
B
- 25
V
+ 0.3
+ 0.3
25
B
V
V
- 0.3
V
HO
S
B
V
CC
Low side and logic fixed supply voltage
Low side output voltage
-0.3
-0.3
- 0.3
V
V
V
V
+ 0.3
LO
CC
DT
Programmable dead-time pin voltage (IR21844 only)
Logic input voltage (IN ꢥ SD)
V
+ 0.3
+ 10
+ 0.3
SS
SS
CC
CC
V
IN
V
V
- 0.3
- 25
V
SS
V
Logic ground (IR21844 only)
V
SS
CC
dV /dt
S
Allowable offset supply voltage transient
—
50
V/ns
P
D
Package power dissipation ꢦ T ≤ +25°C
A
(8-lead PDIP)
—
—
—
—
—
—
—
—
—
-50
—
1.0
0.625
1.6
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
W
1.0
Rth
JA
Thermal resistance, junction to ambient
125
200
ꢧ5
°C/W
120
150
150
300
T
J
Junction temperature
T
S
Storage temperature
°C
T
L
Lead temperature (soldering, 10 seconds)
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V and V offset rating are tested with all supplies biased at 15V differential.
S SS
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
V
+ 10
V + 20
S
S
V
S
Note 1
600
V
HO
V
S
V
B
V
Low side and logic fixed supply voltage
Low side output voltage
10
0
20
CC
V
V
V
CC
LO
V
Logic input voltage (IN ꢥ SD)
V
V
+ 5
SS
IN
SS
DT
Programmable dead-time pin voltage (IR21844 only)
Logic ground (IR21844 only)
V
V
CC
SS
V
-5
5
SS
T
A
Ambient temperature
-40
125
°C
Note 1ꢨ Logic operational for V of -5 to +600V. Logic state held for V of -5V to -V . (Please refer to the Design Tip
S S BS
DTꢩꢧ-3 for more details).
Note 2ꢨ IN and SD are internally clamped with a 5.2V zener diode.
2
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IR2184 4
Dynamic Electrical Characteristics
V
(V , V ) = 15V, V = COM, C = 1000 pF, T = 25°C, DT = VSS unless otherwise specified.
BIAS CC BS
L
A
SS
Symbol
Definition
Min. Typ. Max. Units Test Conditions
t
Turn-on propagation delay
Turn-off propagation delay
—
—
—
—
—
—
—
680
2ꢧ0
180
0
ꢩ00
400
2ꢧ0
ꢩ0
V = 0V
S
on
t
V = 0V or 600V
S
off
t
sd
Shut-down propagation delay
MTon
MToff
Delay matching, HS ꢥ LS turn-on
nsec
Delay matching, HS ꢥ LS turn-off
Turn-on rise time
0
40
t
40
20
60
V
V
= 0V
= 0V
r
S
S
t
f
Turn-off fall time
35
DT
Deadtimeꢨ LO turn-off to HO turn-on(DT
280
4
400
5
520
6
RDT= 0
RDT = 200k
RDT=0
LO-HO) ꢥ
HO turn-off to LO turn-on (DT
µsec
HO-LO)
MDT
Deadtime matching = DT
- DT
—
0
50
LO - HO
HO-LO
nsec
—
0
600
RDT = 200k
Static Electrical Characteristics
V
(V , V ) = 15V, V = COM, DT= V
BIAS CC BS SS
and T = 25°C unless otherwise specified. The V , V and I
SS
A
IL IH
IN
parameters are referenced to V /COM and are applicable to the respective input leadsꢨ IN and SD. The V , I and Ron
SS O O
parameters are referenced to COM and are applicable to the respective output leadsꢨ HO and LO.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “1” input voltage for HO ꢥ logic “0” for LO
Logic “0” input voltage for HO ꢥ logic “1” for LO
2.ꢧ
—
—
—
—
—
—
—
—
60
1.0
25
—
0.8
—
V
V
V
V
= 10V to 20V
= 10V to 20V
= 10V to 20V
= 10V to 20V
IH
CC
CC
CC
CC
V
IL
V
SD,TH+
SD input positive going threshold
SD input negative going threshold
2.ꢧ
—
V
V
0.8
1.2
0.1
50
SD,TH-
V
OH
High level output voltage, V
Low level output voltage, V
- V
—
—
I
I
= 0A
= 0A
BIAS
O
O
O
V
OL
O
I
Offset supply leakage current
—
V
= V = 600V
B S
LK
µA
mA
µA
I
Quiescent V supply current
BS
20
0.4
—
150
1.6
60
V
= 0V or 5V
QBS
IN
I
Quiescent V
supply current
V
= 0V or 5V
IN
QCC
CC
I
Logic “1” input bias current
Logic “0” input bias current
IN = 5V, SD = 0V
IN = 0V, SD = 5V
IN+
I
IN-
—
—
1.0
ꢩ.8
V
V
and V supply undervoltage positive going
BS
8.0
8.ꢩ
CCUV+
CC
V
threshold
and V supply undervoltage negative going
BSUV+
V
V
ꢧ.4
0.3
8.2
0.ꢧ
ꢩ.0
—
CCUV-
CC
BS
V
threshold
Hysteresis
BSUV-
V
V
CCUVH
V
BSUVH
I
Output high short circuit pulsed current
Output low short circuit pulsed current
1.4
1.8
1.ꢩ
2.3
—
—
V = 0V,
O
O+
PW ≤ 10 µs
= 15V,
A
I
V
O
O-
PW ≤ 10 µs
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3
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IR2184 4
Functional Block Diagrams
VB
UV
2184
DETECT
HO
R
R
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
S
VSS/COM
LEVEL
SHIFT
IN
VS
PULSE
GENERATOR
VCC
LO
DEADTIME
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
COM
VB
UV
21844
DETECT
HO
R
R
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
S
VSS/COM
LEVEL
SHIFT
IN
VS
PULSE
GENERATOR
VCC
LO
DEADTIME
DT
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
COM
VSS
4
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IR2184 4
Lead Definitions
Symbol Description
IN
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM
for IR2184 and VSS for IR21844)
Logic input for shutdown (referenced to COM for IR2184 and VSS for IR21844)
Programmable dead-time lead, referenced to VSS. (IR21844 only)
Logic Ground (21844 only)
SD
DT
VSS
V
High side floating supply
B
HO
High side gate drive output
V
High side floating supply return
S
V
Low side and logic fixed supply
CC
LO
Low side gate drive output
COM
Low side return
Lead Assignments
V
V
B
1
2
3
4
IN
B
8
ꢧ
1
2
3
4
IN
8
ꢧ
HO
HO
SD
COM
LO
SD
COM
LO
V
S
V
S
6
5
6
5
V
V
CC
CC
8-Lead PDIP
8-Lead SOIC
IR2184
IR2184S
14
1
2
3
4
5
6
ꢧ
IN
14
1
IN
V
13
12
11
10
ꢩ
V
SD
13
12
11
10
ꢩ
B
2
3
4
5
6
ꢧ
SD
B
HO
HO
VSS
DT
VSS
DT
V
S
V
S
COM
LO
COM
LO
8
V
8
V
CC
CC
14-Lead PDIP
14-Lead SOIC
IR21844
IR21844S
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5
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IR2184 4
ꢈꢉ
ꢈꢉ^ꢆꢅ_
<ꢑ`
<ꢑ`
ꢃꢊ
ꢈꢉ^ꢄꢅ_
ꢎ
ꢎ
ꢎ
ꢢ
ꢎ
ꢏꢘ
ꢏꢢꢢ
ꢗ
qꢑ`
qꢑ`
ꢄꢅ
ꢆꢅ
ꢆꢅ
ꢄꢅ
7ꢑ`
7ꢑ`
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
ꢃꢊ
<ꢑ`
<ꢑ`
<ꢑ`
ꢎ
ꢝ!
ꢈꢉ
ꢄꢅ
ꢆꢅ
qꢑ`
qꢑ`
ꢊꢒ
7ꢑ`
ꢄꢅ
ꢆꢅ
ꢆꢅꢞꢄꢅ
Figure 3. Shutdown Waveform Definitions
ꢊꢒ
ꢄꢅꢞꢆꢅ
qꢑ`
7ꢑ`
ꢇꢊꢒ{
ꢊꢒ
ꢞꢍꢍꢊꢒ
ꢆꢅꢞꢄꢅ
ꢄꢅꢞꢆꢅ
ꢈꢉ^ꢆꢅ_
<ꢑ`
<ꢑ`
Figure 4. Deadtime Waveform Definitions
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ꢆꢅ
ꢄꢅ
7ꢑ`
ꢇꢒ
ꢇꢒ
qꢑ`
ꢆꢅ
ꢄꢅ
Figure 5. Delay Matching Waveform Definitions
6
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IR2184 4
1400
1200
1000
800
1400
1200
1000
800
Max.
Typ.
Max.
Typ.
600
600
400
400
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 4A. Turn-on Propagation Delay
vs. Temperature
Figure4B. Turn-on Propagation Delay
vs. Supply Voltage
700
600
500
400
300
200
100
700
600
500
400
300
200
100
Max.
Max.
Typ.
Typ.
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 5A. Turn-off Propagation Delay
vs. Temperature
Figure 5B. Turn-off Propagation Delay
vs. Supply Voltage
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ꢧ
( )(S)&(PbF)
IR2184 4
500
400
300
200
100
0
500
400
300
200
100
0
Max.
Typ.
Max.
Typ.
10
12
14
16
18
20
-50 -25
0
25
50
75
100 125
Temperature (oC)
Supply Voltage (V)
Figure 6A. SDPropagation Delay
vs. Temperature
Figure 6B. SDPropagation Delay
vs. Supply Voltage
120
100
80
60
40
20
0
120
100
80
60
40
20
0
Max.
Typ.
Max.
Typ.
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 7A. Turn-on Rise Time vs. Temperature
Figure 7B. Turn-on Rise Time vs. Supply Voltage
8
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IR2184 4
80
60
40
20
0
80
60
40
20
0
Max.
Typ.
Max.
Typ
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 8A. Turn-off Fall Time vs. Temperature
Figure 8B. Turn-off Fall Time vs. Supply Voltage
1100
900
1100
900
700
700
Max.
Max.
Typ.
500
500
Typ.
Min.
Min.
300
300
100
100
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (v)
Figure 9A. Deadtime vs. Temperature
Figure 9B. Deadtime vs. Supply Voltage
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ꢩ
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IR2184 4
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Max.
Typ.
Min.
Min.
0
50
100
(K )
150
200
-50
-25
0
25
50
75
100 125
R
Η
DT
Temperature (oC)
Figure 9C. Deadtime vs. R
DT
Figure 10A. Logic "1" Input Voltage
vs. Temperature
6
6
5
4
3
2
1
0
5
4
3
2
1
0
Min.
Max.
10
12
14
16
18
20
-50
-25
0
25
50
75
100 125
Temperature (oC)
Supply Voltage (V)
Figure 10B. Logic "1" Input Voltage
vs. Supply Voltage
Figure 11A. Logic "0" Input Voltage
vs. Temperature
10
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IR2184 4
6
5
4
3
2
1
0
6
5
4
3
2
1
0
Min.
Max.
10
12
14
16
18
20
-50
-25
0
25
50
75
100 125
Temperature (oC)
Supply Voltage (V)
Figure 11B. Logic "0" Input Voltage
vs. Supply Voltage
Figure 12A. SDInput Positive Going Threshold
vs. Temperature
6
5
4
3
2
1
0
5
4
3
2
1
0
Min.
Max.
10
12
14
16
18
20
-50
-25
0
25
50
75
100 125
Supply Voltage (V)
Temperature (oC)
Figure 13A. SDInput Negative Going Threshold
vs. Temperature
Figure 12B. SDInput Positive Going Threshold
vs. Supply Voltage
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IR2184 4
5
4
3
2
1
0
5
4
3
2
1
0
Max.
Max.
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 14A. High Level Output vs. Temperature
Figure 13B. SDInput Negative Going Threshold
vs. Supply Voltage
0.5
0.4
0.3
0.2
5
4
3
2
Max.
Max.
0.1
1
0
0.0
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 14B. High Level Output vs. Supply Voltage
Figure 15A. Low Level Output vs. Temperature
12
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IR2184 4
0.5
0.4
0.3
0.2
0.1
0.0
500
400
300
200
100
0
Max.
Max.
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 16A. Offset Supply Leakage Current vs.
Temperature
Figure 15B. Low Level Output vs. Supply Voltage
500
400
300
200
250
200
150
100
50
Max.
Typ.
Min.
100
Max.
0
0
100
200
300
400
500
600
-50
-25
0
25
50
75
100 125
Temperature (oC)
VB Boost Voltage (V)
Figure 16B. Offset Supply Leakage Current vs.
VB Boost Voltage
Figure 17A. VBS Supply Current
vs. Temperature
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IR2184 4
5
4
3
2
1
0
250
200
150
100
50
Max.
Max.
Typ.
Min.
Typ.
Min.
0
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
VBS Floating Supply Voltage (V)
Figure 17B. VBS Supply Current
vs. VBS Floating Supply Voltage
Figure 18A. VCC Supply Current
vs. Temperature
5
4
3
2
1
120
100
80
60
40
20
0
Max.
Max.
Typ.
Min.
Typ.
0
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
VCC Supply Voltage (V)
Figure 19A. Logic "1" Input Bias Current
vs. Temperature
Figure 18B. VCC Supply Current
vs. VCC Supply Voltage
14
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( )(S)&(PbF)
IR2184 4
5
4
3
2
1
0
120
100
80
60
40
20
0
Max.
Typ.
Max.
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 20A. Logic "0" Input Bias Current
vs. Temperature
Figure 19B. Logic "1" Input Bias Current
vs. Supply Voltage
12
11
10
9
5
4
3
2
1
0
Max.
Typ.
Min.
8
Max.
7
6
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 21. VCC and VBS Undervoltage Threshold (+)
vs. Temperature
Figure 20B. Logic "0" Input Bias Current
vs. Supply Voltage
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15
( )(S)&(PbF)
IR2184 4
12
11
10
9
5
4
3
2
1
0
Max.
Typ.
Min.
Typ.
Min.
8
7
6
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Temperature (oC)
Temperature (oC)
Figure 22. VCC and VBS Undervoltage Threshold (-)
vs. Temperature
Figure 23A. Output Source Current
vs. Temperature
5.0
4.0
3.0
2.0
1.0
5
4
3
2
1
0
Typ.
Typ.
Min.
Min.
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 24A. Output Sink Current
vs. Temperature
Figure 23B. Output Source Current
vs. Supply Voltage
16
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( )(S)&(PbF)
IR2184 4
140
120
100
80
5
4
3
2
1
0
140v
70v
0v
Typ.
Min.
60
40
20
10
12
14
16
18
20
1
10
Frequency (KHz)
Figure 21.IR2181 vs.Frequency (IRFBC20),
100
1000
Supply Voltage (V)
Figure 24B. Output Sink Current
vs. Supply Voltage
=33Ω,V
Rgate
CC=15V
140
120
100
80
140
120
100
80
140v
70v
0v
140v
70v
0v
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 22.IR2181 vs.Frequency (IRFBC30),
Rgate CC=15V
Figure 23.IR2181 vs.Frequency (IRFBC40),
Rgate CC=15V
=22Ω,V
=15Ω,V
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1ꢧ
( )(S)&(PbF)
IR2184 4
140v
140
120
100
80
140
120
100
80
70v
0v
60
60
140v
70v
0v
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 24.IR2181 vs.Frequency (IRFPE50),
Figure 25.IR21814 vs.Frequency (IRFBC20),
=10Ω,V
Rgate
CC=15V
=33Ω,V
Rgate
CC=15V
140
120
100
80
140
120
100
80
140v
70v
0v
140v
70v
0v
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 27.IR21814 vs.Frequency (IRFBC40),
Rgate CC=15V
Figure 26.IR21814 vs.Frequency (IRFBC30),
Rgate CC=15V
=15Ω,V
=22Ω,V
18
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( )(S)&(PbF)
IR2184 4
140v
140
120
100
80
140
120
100
80
70v
0v
140v
70v
0v
60
60
40
40
20
20
1
10
Frequency (KHz)
Figure 29.IR2181s vs.Frequency (IRFBC20),
100
1000
1
10
Frequency (KHz)
Figure 28.IR21814 vs.Frequency (IRFPE50),
100
1000
=33Ω,V
Rgate
CC=15V
=10Ω,V
Rgate
CC=15V
140v70v
140
120
100
80
140
120
100
80
140v
70v
0v
0v
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 30.IR2181s vs.Frequency (IRFBC30),
Rgate CC=15V
Figure 31.IR2181s vs.Frequency (IRFBC40),
Rgate CC=15V
=22Ω,V
=15Ω,V
www.irf.com
1ꢩ
( )(S)&(PbF)
IR2184 4
140V 70V 0V
140
120
100
80
140
120
100
80
60
60
140v
70v
0v
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 33. IR21814s vs. Frequency (IRFBC20),
Rgate=33 , VCC=15V
Figure 32. IR2181s vs. Frequency (IRFPE50),
Rgate=10 , VCC=15V
Ω
Ω
140
120
100
80
140
120
100
80
140v
70v
0v
140v
70v
0v
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 34. IR21814s vs. Frequency (IRFBC30),
Rgate=22 , VCC=15V
Figure 35. IR21814s vs. Frequency (IRFBC40),
Rgate=15 , VCC=15V
Ω
Ω
20
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( )(S)&(PbF)
IR2184 4
140v70v
140
120
100
80
0v
60
40
20
1
10
100
1000
Frequency (KHz)
Figure 36. IR21814s vs. Frequency (IRFPE50),
Rgate=10 , VCC=15V
Ω
www.irf.com
21
( )(S)&(PbF)
IR2184 4
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
IN C H E S
MILLIMETERS
DIM
A
D
B
MIN
.0532
MAX
.0688
.0098
.020
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
FOOTPRINT
8X 0.72 [.028]
5
A
E
A1 .0040
b
c
.013
.0075
.189
.0098
.1968
.1574
8
1
7
2
6
3
5
6
D
E
e
H
.1497
0.25 [.010]
A
.050 BASIC
1.27 BASIC
6.46 [.255]
4
e 1 .025 BASIC
0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
3X 1.27 [.050]
e
6X
8X 1.78 [.070]
K x 45°
e1
A
C
y
0.10 [.004]
8X c
8X L
A1
B
8X b
7
0.25 [.010]
C A
5
6
7
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-602ꢧ
01-0021 11 (MS-012AA)
8-Lead SOIC
22
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( )(S)&(PbF)
IR2184 4
01-6010
01-3002 03 (MS-001AC)
14-Lead PDIP
01-601ꢩ
14-Lead SOIC (narrow body)
01-3063 00 (MS-012AB)
www.irf.com
23
( )(S)&(PbF)
IR2184 4
LEADFREE PART MARKING INFORMATION
Part number
Date code
IRxxxxxx
YWW?
IR logo
?XXXX
Pin 1
Identifier
Lot Code
(Prod mode - 4 digit SPN code)
?
MARKING CODE
P
Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
Leadfree Part
8-Lead PDIP IR2184 order IR2184
8-Lead SOIC IR2184S order IR2184S
14-Lead PDIP IR21844 order IR21844
14-Lead SOIC IR21844 order IR21844S
8-Lead PDIP IR2184 order IR2184PbF
8-Lead SOIC IR2184S order IR2184SPbF
14-Lead PDIP IR21844 order IR21844PbF
14-Lead SOIC IR21844 order IR21844SPbF
Thisproduct has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web Site http://www.irf.com
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
4/4/2006
24
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