IR2520S [INFINEON]

Switching Regulator/Controller, PDSO8,;


型号：	IR2520S
厂家：	Infineon
描述：	Switching Regulator/Controller, PDSO8, 光电二极管
文件：	总10页 (文件大小：107K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Data Sheet No. PD60212

ADVANCE DATA

IR2520D(S)

ADAPTIVE BALLAST CONTROL IC

Features

Packages

• 600V Half Bridge Driver

• Integrated Bootstrap Diode

• Adaptive zero-voltage switching (ZVS)

• Internal Crest Factor Over-Current Protection

• 0 to 5VDC Voltage Controlled Oscillator

• Programmable minimum frequency

• Micropower Startup Current (150uA)

• Internal 15.6V zener clamp on Vcc

• Small DIP8/SO8 Package

8 Lead SOIC

8-Lead PDIP

Description

The IR2520D is a complete adaptive ballast controller and 600V half-bridge driver integrated into a single IC

for fluorescent lighting applications. The IC includes adaptive zero-voltage switching (ZVS), internal crest

factor over-current protection, as well as an integrated bootstrap diode. The heart of this IC is a voltage

controlled oscillator with externally programmable minimum frequency. All of the necessary ballast features

are integrated in a small 8-pin DIP or SOIC package.

Typical Application Diagram

RSUPPLY

DCP1

CFL LAMP

VCC

LRES

CCP

CVCC

COM

CBOOT

RFMIN

FMIN

CRES

VCO

CVCO

DCP2

Please note that this data sheet contains advance information which could change before product is released to production.

www.irf.com

ADVANCE DATA

IR2520D(S)

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-

eters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance

and power dissipation ratings are measured under board mounted and still air conditions.

Symbol

Definition

Min.

Max.

Units

High side floating supply voltage

-0.3

625

High side floating supply offset voltage

High side floating output voltage

Low side output voltage

- 25

+ 0.3

- 0.3

-0.3

Maximum allowable output current (HO,LO) due to external

power transistor miller effect

-500

500

OMAX

Voltage controlled oscillator input voltage

Supply current (Note 1)

-0.3

-20

-50

—

+ 0.3

VCO

V/ns

dV /dt

Allowable offset voltage slew rate

Package power dissipation @ T ≤ +25°C

8-Lead PDIP

8-Lead SOIC

8-Lead PDIP

8-Lead SOIC

PD=(T

-T )Rth

—

0.625

125

200

150

300

JMAX

Rth

Thermal resistance, junction to ambient

—

°C/W

—

Junction temperature

-55

—

°C

Storage temperature

Lead temperature (soldering, 10 seconds)

Note 1: This IC contains a zener clamp structure between the chip VCC and COM, which has a nominal breakdown voltage

of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the

VCLAMP specified in the Electrical Characteristics section.

Recommended Operating Conditions

For proper operation the device should be used within the recommended conditions.

Symbol

Definition

Min.

Max.

Units

High side floating supply voltage

- 0.7

CLAMP

600

Steady state high side floating supply offset voltage

Supply voltage

-1

CCUV+

CLAMP

Supply current

Note 2

kΩ

FMIN

Minimum frequency setting resistance

VCO pin voltage

100

VCO

Junction temperature

-25

125

° C

Note 2: Enough current should be supplied into the VCC pin to keep the internal 15.6V zener clamp diode on this pin

regulating its voltage,

VCLAMP.

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ADVANCE DATA

IR2520D(S)

Electrical Characteristics

= 14V +/- 0.25V, C =C =1000pF and T = 25°C unless otherwise specified.

CC = BS = BIAS LO HO A

Symbol

Definition

Min. Typ. Max. Units Test Conditions

Supply Characteristics

and V supply undervoltage positive going

—

13.2

10.5

—

rising from OV

CCUV+

threshold

V and V supply undervoltage negative going

CCUV-

threshold

supply undervoltage lockout hysteresis

—

2.7

120

180

1.8

—

200

—

UVHYS

UVLO quiescent current

= 11V

= 14V

QCCUV

µA

Fault mode quiescent current

—

QCCFLT

Quiescent V

supply current

—

QCC

Current, f = 50kHz

Zener clamp voltage

—

1.8

—

CC50k

14.5

15.6

16.5

= 10mA

CLAMP

Floating Supply Characteristics

Quiescent V supply current

-1

—

= V

QBS

µA

Quiescent V supply current

2.5

—

Minimum required V voltage for proper HO

BSMIN

ILK

Offset supply leakage current

µA

V = V = 600V

B S

Oscillator I/O Characteristics

—

100

—

=5V,R

=0V,R

F_VCO(min)

F_VCO(max)

Minimum oscillator frequency

Maximum oscillator frequency

Oscillator duty cycle

FMIN=82K

kHz

FMIN=82K

LO output deadtime

1.5

1.0

DLO

DHO

µS

HO output deadtime

Preheat mode & frequency sweep mode

Adaptive mode VCO lead changing current

Fault mode & UVLO mode VCO lead voltage

VCOPH

µA

VCOADPT

VCOFLT

Gate Driver Output Characteristics

—

100

150

100

Low level output voltage (HO or LO)

High level output voltage (HO or LO)

Turn on rise time

RISE

FALL

Turn off fall time

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ADVANCE DATA

IR2520D(S)

Electrical Characteristics

= 14V +/- 0.25V, C =C =1000pF and T = 25°C unless otherwise specified.

CC = BS = BIAS LO HO A

Symbol

Definition

Min. Typ. Max. Units Test Conditions

Protection Characteristics

CSCF

Crest factor peak-to-average fault factor

—

Minimum Frequency Setting Characteristics

FMIN lead voltge during normal operation

FMIN lead voltge during fault mode

—

5.1

0.0

—

FMIN

FMINFLT

Block Diagram

Integrated

Bootstrap

Diode

VCC

COM

High-

Low

Side

Half-

Bridge

Driver

FMIN

Voltage

Controlled

Oscillator

VCO

Fault

Logic

Adaptive

ZVS &

MCS

Sensing

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ADVANCE DATA

IR2520D(S)

Lead Definitions

Lead Assignments

Symbol Description

Supply voltage

VCC

COM

FMIN

VCO

COM

FMIN

VCO

IC power and signal ground

Minimum frequency setting

Voltage controlled oscillator input

Low side gate driver output

High side floating return

7 HO

High side gate driver output

High side gate driver floating supply

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ADVANCE DATA

IR2520D(S)

State Diagram

Power Turned

UVLO Mode

¹/₂-Bridge Off

I_QCC

µA

150

VCO = 0V

FMIN = 0V

VCC < 10.5V

(UVLO-)

VCC > 13.2V

(UVLO+)

FAULT Mode

¹/₂-Bridge Off

VCO = 0V

I_QCC

µA

150

FMIN = 0V

VCC < 10.5V

(UVLO-)

Frequency Sweep Mode

FMIN = 5.1V

Crest Factor > 3

(for 70 cycles of LO)

VCO ramps up, frequency ramps down

Crest Factor Enabled @ VCO > 2V

ZVS Enabled @ VCO > 2V

Lamp Ignites

RUN Mode

VCO = 5.2V, Frequency = fmin

If non-ZVS detected then VCO decreases

and frequency increases to maintain ZVS

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ADVANCE DATA

IR2520D(S)

During UVLO mode, the high and low-side driver outputs,

HO and LO, are both low and pin VCO is pulled down to

COM for resetting the starting frequency to the maximum.

Functional Description

Under-voltage Lock-Out Mode

The under-voltage lockout mode (UVLO) is defined as the

state the IR2520D is in when VCC is below the turn-on

threshold of the IC. The IR2520D under voltage lock-out is

designed to maintain an ultra low supply current (<200uA),

and to guarantee that the IR2520D is fully functional before

the high and low side output drivers are activated.

Frequency Sweep Mode

When VCC exceeds UVLO+ threshold, the IR2520D enters

frequency sweep mode. An internal current source charges

the external capacitor on pin VCO, C_VCO, and the voltage on

pin VCO starts ramping up linearly. The frequency ramps

down towards the resonance frequency of the high-Q ballast

output stage causing the lamp voltage and load current to

increase. When the voltage on pin VCO exceeds 2V, the

crest factor detection and zero-voltage switching (ZVS) are

both enabled. The voltage on pin VCO continues to increase

and the frequency keeps decreasing until the lamp ignites,

or, the internal crest factor threshold is reached (see Fault

Mode section). If the lamp ignites successfully, the voltage

on pin VCO continues to increase until it internally limits at

5.2V. The frequency stops decreasing and stays at the

minimum frequency as programmed by an external resistor,

RFMIN, on pin FMIN. The minimum frequency should be

set below the high-Q resonance frequency of the ballast

output stage to ensure that the frequency ramps through

resonance for lamp ignition. The desired preheat time can

be set by adjusting the slope of the VCO ramp with the

The start-up capacitor, C_VCC, is charged by current through

supply resistor, R_SUPPLY, minus the start-up current drawn by

the IR2520D. This resistor is chosen to provide sufficient

current to supply the IR2520D from the DC bus. C_VCCshould

be large enough to hold the voltage at Vcc above the UVLO

threshold for one half cycle of the line voltage as it will only

be charged at the peak. Once the capacitor voltage on V_CC

reaches the start-up threshold, the IR2520D turns on and

then HO and LO start oscillating.

An internal bootstrap diode between Vcc and VB and exter-

nal supply capacitor, C_BOOT, determine the supply voltage for

the high side driver circuitry. An external charge pump circuit

consisting of a capacitor, C_CP,and two diodes, D_CP1and D_CP2

supplies the voltage for the low side driver circuitry. To guar-

antee that the high-side supply is charged up before the first

pulse on pin HO, the first pulse from the output drivers comes

from the LO pin. LO may oscillate several times until VB-VS

exceeds UVBS+ (9 Volts) and the high-side driver is enabled.

external capacitor, C_VCO

VBUS (+)

V^B_S^U(+)

DCP1

RSUPPLY

DCP1

DBOOT

VCC

Half

Bridge

Output

15.6 V

CVCC

COM

VCC

COM

Half

Bridge

Output

DBOOT

CBOOT

I_LOAD

Half

Bridge

Driver

FMIN

CVCC

VCO

CCP

RFMIN

CLAMP

VCO

I^LOA

CBOOT

Half

Bridge

Driver

VCO

CCP

CVCO

Sensing

Fault

Logic

CVCO

DCP2

Load

Return

VBUS (-)

DCP2

Load

Return

Figure 2, Frequency sweep circuitry

V^B_S^U(-)

Figure 1, Start-up circuitry

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ADVANCE DATA

IR2520D(S)

Run Mode

Fault Mode

The frequency decreases during the frequency sweep mode

until the lamp ignites and the ballast output stage becomes

a low-Q RCL circuit. The frequency then deceases further

until the VCO pin voltage limits at 5.2V and the minimum

frequency is reached. The resonant inductor, resonant

capacitor, DC bus voltage and minimum frequency determine

the running lamp power. The IC stays at this minimum

frequency unless non-zero-voltage switching (non-ZVS) is

detected at the VS pin. If the voltage has not slewed entirely

to COM during the deadtime such that there is voltage across

the external low-side switch before LO turns-on, then the

system is operating too close to resonance and destructive

non-ZVS capacitive mode switching occurs. To correct for

this, a pulse of current is sinked from the VCO pin to discharge

the external capacitor, C_VCO, slightly causing the frequency

to increase. The VCO capacitor then charges up during the

rest of the cycle slowly due to an internal current source.

The frequency is therefore trying to decrease towards

resonance by charging the VCO capacitor and the adaptive

ZVS circuit “nudges” the frequency back up slightly above

resonance when non-ZVS occurs. The circuit then remains

in this closed-loop adaptive ZVS mode during running and

maintains ZVS operation with changing line conditions,

component tolerance variations and lamp/load variations. The

600V fabrication process used in the development of this IC

allows for the VS pin to be accurately measured with an

internal high-voltage MOSFET for zero volts during the non-

overlapping deadtime, while withstanding the high DC bus

voltage during other portions of the switching cycle when

the high-side MOSFET is turned on and VS is at the DC bus

potential.

Should a lamp non-strike condition occur where the filaments

are intact but the lamp does not ignite, the lamp voltage and

output stage current will increase during the ignition ramp

until the resonant inductor saturates or capacitive mode

switching occurs. To detect this, the IC performs a

measurement of the VS pin during the on-time of the LO pin.

The voltage at the VS pin during the on-time of pin LO is

determined by the current flowing through the on-resistance

(RDSon) of the external low-side MOSFET. The RDSon of

the external low-side MOSFET therefore serves as the

current-sensing resistor and VS serves as the current sensing

pin on the IC. Sensing the half-bridge current in this way

eliminates the need for an external current-sensing resistor

and an additional current-sensing pin on the IC. An internal

high-voltage MOSFET is turned on when VS is low (when

the external low-side MOSFET is ‘ on’ ) for performing the

current sensing, and is turned off during the rest of the

switching cycle for withstanding the high-voltage when VS is

equal to the DC bus voltage (when the external high-side

MOSFET is ‘ on’ ). Since the RDSon has a positive

temperature coefficient, the IC performs an internal crest

factor measurement for detecting excessive dangerous

currents or inductor saturation which can occur during a lamp

non-strike fault condition. Performing the crest factor

measurement provides a relative current measurement which

cancels temperature and/or tolerance variations of the RDSon

of the external low-side half-bridge MOSFET. Should the peak

current during the on-time of LO exceed a threshold of 3

times the average current for approximately 70 switching

cycles of LO, the IC will enter Fault Mode and both gate

driver outputs will be latched ‘ low’ . To reset the IC back to

frequency sweep mode VCC must be recycled below and

above the internal UVLO thresholds.

_BUV_S

(+)

DCP1

Should an open filament lamp fault occur, hard-switching will

occur at the half-bridge. The crest factor circuit will detect

this condition as well and after approximately 70 cycles of

the fault occurance the IC will enter Fault Mode and both

gate driver outputs will be latched ‘ low’ . To reset the IC back

to frequency sweep mode VCC must be recycled below and

above the internal UVLO thresholds

VCC

Half

Bridge

Output

DBOOT

Half

CVCC

COM

VCO

15.6V

CBOOT

I_LOAD

Bridge

VCO

CCP

Driver

CVCO

Fault

Logic

Sensing

Adaptive

ZVMCS

Logic

DCP2

Load

Return

(-)

BUS

Figure 3, ZVS circuitry

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ADVANCE DATA

IR2520D(S)

Case outlines

01-6014

01-3003 01 (MS-001AB)

8-Lead PDIP

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ADVANCE DATA

IR2520D(S)

IN C H E S

MILLIMETERS

DIM

MIN

.0532

MAX

.0688

.0098

.020

MIN

1.35

0.10

0.33

0.19

4.80

3.80

MAX

1.75

0.25

0.51

0.25

5.00

4.00

FOOTPRINT

8X 0.72 [.028]

A1 .0040

.013

.0075

.189

.0098

.1968

.1574

.1497

0.25 [.010]

.050 BASIC

1.27 BASIC

6.46 [.255]

e 1 .025 BASIC

0.635 BASIC

.2284

.0099

.016

0°

.2440

.0196

.050

8°

5.80

0.25

0.40

0°

6.20

0.50

1.27

8°

3X 1.27 [.050]

8X 1.78 [.070]

K x 45°

0.10 [.004]

8X c

8X L

8X b

0.25 [.010]

C A

NOTES:

DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.

MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].

1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.

2. CONTROLLING DIMENSION: MILLIMETER

DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.

MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].

3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].

4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.

DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO

A SUBSTRATE.

01-6027

01-0021 11 (MS-012AA)

8 Lead SOIC

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105

Data and specifications subject to change without notice. 3/19/2003

www.irf.com

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