IRF1404STRLPBF [INFINEON]
Advanced Process Technology; 先进的工艺技术型号: | IRF1404STRLPBF |
厂家: | Infineon |
描述: | Advanced Process Technology |
文件: | 总11页 (文件大小:276K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD-95104
IRF1404SPbF
IRF1404LPbF
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
HEXFET® Power MOSFET
D
VDSS = 40V
l Fully Avalanche Rated
l Lead-Free
RDS(on) = 0.004Ω
G
ID = 162A
Description
Seventh Generation HEXFET® Power MOSFETs from
S
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRF1404L) is available for low-
profile applications.
D2Pak
TO-262
IRF1404SPbF IRF1404LPbF
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
162
115
A
650
PD @TA = 25°C
PD @TC = 25°C
Power Dissipation
3.8
W
W
Power Dissipation
200
Linear Derating Factor
1.3
W/°C
V
VGS
EAS
IAR
Gate-to-Source Voltage
± 20
Single Pulse Avalanche Energy
Avalanche Current
519
mJ
A
95
20
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
mJ
V/ns
5.0
-55 to +175
-55 to +175
300 (1.6mm from case )
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient (PCB mounted, steady-state)*
Typ.
–––
–––
Max.
0.75
40
Units
°C/W
RθJC
RθJA
www.irf.com
1
03/11/04
IRF1404S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
40 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.036 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– 0.00350.004
2.0 ––– 4.0
Ω
V
S
VGS = 10V, ID = 95A
VDS = 10V, ID = 250µA
VDS = 25V, ID = 60A
VDS = 40V, VGS = 0V
VDS = 32V, VGS = 0V, TJ = 150°C
VGS = 20V
Forward Transconductance
106 ––– –––
––– ––– 20
––– ––– 250
––– ––– 200
––– ––– -200
––– 160 200
IDSS
Drain-to-Source Leakage Current
µA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
nA
VGS = -20V
Qg
ID = 95A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
35 –––
42 60
17 –––
nC VDS = 32V
VGS = 10V
VDD = 20V
––– 140 –––
ID = 95A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
72 –––
26 –––
RG = 2.5Ω
RD = 0.21Ω
Between lead,
LS
Internal Source Inductance
nH
–––
–––
7.5
and center of die contact
VGS = 0V
Ciss
Input Capacitance
––– 7360 –––
––– 1680 –––
––– 240 –––
––– 6630 –––
––– 1490 –––
––– 1540 –––
Coss
Output Capacitance
VDS = 25V
Crss
Reverse Transfer Capacitance
Output Capacitance
pF
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 32V
Coss
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
S
IS
––– –––
162
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 650
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 71 110
––– 180 270
V
TJ = 25°C, IS = 95A, VGS = 0V
TJ = 25°C, IF = 95A
ns
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
max. junction temperature. (See fig. 11)
Starting TJ = 25°C, L = 0.12mH
RG = 25Ω, IAS = 95A. (See Figure 12)
ISD ≤ 95A, di/dt ≤ 150A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A
,
Use IRF1404 data and test conditions.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
* When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
2
www.irf.com
IRF1404S/LPbF
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
°
T = 175 C
J
20µs PULSE WIDTH
T = 25 C
J
°
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
159A
=
I
D
°
T = 25 C
J
°
2.0
1.5
1.0
0.5
0.0
T = 175 C
J
100
V
= 25V
DS
20µs PULSE WIDTH
V
=10V
GS
10
4.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
5.0
6.0
7.0 8.0
9.0
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRF1404S/LPbF
20
16
12
8
12000
I = 95A
D
V
= 0V,
f = 1MHz
C SHORTED
ds
GS
C
= C + C
iss
gs
gd ,
C
= C
V
= 32V
= 20V
rss
gd
DS
10000
8000
6000
4000
2000
0
C
= C + C
V
oss
ds
gd
DS
C
iss
C
oss
4
FOR TEST CIRCUIT
SEE FIGURE 13
C
rss
0
1
10
100
0
40
80
120
160
200
240
V
, Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
10000
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 175 C
J
100
10
1
10us
100us
°
T = 25 C
J
1ms
10ms
°
T = 25 C
C
°
T = 175 C
Single Pulse
J
V
= 0 V
GS
2.0
1
0.4
0.8
1.2
1.6
2.4
1
10
100
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF1404S/LPbF
RD
200
160
120
80
VDS
LIMITED BY PACKAGE
VGS
DꢀUꢀTꢀ
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
40
V
DS
90%
0
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
P
2
DM
t
1
0.02
0.01
t
2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF1404S/LPbF
1200
1000
800
600
400
200
0
15V
I
D
TOP
39A
67A
BOTTOM 95A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
Starting T , Junction Temperature( C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
50
Q
Q
GD
GS
V
48
46
44
42
40
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
0
20
I
40
60
80
100
V
GS
, Avalanche Current ( A)
3mA
AV
I
I
D
G
Current Sampling Resistors
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
Fig 13b. Gate Charge Test Circuit
6
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IRF1404S/LPbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
DꢀUꢀT
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as DꢀUꢀTꢀ
• ISD controlled by Duty Factor "D"
• DꢀUꢀTꢀ - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-channel HEXFET® Power MOSFETs
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7
IRF1404S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 530S WIT H
P AR T N U MB E R
L OT CODE 8024
IN T E R N AT IONAL
R E CT IF IE R
L OGO
AS S E MB L E D ON WW 02, 2000
IN T H E AS S E MB L Y L INE "L "
F 530S
DAT E CODE
YE AR 0 = 2000
WE E K 02
N ote: "P " in as s embly line
pos ition indicates "L ead-F ree"
AS S E MB L Y
L OT CODE
L INE
L
OR
P AR T N U MB E R
IN T E R N AT ION AL
R E CT IF IE R
L OGO
F 530S
D AT E COD E
P
=
D E S IGN AT E S L E AD -F R E E
P R OD U CT (OP T ION AL )
AS S E MB L Y
L OT COD E
YE AR
W E E K 02
A = AS S E MB L Y S IT E COD E
0 = 2000
8
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IRF1404S/LPbF
TO-262 Package Outline
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
TO-262 Part Marking Information
E XAMPLE : THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
RECTIFIER
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
LOGO
DATE CODE
YEAR 7 = 1997
WEEK 19
Note: "P" in assembly line
pos ition indicates "Lead-Free"
AS S E MBL Y
LOT CODE
LINE C
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
ASSEMBLY
LOT CODE
WE EK 19
A= ASSEMBLY SITE CODE
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9
IRF1404S/LPbF
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/04
10
www.irf.com
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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