IRF6644PBF [INFINEON]
DirectFET Power MOSFET; DirectFET功率MOSFET
| 型号： | IRF6644PBF |
| 厂家： | 
Infineon |
| 描述： | DirectFET Power MOSFET |
| 文件： | 总10页 (文件大小：255K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 97094A
IRF6644PbF
IRF6644TRPbF
DirectFET Power MOSFET
Typical values (unless otherwise specified)
l RoHS Compliant
VDSS
VGS
RDS(on)
10.3mΩ@ 10V
Vgs(th)
l Lead-Free (Qualified up to 260°C Reflow)
l Application Specific MOSFETs
100V max ±20V max
Qg tot
Qgd
l Ideal for High Performance Isolated Converter
Primary Switch Socket
l Optimized for Synchronous Rectification
35nC
11.5nC
3.7V
l Low Conduction Losses
l High Cdv/dt Immunity
l Low Profile (<0.7mm)
l Dual Sided Cooling Compatible
l Compatible with existing Surface Mount Techniques
DirectFET ISOMETRIC
MN
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SH
SJ
SP
MZ
MN
Description
The IRF6644PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the
lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with
existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques,
when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided
cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6644PbF is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom
applications (36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device
coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability
improvements, and makes this device ideal for high performance isolated DC-DC converters.
Absolute Maximum Ratings
Max.
100
±20
10.3
8.3
Parameter
Units
V
VDS
Drain-to-Source Voltage
V
Gate-to-Source Voltage
GS
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
I
@ TA = 25°C
D
D
D
@ TA = 70°C
@ TC = 25°C
A
60
82
DM
EAS
IAR
220
6.2
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
13
12
11
10
9
0.08
0.06
0.04
0.02
0.00
T = 25°C
A
I
= 6.2A
D
V
V
= 7.0V
GS
= 8.0V
= 10V
GS
V
T
= 125°C
GS
J
T
= 25°C
10
V
= 15V
GS
J
0
4
8
12
16
20
4
6
8
12
14
16
V
, Gate-to-Source Voltage (V)
GS
I , Drain Current (A)
D
Fig 1. Typical On-Resistance Vs. Gate Voltage
Fig 2. Typical On-Resistance Vs. Drain Current
Notes:
TC measured with thermocouple mounted to top (Drain) of part.
ꢀ Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 12mH, RG = 25Ω, IAS = 6.2A.
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
www.irf.com
1
8/18/06
IRF6644PbF
Static @ TJ = 25°C (unless otherwise specified)
Conditions
VGS = 0V, ID = 250µA
Parameter
Min. Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
100
–––
–––
2.8
–––
0.11
10.3
–––
-10
–––
–––
13
V
V/°C
mΩ
V
Reference to 25°C, ID = 1mA
∆ΒVDSS/∆TJ
RDS(on)
VGS = 10V, ID = 10.3A c
VDS = VGS, ID = 150µA
VGS(th)
4.8
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
15
––– mV/°C
VDS = 100V, VGS = 0V
–––
–––
–––
–––
–––
35
20
250
100
-100
–––
47
µA
nA
S
VDS = 80V, VGS = 0V, TJ = 125°C
VGS = 20V
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
VGS = -20V
VDS = 10V, ID = 6.2A
gfs
Qg
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
V
DS = 50V
GS = 10V
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
Output Charge
8.0
–––
–––
V
1.6
nC
ID = 6.2A
11.5 17.3
13
13.1
17
–––
–––
–––
2.0
See Fig. 15
VDS = 16V, VGS = 0V
nC
Ω
Gate Resistance
1.0
17
VDD = 50V, VGS = 10Vꢁc
td(on)
tr
td(off)
tf
Turn-On Delay Time
–––
–––
–––
–––
ID = 6.2A
Rise Time
26
RG=6.2Ω
Turn-Off Delay Time
34
ns
Fall Time
16
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 2210 –––
V
DS = 25V
ƒ = 1.0MHz
GS = 0V, VDS = 1.0V, f=1.0MHz
Output Capacitance
–––
–––
420
100
–––
–––
pF
Reverse Transfer Capacitance
Output Capacitance
V
––– 2120 –––
––– 240 –––
VGS = 0V, VDS = 80V, f=1.0MHz
Output Capacitance
Diode Characteristics
Conditions
MOSFET symbol
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
(Body Diode)
–––
–––
10
showing the
A
ISM
integral reverse
Pulsed Source Current
(Body Diode)ꢁd
–––
–––
82
p-n junction diode.
TJ = 25°C, IS = 6.2A, VGS = 0V c
TJ = 25°C, IF = 6.2A, VDD = 50V
di/dt = 100A/µs c
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
42
1.3
63
V
ns
nC
Qrr
69
100
Notes:
ꢀ Repetitive rating; pulse width limited by max. junction temperature.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6644PbF
Absolute Maximum Ratings
Max.
2.8
Parameter
Units
W
P
P
P
@TA = 25°C
@TA = 70°C
@TC = 25°C
Power Dissipation
Power Dissipation
Power Dissipation
D
D
D
P
J
1.8
89
270
T
T
T
Peak Soldering Temperature
Operating Junction and
°C
-40 to + 150
Storage Temperature Range
STG
Thermal Resistance
Parameter
Typ.
–––
12.5
20
Max.
45
Units
RθJA
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
RθJA
–––
–––
1.4
RθJA
°C/W
RθJC
–––
1.0
RθJ-PCB
Junction-to-PCB Mounted
–––
100
10
D = 0.50
0.20
0.10
0.05
0.02
0.01
1
R1
R1
R2
R2
R3
R3
R4
Ri (°C/W) τi (sec)
R4
0.1
0.6784
17.299
17.566
9.4701
0.00086
0.57756
8.94
τ
τ
J τJ
τ
Cτ
1τ1
Ci= τi/Ri
τ
τ
τ
2τ2
3τ3
4τ4
0.01
0.001
0.0001
106
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t
, Rectangular Pulse Duration (sec)
1
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
Surface mounted on 1 in. square Cu board, steady state.
TC measured with thermocouple incontact with top (Drain) of part.
Used double sided cooling, mounting pad with large heatsink.
R is measured at TJ of approximately 90°C.
θ
Mounted on minimum
Mounted to a PCB with
small clip heatsink (still air)
Surface mounted on 1 in. square Cu
footprint full size board with
metalized back and with small
clip heatsink (still air)
board (still air).
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3
IRF6644PbF
100
100
10
1
6.0V
VGS
15V
6.0V
VGS
15V
10V
8.0V
7.0V
6.0V
TOP
TOP
10V
8.0V
7.0V
6.0V
10
BOTTOM
BOTTOM
≤ 60µs PULSE WIDTH
≤ 60µs PULSE WIDTH
Tj = 150°C
Tj = 25°C
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
100.00
2.0
1.5
1.0
0.5
I
= 10.3A
= 10V
D
T
T
T
= 150°C
= 25°C
= -40°C
J
J
J
V
GS
10.00
1.00
0.10
0.01
V
= 10V
DS
≤ 60µs PULSE WIDTH
3.0
4.0
5.0
6.0
7.0
-60 -40 -20
T
0
20 40 60 80 100 120 140 160
V
, Gate-to-Source Voltage (V)
GS
, Junction Temperature (°C)
J
Fig 6. Typical Transfer Characteristics
Fig 7. Normalized On-Resistance vs. Temperature
20
100000
V
C
= 0V,
f = 1 MHZ
GS
I
= 6.2A
D
V
= 50V
= C + C , C SHORTED
DS
VDS= 20V
iss
gs
gd ds
C
= C
rss
gd
16
12
8
C
= C + C
10000
1000
100
oss ds
gd
Ciss
Coss
Crss
4
10
0
1
10
100
0
20
40
60
V
, Drain-to-Source Voltage (V)
Q
Total Gate Charge (nC)
DS
G
Fig 9. Typical Total Gate Charge vs
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Gate-to-Source Voltage
4
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IRF6644PbF
1000.0
100.0
10.0
1.0
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100µsec
T
T
T
= 150°C
= 25°C
= -40°C
J
J
J
1msec
100msec
10msec
1
T
= 25°C
A
Tj = 150°C
Single Pulse
V
= 0V
GS
4.0
0.1
0.1
0.01
0.10
1.00
10.00 100.00 1000.00
0.0
1.0
2.0
3.0
5.0
V
, Drain-toSource Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig11. Maximum Safe Operating Area
12
10
8
5.0
4.5
4.0
3.5
3.0
2.5
2.0
I
I
I
= 1.0A
D
D
D
= 1.0mA
= 250µA
ID = 150µA
6
4
2
0
25
50
T
75
100
125
150
-50
-25
0
25
50
75
100 125 150
, Ambient Temperature (°C)
T
, Junction Temperature ( °C )
A
J
Fig 13. Typical Threshold Voltage vs.
Fig 12. Maximum Drain Current vs. Ambient Temperature
Junction Temperature
1000
I
D
TOP
2.8A
3.3A
6.2A
800
600
400
200
0
BOTTOM
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
J
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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5
IRF6644PbF
Id
Vds
Vgs
L
VCC
DUT
Vgs(th)
0
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
VGS
20V
0.01
Ω
t
p
I
AS
Fig 16c. Unclamped Inductive Waveforms
Fig 16b. Unclamped Inductive Test Circuit
RD
VDS
VDS
90%
VGS
D.U.T.
RG
+
-
VDD
10%
VGS
10V
td(on)
td(off)
tr
tf
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
6
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IRF6644PbF
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
• di/dt controlled by RG
Re-Applied
Voltage
RG
+
-
• Driver same type as D.U.T.
Body Diode
Inductor Current
Forward Drop
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET Substrate and PCB Layout, MN Outline
(Medium Size Can, N-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G = GATE
D = DRAIN
S = SOURCE
D
D
D
D
S
S
G
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7
IRF6644PbF
DirectFET Outline Dimension, MN Outline
(Medium Size Can, N-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
IMPERIAL
METRIC
CODE MIN
MAX MIN
MAX
0.250
0.201
0.156
0.018
0.036
0.032
0.056
0.036
0.020
0.051
0.115
A
B
C
D
E
F
6.25
6.35 0.246
5.05 0.189
3.95 0.152
0.45 0.014
0.92 0.034
0.82 0.031
1.42 0.054
0.92 0.034
0.52 0.019
1.29 0.046
2.91 0.109
4.80
3.85
0.35
0.88
0.78
1.38
0.88
0.48
1.16
2.74
G
H
J
K
L
M
R
P
0.616 0.676 0.0235 0.0274
0.020 0.080 0.0008 0.0031
0.08
0.17 0.003
0.007
DirectFET Part Marking
8
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IRF6644PbF
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6644TRPBF). For 1000 parts on 7"
reel, order IRF6644TR1PBF
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
TR1 OPTION (QTY 1000)
METRIC
MAX
IMPERIAL
METRIC
MAX
IMPERIAL
CODE
MIN
MIN
MAX
N.C
MIN
MIN
6.9
MAX
N.C
N.C
0.50
N.C
N.C
0.53
N.C
N.C
A
B
C
D
E
F
12.992
0.795
0.504
0.059
3.937
N.C
330.0
20.2
12.8
1.5
N.C
N.C
13.2
N.C
N.C
18.4
14.4
15.4
177.77 N.C
0.75
0.53
0.059
2.31
N.C
N.C
19.06
13.5
1.5
N.C
0.520
N.C
12.8
N.C
100.0
N.C
58.72
N.C
N.C
N.C
0.724
0.567
0.606
13.50
12.01
12.01
G
H
0.488
0.469
0.47
0.47
12.4
11.9
11.9
11.9
LOADED TAPE FEED DIRECTION
DIMENSIONS
METRIC
IMPERIAL
CODE
MIN
7.90
3.90
11.90
5.45
5.10
6.50
1.50
1.50
MIN
MAX
0.319
0.161
0.484
0.219
0.209
0.264
N.C
MAX
8.10
4.10
12.30
5.55
5.30
6.70
N.C
A
B
C
D
E
F
0.311
0.154
0.469
0.215
0.201
0.256
0.059
0.059
G
H
1.60
0.063
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/06
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9
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
相关型号：
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IRF6646TR1
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