IRF7351 [INFINEON]
60V 双 N 通道 HEXFET Power MOSFET, 采用 SO-8 封装;
| 型号： | IRF7351 |
| 厂家： | 
Infineon |
| 描述： | 60V 双 N 通道 HEXFET Power MOSFET, 采用 SO-8 封装 |
| 文件： | 总11页 (文件大小：285K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 97436
IRF7351PbF
HEXFET® Power MOSFET
Applications
VDSS
60V
RDS(on) max
Qg (typ.)
24nC
l Synchronous Rectifier MOSFET for
Isolated DC-DC Converters
l Low Power Motor Drive Systems
17.8m @V = 10V
Ω
GS
1
8
S1
D1
Benefits
2
7
G1
D1
l Ultra-Low Gate Impedance
l Fully Characterized Avalanche Voltage
and Current
3
6
S2
D2
4
5
G2
D2
l 20V VGS Max. Gate Rating
SO-8
Top View
Absolute Maximum Ratings
Parameter
Max.
60
Units
V
VDS
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
V
± 20
8.0
GS
I
I
I
@ TA = 25°C
D
D
@ TA = 70°C
6.4
A
64
DM
Power Dissipation
P
P
@TA = 25°C
@TA = 70°C
2.0
W
D
D
Power Dissipation
1.28
Linear Derating Factor
Operating Junction and
0.016
-55 to + 150
W/°C
°C
T
J
T
Storage Temperature Range
STG
Thermal Resistance
Parameter
Junction-to-Drain Lead
Junction-to-Ambient
Typ.
–––
Max.
20
Units
°C/W
Rθ
Rθ
JL
–––
62.5
JA
Notes through ꢀ are on page 10
www.irf.com
1
11/18/09
IRF7351PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
60 ––– –––
Conditions
VGS = 0V, ID = 250µA
BVDSS
V
∆ΒVDSS/∆TJ
RDS(on)
VGS(th)
Breakdown Voltage Temp. Coefficient ––– 0.068 ––– V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
13.7 17.8
VGS = 10V, ID = 8.0A
VDS = VGS, ID = 50µA
mΩ
V
–––
-8.2
–––
–––
–––
4.0
∆VGS(th)
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
18
––– mV/°C
20
µA VDS = 60V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
nA VGS = 20V
250
100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
––– -100
V
V
GS = -20V
gfs
Qg
–––
24
–––
36
S
DS = 25V, ID = 6.4A
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
td(on)
tr
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
3.8
1.2
7.2
11.8
8.4
7.5
5.1
5.9
17
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
VDS = 30V
VGS = 10V
nC
ID = 6.4A
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
See Fig. 17
Output Charge
nC VDS = 16V, VGS = 0V
DD = 30V, VGS = 10V
ns ID = 6.4A
G = 1.8Ω
Turn-On Delay Time
Rise Time
V
td(off)
tf
Turn-Off Delay Time
Fall Time
R
6.7
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 1330 –––
V
V
GS = 0V
–––
–––
190
92
–––
–––
pF
DS = 30V
ƒ = 1.0MHz
Avalanche Characteristics
Parameter
Typ.
–––
–––
Max.
325
6.4
Units
mJ
Single Pulse Avalanche Energy
EAS
IAR
Avalanche Current
A
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
–––
–––
1.8
MOSFET symbol
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
ISM
–––
–––
64
(Body Diode)
Diode Forward Voltage
p-n junction diode.
VSD
trr
–––
–––
–––
–––
20
1.3
30
92
V
T = 25°C, I = 6.4A, V = 0V
J S GS
Reverse Recovery Time
Reverse Recovery Charge
ns T = 25°C, I = 6.4A, VDD = 30V
J F
Qrr
di/dt = 300A/µs
61
nC
2
www.irf.com
IRF7351PbF
100
10
1
100
10
1
VGS
10V
VGS
10V
TOP
TOP
8.0V
6.0V
5.0V
4.5V
4.3V
4.0V
3.8V
8.0V
6.0V
5.0V
4.5V
4.3V
4.0V
3.8V
BOTTOM
BOTTOM
60µs PULSE WIDTH
3.8V
≤
Tj = 25°C
60µs PULSE WIDTH
≤
Tj = 150°C
3.8V
0.1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
10
2.0
I
= 8.0A
D
V
= 10V
GS
1.8
1.5
1.3
1.0
0.8
0.5
T
= 25°C
J
T
= 150°C
J
1
V
= 25V
DS
≤
60µs PULSE WIDTH
0.1
2
3
4
5
6
-60 -40 -20
0
20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs.Temperature
www.irf.com
3
IRF7351PbF
100000
14.0
12.0
10.0
8.0
V
= 0V,
= C
f = 1 MHZ
GS
I = 6.4A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
= C
rss
oss
gd
= C + C
V
V
V
= 48V
= 30V
= 12V
DS
DS
DS
ds
gd
10000
1000
100
C
iss
C
C
oss
6.0
rss
4.0
2.0
10
0.0
1
10
, Drain-to-Source Voltage (V)
100
0
5
10
15
20
25
30
35
V
DS
Q , Total Gate Charge (nC)
G
Fig 5. Typical Capacitance vs.
Fig 6. Typical Gate Charge vs.
Drain-to-SourceVoltage
Gate-to-SourceVoltage
100
10
1
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100
10
1
T
= 150°C
J
100µsec
1msec
10msec
T
= 25°C
J
DC
T
= 25°C
A
Tj = 150°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.0
0.2
V
0.4
0.6
0.8
1.0
1.2
0.01
0.1
1
10
100
1000
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
www.irf.com
IRF7351PbF
3.5
3.0
2.5
2.0
1.5
8
7
6
5
4
3
2
1
0
I
= 50µA
D
-75 -50 -25
0
25 50 75 100 125 150
25
50
T
75
100
125
150
T
, Temperature ( °C )
, Case Temperature (°C)
J
C
Fig 9. Maximum Drain Current vs.
Fig 10. Threshold Voltage vs. Temperature
CaseTemperature
100
10
D = 0.50
0.20
0.10
0.05
0.02
0.01
1
R1
R1
R2
R2
R3
R3
R4
R4
0.1
Ri (°C/W) τi (sec)
τ
τ
J τJ
τ
3.6777
21.765
25.683
11.374
0.009926
25.24029
3.723179
0.348001
AτA
τ
1 τ1
τ
τ
2 τ2
3 τ3
4 τ4
0.01
0.001
0.0001
Ci= τi/Ri
Ci= τi/Ri
SINGLE PULSE
( THERMAL RESPONSE )
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
1000
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
www.irf.com
5
IRF7351PbF
50
40
30
20
10
0
1400
1200
1000
800
600
400
200
0
I
= 8.0A
I
D
D
TOP
0.53A
0.79A
BOTTOM 6.4A
T
= 125°C
J
T
= 25°C
J
0
5
10
15
20
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
V
Gate -to -Source Voltage (V)
J
GS,
Fig 13. Maximum Avalanche Energy
Fig 12. On-Resistance vs. Gate Voltage
vs. Drain Current
LD
VDS
15V
+
-
VDD
DRIVER
+
L
V
DS
D.U.T
D.U.T
AS
R
G
VGS
V
DD
-
I
A
Pulse Width < 1µs
Duty Factor < 0.1%
VGS
20V
0.01
Ω
t
p
Fig 14a. Unclamped Inductive Test Circuit
Fig 15a. Switching Time Test Circuit
V
(BR)DSS
VDS
t
p
90%
10%
VGS
td(on)
td(off)
tr
I
tf
AS
Fig 15b. Switching Time Waveforms
Fig 14b. Unclamped Inductive Waveforms
6
www.irf.com
IRF7351PbF
Driver Gate Drive
P.W.
P.W.
D =
Period
D.U.T
Period
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.3µF
.2µF
12V
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 17a. Gate Charge Test Circuit
Fig 17b. Gate Charge Waveform
www.irf.com
7
IRF7351PbF
Power MOSFET Selection for Non-Isolated DC/DC Converters
Synchronous FET
Control FET
The power loss equation for Q2 is approximated
by;
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
P = P
+ P + P*
loss
conduction
drive
output
P = Irms 2 × Rds(on)
loss ( )
Power losses in the control switch Q1 are given
by;
+ Q × V × f
(
)
g
g
⎛
⎜
Qoss
⎞
⎠
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
+
×V × f + Q × V × f
(
)
in
rr
in
⎝ 2
This can be expanded and approximated by;
*dissipated primarily in Q1.
P
= I 2 × Rds(on)
(
)
loss
rms
For the synchronous MOSFET Q2, Rds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
verse recovery charge Qrr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
⎛
⎛
Qgd
ig
⎞
Qgs2
ig
⎞
⎟
⎜
⎟
⎜
+ I ×
× V × f + I ×
× V × f
in
in
⎝
⎠
⎝
⎠
+ Q × V × f
(
)
g
g
⎛ Qoss
⎞
⎠
+
×V × f
in
⎝
2
This simplified loss equation includes the terms Qgs2
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and Vin. As Q1 turns on and off there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Qgd/Qgs1 must be minimized to reduce the
potential for Cdv/dt turn on.
and Qoss which are new to Power MOSFET data sheets.
Qgs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Qgs1 and Qgs2, can be seen from
Fig 16.
Qgs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain cur-
rent rises to Idmax at which time the drain voltage be-
gins to change. Minimizing Qgs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
Figure A: Qoss Characteristic
8
www.irf.com
IRF7351PbF
SO-8 Package Outline (Mosfet & Fetky)
Dimensions are shown in milimeters (inches)
SO-8 Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com
9
IRF7351PbF
SO-8 Tape and Reel
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 16mH
RG = 25Ω, IAS = 6.4A.
When mounted on 1 inch square copper board.
ꢀ Rθ is measured at TJ approximately 90°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 11/09
10
www.irf.com
IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) .
contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
相关型号：
IRF7353D1TR
Power Field-Effect Transistor, 6.5A I(D), 30V, 0.032ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, MS-012AA, SO-8
INFINEON
IRF7353D1TRPBF
Power Field-Effect Transistor, 6.5A I(D), 30V, 0.032ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, MS-012AA, SO-8
INFINEON
IRF7353D2TR
Power Field-Effect Transistor, 6.5A I(D), 30V, 0.029ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, MS-012AA, SO-8
INFINEON
IRF7353D2UPBF
Power Field-Effect Transistor, 6.5A I(D), 30V, 0.029ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, SO-8, 8 PIN
INFINEON
©2020 ICPDF网 联系我们和版权申明